KR101034764B1 - Method of forming ?-nitride semiconductor light emitting device - Google Patents

Abstract

The present disclosure provides a method for manufacturing a group III nitride semiconductor light emitting device, wherein the first buffer layer is grown at a first temperature on a substrate, and then the second buffer layer is grown at a second temperature lower than the first temperature on the first buffer layer. Making a first step; And growing a group III nitride semiconductor layer containing at least Ga and N at a third temperature higher than the first temperature and the second temperature. It is about.

Semiconductor, light emitting device, GaN, substrate, ammonia, nitride, crystal, buffer layer.

Description

Method of manufacturing a group III nitride semiconductor light emitting device {METHOD OF FORMING III-NITRIDE SEMICONDUCTOR LIGHT EMITTING DEVICE}

The present disclosure relates to a Group III semiconductor light emitting device as a whole, and more particularly, to a semiconductor light emitting device having improved crystallinity by growing a buffer layer into two layers at different temperatures.

Here, the group III nitride semiconductor light emitting device has a compound semiconductor layer of Al (x) Ga (y) In (1-xy) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). Means a light emitting device, such as a light emitting diode comprising a, and does not exclude the inclusion of a material consisting of elements of other groups such as SiC, SiN, SiCN, CN or a semiconductor layer of these materials.

This section provides background informaton related to the present disclosure which is not necessarily prior art.

1 is a view illustrating an example of a conventional Group III nitride semiconductor light emitting device, wherein the Group III nitride semiconductor light emitting device is grown on the substrate 100, the buffer layer 200 grown on the substrate 100, and the buffer layer 200. n-type group III nitride semiconductor layer 300, an active layer 400 grown on the n-type group III nitride semiconductor layer 300, p-type group III nitride semiconductor layer 500, p-type 3 grown on the active layer 400 The p-side electrode 600 formed on the group nitride semiconductor layer 500, the p-side bonding pad 700 formed on the p-side electrode 600, the p-type group III nitride semiconductor layer 500 and the active layer 400 are formed. The n-side electrode 800 and the passivation layer 900 are formed on the n-type group III nitride semiconductor layer 300 exposed by mesa etching.

As the substrate 100, a GaN-based substrate is used as the homogeneous substrate, and a sapphire substrate, a SiC substrate, or a Si substrate is used as the heterogeneous substrate. Any substrate may be used as long as the group III nitride semiconductor layer can be grown. When a SiC substrate is used, the n-side electrode 800 may be formed on the SiC substrate side.

Group III nitride semiconductor layers grown on the substrate 100 are mainly grown by MOCVD (organic metal vapor growth method).

The buffer layer 200 is intended to overcome the difference in lattice constant and thermal expansion coefficient between the dissimilar substrate 100 and the group III nitride semiconductor, and US Pat. A technique for growing an AlN buffer layer having a thickness of US Pat. No. 5,290,393 describes Al (x) Ga (1-x) N having a thickness of 10 kPa to 5000 kPa at a temperature of 200 to 900 C on a sapphire substrate. (0 ≦ x <1) A technique for growing a buffer layer is described, and US Patent Publication No. 2006/154454 discloses growing a SiC buffer layer (seed layer) at a temperature of 600 ° C. to 990 ° C., followed by In (x Techniques for growing a Ga (1-x) N (0 <x≤1) layer are described. Preferably, the undoped GaN layer is grown prior to the growth of the n-type group III nitride semiconductor layer 300, which may be viewed as part of the buffer layer 200 or as part of the n-type group III nitride semiconductor layer 300. good.

In the n-type group III nitride semiconductor layer 300, at least a region (n-type contact layer) in which the n-side electrode 800 is formed is doped with impurities, and the n-type contact layer is preferably made of GaN and doped with Si. . U. S. Patent No. 5,733, 796 describes a technique for doping an n-type contact layer to a desired doping concentration by controlling the mixing ratio of Si and other source materials.

The active layer 400 is a layer that generates photons (light) through recombination of electrons and holes, and is mainly composed of In (x) Ga (1-x) N (0 <x≤1), and one quantum well layer (single quantum wells) or multiple quantum wells.

The p-type III-nitride semiconductor layer 500 is doped with an appropriate impurity such as Mg, and has an p-type conductivity through an activation process. U.S. Patent No. 5,247,533 describes a technique for activating a p-type group III nitride semiconductor layer by electron beam irradiation, and U.S. Patent No. 5,306,662 annealing at a temperature of 400 DEG C or higher to provide a p-type group III nitride semiconductor layer. A technique for activating is described, and US Patent Publication No. 2006/157714 discloses a p-type III-nitride semiconductor layer without an activation process by using ammonia and a hydrazine-based source material together as a nitrogen precursor for growing the p-type III-nitride semiconductor layer. Techniques for having this p-type conductivity have been described.

The p-side electrode 600 is provided to provide a good current to the entire p-type group III nitride semiconductor layer 500. US Patent No. 5,563,422 is formed over almost the entire surface of the p-type group III nitride semiconductor layer. And a light-transmitting electrode made of Ni and Au in ohmic contact with the p-type III-nitride semiconductor layer 500 and described in US Patent No. 6,515,306 on the p-type III-nitride semiconductor layer. A technique has been described in which an n-type superlattice layer is formed and then a translucent electrode made of indium tin oxide (ITO) is formed thereon.

On the other hand, the p-side electrode 600 may be formed to have a thick thickness so as not to transmit light, that is, to reflect the light toward the substrate side, this technique is referred to as flip chip (flip chip) technology. U. S. Patent No. 6,194, 743 describes a technique relating to an electrode structure including an Ag layer having a thickness of 20 nm or more, a diffusion barrier layer covering the Ag layer, and a bonding layer made of Au and Al covering the diffusion barrier layer.

The p-side bonding pad 700 and the n-side electrode 800 are for supplying current and wire bonding to the outside, and US Patent No. 5,563,422 describes a technique in which the n-side electrode is composed of Ti and Al.

The passivation layer 900 is formed of a material such as silicon dioxide and may be omitted.

Meanwhile, the n-type III-nitride semiconductor layer 300 or the p-type III-nitride semiconductor layer 500 may be composed of a single layer or a plurality of layers, and recently, the substrate 100 may be formed by laser or wet etching. A technique for manufacturing a vertical light emitting device by separating from group III nitride semiconductor layers has been introduced.

FIG. 2 is a view showing an example of a method of growing a group III nitride semiconductor layer described in US Pat. No. 5,290,393, wherein the thickness of 10 to 5000 kPa is shown on a substrate 100 made of sapphire at low temperature (for example, 200 to 900 ° C). N-type Ga (1-x) N (0≤x <1) buffer layer 200 having a growth rate and then doped or undoped GaN at high temperature (e.g., 900 ° C to 1150 ° C) Techniques for growing the Group III nitride semiconductor layer 300 to a thickness of several micrometers have been described. Although the crystallinity of the n-type group III nitride semiconductor layer 300 can be improved by growing the buffer layer 200 on the substrate 100 as in FIG. 2, there is still room for improvement.

This will be described later in the Specification for Implementation of the Invention.

SUMMARY OF THE INVENTION Herein, a general summary of the present disclosure is provided, which should not be construed as limiting the scope of the present disclosure. of its features).

According to one aspect of the present disclosure, in a method of growing a group III nitride semiconductor layer, after growing a first buffer layer at a first temperature on a substrate, the first buffer layer is formed on the first buffer layer. A first step of growing a second buffer layer at a second temperature lower than the first temperature; And a second step of growing a group III nitride semiconductor layer containing at least Ga and N at a third temperature higher than the first and second temperatures. Is provided.

This will be described later in the Specification for Implementation of the Invention.

The present disclosure will now be described in detail with reference to the accompanying drawing (s).

3 is a view for explaining the principle of manufacturing a group III nitride semiconductor light emitting device according to the present disclosure, the first buffer layer 21, the second buffer layer 22, the group III nitride semiconductor layer in order on the substrate 10 A process of growing 23 is disclosed. The first buffer layer 21 (GaN) is grown to a first thickness (eg, 10 nm) using TMGa and NH ₃ as source materials at a first temperature (eg, 600 ° C.) on the substrate 10. Thereafter, the second buffer layer 22 (GaN) is grown to a second thickness (eg, 10 nm) using TMGa and NH ₃ as the source materials at a second temperature lower than the first temperature (eg, 500 ° C). In this case, the amount of the nitrogen source NH ₃ injected during the growth of the second buffer layer 22 is greater than the amount of the nitrogen source injected during the growth of the first buffer layer 21 (for example, twice). desirable. This is because, when grown at a low temperature, the cracking efficiency of the nitrogen source is relatively lowered, so that the supply of nitrogen may not be sufficient in the formation of the second buffer layer 22. On the other hand, it is also possible to use a hard-razine source that can decompose well even at low temperatures. By growing the second buffer layer 22 at a second temperature (eg 500 ° C.) lower than the first temperature (eg 600 ° C.), the density of crystals is caused by the first buffer layer 21 formed at a relatively high first temperature. Is reduced and the state of the crystal is amorphous by the second buffer layer 22 formed at a relatively low second temperature on the first buffer layer 21, thereby improving crystallinity. In addition, in the formation of the double buffer layer, it was found that the effect of improving the brightness is noticeable when the difference in the formation temperature of the two buffer layers is preferably 100 to 140 ℃. After the growth of the second buffer layer 22, the group III nitride semiconductor 23 layer is grown using TMGa and NH ₃ as the source materials at a third temperature higher than the second temperature (for example, 1050 ° C.).

4 is a diagram illustrating an example of a group III nitride semiconductor light emitting device according to the present disclosure, wherein the group III nitride semiconductor light emitting device includes a substrate 10, a first buffer layer 21, and a second buffer layer grown on the substrate 10. (22), an active layer grown on the n-type group III nitride semiconductor layer 30 and the n-type group III nitride semiconductor layer 30 grown on the group III nitride semiconductor layer 23 and the group III nitride semiconductor layer 23 ( 40), the p-type group III nitride semiconductor layer 50 grown on the active layer 40, the p-type electrode 60 formed on the p-type group III nitride semiconductor layer 50, formed on the p-side electrode 60 an n-side electrode 80 formed on the n-type III-nitride semiconductor layer 30 in which the p-side bonding pad 70, the p-type III-nitride semiconductor layer 50, and the active layer 40 are mesa-etched and exposed, and A protective film 90 is included.

FIG. 5 is a view showing outputs when a double buffer layer is formed according to the present disclosure and in the case of a single buffer layer. Although the output is only 14.28mW in the case of a single buffer layer, the output is 16.10mW or more in the case of a double buffer layer, it can be seen that the output of the group III nitride semiconductor light emitting device is improved by using a double buffer layer.

In the case of a group III nitride semiconductor light emitting device using a single buffer layer, the same conditions were used except that the buffer layer was formed at a thickness of 20 nm at 500 ° C.

Various embodiments of the present disclosure will be described below.

(1) A method for growing a group III nitride semiconductor semiconductor layer, wherein the growth temperature range of the first buffer layer is 550 to 600 ° C.

(2) A method for growing a group III nitride semiconductor semiconductor layer, wherein the growth temperature range of the second buffer layer is 440 to 500 ° C.

(3) A method for growing a group III nitride semiconductor semiconductor layer, wherein the growth temperature difference between the first buffer layer and the second buffer layer is in the range of 100 to 140 ° C.

(4) A method of growing a group III nitride semiconductor semiconductor layer, wherein the material forming the first buffer layer is GaN.

(5) A method of growing a group III nitride semiconductor semiconductor layer, wherein the material forming the second buffer layer is GaN.

(6) A method for growing a group III nitride semiconductor semiconductor layer, wherein the material forming the group III nitride semiconductor layer is GaN.

(7) The first buffer layer and the second buffer layer are made of a group III nitride semiconductor, wherein the amount of the nitrogen source used for the growth of the second buffer layer is greater than the amount of the nitrogen source used for the growth of the first buffer layer. A method of growing a group III nitride semiconductor semiconductor layer.

According to one group III nitride semiconductor light emitting device according to the present disclosure, the light emitting device formed on the semiconductor thin film may improve light efficiency.

In addition, according to another group III nitride semiconductor light emitting device according to the present disclosure, it is possible to implement a high brightness light emitting device can lower the heat generation, power consumption is reduced and life is increased.

1 is a view showing an example of a conventional group III nitride semiconductor light emitting device,

2 is a view showing an example of a method of growing a semiconductor disclosed in US Patent No. 5,290,393;

3 is a view for explaining the principle of manufacturing a group III nitride semiconductor light emitting device according to the present disclosure;

4 is a view showing an example of a group III nitride semiconductor light emitting device according to the present disclosure;

FIG. 5 is a view showing outputs when a double buffer layer is formed according to the present disclosure and when a single buffer layer is compared. FIG.

Claims (9)

In the method of manufacturing a group III nitride semiconductor light emitting device, Growing the first buffer layer at a first temperature on the substrate, and then growing the second buffer layer at a second temperature lower than the first temperature on the first buffer layer; And And a second step of growing a group III nitride semiconductor layer comprising at least Ga and N at a third temperature higher than the first and second temperatures. The method according to claim 1, The growth temperature range of the first buffer layer is a method for growing a group III nitride semiconductor semiconductor layer, characterized in that 550 to 600 ℃. The method according to claim 1, The growth temperature range of the second buffer layer is a method of growing a group III nitride semiconductor semiconductor layer, characterized in that 440 to 500 ℃. The method according to claim 1, The growth temperature difference between the first buffer layer and the second buffer layer is in the range of 100 to 140 ° C. A method for growing a group III nitride semiconductor semiconductor layer. The method according to claim 1, The material for forming the first buffer layer is GaN. The method according to claim 1, The material for forming the second buffer layer is GaN. The method according to claim 1, The material for forming a group III nitride semiconductor layer is GaN. The method according to claim 1, The first buffer layer and the second buffer layer are made of a group III nitride semiconductor, wherein the amount of nitrogen source used for the growth of the second buffer layer is greater than the amount of nitrogen source used for the growth of the first buffer layer. Method of growing a semiconductor semiconductor layer. The method according to claim 1, The growth temperature range of the first buffer layer is 550 to 600 ° C, and the growth temperature range of the second buffer layer is 440 to 500 ° C, The growth temperature difference between the first buffer layer and the second buffer layer is in a range of 100 to 140 ° C., the first buffer layer and the second buffer layer are made of a group III nitride semiconductor, and the amount of the nitrogen source used for the growth of the second buffer layer is equal to the first buffer layer. A method for growing a group III nitride semiconductor semiconductor layer, characterized in that it is more than the amount of nitrogen source used for growth of the buffer layer.

Images