KR101004216B1 - Method for fabricating printed curcit board of chip embedded type joined with ultra-silm printed curcit board - Google Patents

Abstract

PURPOSE: A manufacturing method is provided to prevent damage to a semiconductor chip by welding an ultra-slim circuit substrate and a chip housing substrate. CONSTITUTION: A chip housing substrate includes a semiconductor chip(320) and a laminate carrier substrate(300). The semiconductor chip is mounted on the laminate carrier substrate. A stud bump(330) is formed on the bonding area of the semiconductor chip. A slim type printed circuit board includes a carrier substrate, a copper foil layer, an insulating layer(220), and a circuit board. The copper foil layer is formed on the carrier substrate. The insulating layer is formed on the copper foil layer. The circuit board is formed on the insulating layer. The chip housing substrate, the insulating substrate, and the slim type printed circuit board are sequentially welded.

Description

TECHNICAL FIELD FOR FABRICATING PRINTED CURCIT BOARD OF CHIP EMBEDDED TYPE JOINED WITH ULTRA-SILM PRINTED CURCIT BOARD}

The present invention relates to a method for manufacturing a chip-embedded printed circuit board in which an ultra-slim circuit board is bonded, and more particularly, to have a high-density circuit pattern without using a special method such as laser drill or copper plating. The present invention relates to a technology for easily manufacturing a thin printed circuit board.

With the development of the electronics industry, electronic components have become highly functional and miniaturized. In particular, there is an increasing demand for reducing the thickness of components mounted in order to reduce the thickness of portable terminals.

In this situation, it is also important to lower the height of the package (hereinafter referred to as PKG) among the components of the mobile phone.

On the other hand, as the number of components mounted in the mobile phone increases as the variety of services increases in the mobile communication sector, it is becoming more difficult to reduce the height of the PKG.

Since the trend of reducing the size of the mobile phone is one of the important requirements of the end user, the trend is eventually shifting to the mounting of several chips on one interposer.

In particular, the number of CSP (Chip Scale Package), a substrate used as an interposer of semiconductor chips, has begun to increase in mobile phones. Currently, almost all PKGs use CSP substrates, and most semiconductor chip stacks are made. One area is becoming a CSP substrate.

However, in mounting one more semiconductor chip, the limit is that it must fit the height of the limited overall PKG. To this end, alternatives have been proposed in two directions.

These two directions are directions for reducing the thickness of the semiconductor chip itself and for reducing the thickness of an interposer.

The thickness of the semiconductor chip can be up to 50㎛ at present, and the manufacturer has secured a considerable level of technology. However, there are various studies on the thickness below that, and the current standard is reaching the limit.

Next, the thickness of the interposer is also approaching a fairly thin state. It is considered to be the limit of the current technology, so to make it thinner, the approach to the lower limit of the components of the interposer is approached to reduce the overall thickness.

However, in the case of forming a multilayer chip embedded printed circuit board, after the semiconductor chip is mounted, a lamination process is performed on the laminate, a laser drilling process is performed, and a copper plating process is performed on the entire substrate. And a plurality of printed circuit board manufacturing processes for forming a circuit by patterning the copper plating layer.

Therefore, there is a problem that it becomes expensive, it is difficult to form a high density circuit pattern, and it is also difficult to reduce the final thickness of the printed circuit board. In addition, the biggest problem is that the semiconductor chip is damaged, the printed circuit board manufacturing yield is lowered, the manufacturing cost is increased.

According to the present invention, a semiconductor chip is mounted on a laminate carrier substrate to form a chip mounting substrate, a stud bump is formed on the chip, and a circuit board on which a circuit for forming solder balls is formed is matched and thermally bonded to the chip mounting substrate. By providing a chip-embedded printed circuit board, it solves the cost increase caused by the damage and the yield loss of the thin semiconductor chip that goes through various printed circuit board manufacturing processes after mounting the semiconductor chip, and by using the laminate carrier substrate as a molding material An object of the present invention is to provide a chip embedded printed circuit board manufacturing method in which an ultra-slim circuit board which can replace a molding process is bonded.

According to an embodiment of the present invention, a method of manufacturing a chip-embedded printed circuit board in which an ultra-slim circuit board is bonded may include (a) a package surface of a semiconductor chip bonded to an laminate carrier substrate made of an insulator, and bonded to a bonding region of the semiconductor chip. Manufacturing a chip mounting substrate having a stud bump formed thereon; (b) manufacturing an insulating substrate having a through hole corresponding to the stud bump in a resin substrate; Manufacturing a thin printed circuit board having a copper foil layer formed thereon, an insulating layer including a micro via pattern formed on the copper foil layer, and a circuit pattern connected to the stud bumps formed on the insulating layer. And (d) the chip mounting substrate, the insulating substrate and the slim printed circuit from the bottom so that the stud bump and the circuit pattern are bonded to each other. And (e) removing the carrier substrate and the copper foil layer of the slim printed circuit board.

Here, an alignment mark for the matching process of step (d) is further formed on the outer side of the laminate carrier substrate of step (a), and the bonding of the package surface of the semiconductor chip is adhesive. It characterized in that the film, and the step (d) is characterized in that the chip mounting substrate, the insulating substrate and the slim printed circuit board to be matched and thermally bonded at the same time, the step (d) is the chip mounting substrate And mating and thermally bonding the insulating substrate first, and then mating and thermally bonding the slim printed circuit board, wherein the carrier substrate is made of an insulating substrate or a stainless substrate. It is formed in a two-layer structure of the first copper foil layer for use as a release layer and the second copper foil layer for forming a microvia pattern And after the step of forming the microvia pattern of the step (c) further comprising the step of imparting a roughness to the surface of the copper foil layer and the microvia pattern, the step of imparting the roughness is chemical It characterized in that it is carried out using a method or a multi bond treatment (Multi Bond Treatment), and after the step (c) characterized in that further performing an AOI (Automatic Optical Inspection) inspection step for the slim printed circuit board The removal of the carrier substrate in step (e) may be performed mechanically or manually, and the removal of the copper foil layer may be performed by etching. After the step (e), the insulating layer may be removed. Forming a surface treatment layer on the microvia pattern exposed to the surface; and forming a solder ball on the surface treatment layer. The surface treatment layer is formed of any one of NiAu, NiPdAu, Au, Ag, Sn, OSP (Organic Solderability Preservative), SOP (Solder On Pad) and bump, the slim type printing The circuit board may be a multilayer printed circuit board in which two or more insulating layers including the microvia pattern are stacked.

In addition, according to another embodiment of the present invention, a method of manufacturing a chip embedded printed circuit board having an ultra-slim circuit board bonded thereto may include a copper clad laminate (CCL), and a package surface of a semiconductor chip may be bonded to the copper clad laminate (CCL). Manufacturing a chip mounting substrate having a stud bump formed on a bonding area of the semiconductor chip, manufacturing an insulating substrate having a through hole corresponding to the stud bump in a resin substrate, A copper foil layer is formed, and an insulating layer including a micro via pattern formed on the copper foil layer is formed, and a slim printed circuit board having a circuit pattern connected to the stud bumps is formed on the insulating layer. And matching and thermally joining the chip mounting substrate, the insulating substrate, and the slim printed circuit board in order from the bottom, wherein the stud Characterized in that it comprises a program and steps, and removing the carrier substrate of the thin printed circuit board to the circuit such that the pattern is joined to each other.

Here, the step of forming a surface treatment layer on the microvia pattern exposed by the insulating layer, removing the remaining portion except the copper foil portion of the copper-clad laminate and forming a solder ball on the surface treatment layer And forming a corrosion preventing plate or a heat dissipating material layer on the surface of the copper foil portion remaining.

The present invention manufactures a slim substrate including a microvia provided in the form of a buried pattern, thereby making it possible to use a high density circuit without using a special method such as a conventional laser drill or copper plating. It is possible to easily manufacture an ultra-thin printed circuit board having a pattern.

In addition, since the present invention facilitates the semiconductor chip mounting after the printed circuit board manufacturing, and easy to form the BGA type or LGA type, the present invention provides the effect of improving productivity and reducing manufacturing costs.

The present invention relates to a slim substrate including a micro grid of a ball grid array (BGA) or a land grid array (LGA) type, and a printed circuit pattern for mounting a semiconductor chip formed on the slim substrate. The present invention provides a method for easily fabricating a chip embedded printed circuit board to which an ultra-slim circuit board having a high density circuit pattern is bonded by thermally bonding a chip mounting substrate and an insulating substrate to a circuit board.

Hereinafter, on the basis of the above-described object of the present invention will be described in detail a chip-embedded printed circuit board bonded to an ultra-slim circuit board and a manufacturing method thereof.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention, and how to accomplish them, will become apparent with reference to the embodiments and drawings described in detail below. However, it is to be understood that the present invention is not limited to the disclosed embodiments, but may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. It is intended that the disclosure of the present invention be limited only by the terms of the appended claims.

1A to 1H are cross-sectional views illustrating a method of manufacturing a slim substrate including a microvia according to the present invention.

Referring to FIG. 1A, the first copper foil layer 110 and the second copper foil layer 120 are formed on the carrier substrate 100. In this case, the carrier substrate 100 preferably uses an insulating layer, but a stainless substrate may be used.

In addition, when the stainless substrate is used, the first copper foil layer 110 forming process serving as the release layer may be omitted. In addition, the carrier substrate 100 having the copper foil layer formed as described above can be used as it is by purchasing a commercial copper foil laminated film such as CCL.

Referring to FIG. 1B, a first photoresist layer pattern 130 defining a land layer region is formed on the second copper foil layer 120. In this case, the land layer region is a circuit pattern for mounting a BGA type or LGA type.

Referring to FIG. 1C, the first conductive layer 140 is formed in a region between the first photoresist pattern 130. In this case, the first conductive layer 140 may be formed in at least one selected from a copper plating pattern, a B2it bump, and a sputtering metal pattern.

Referring to FIG. 1D, a step of removing the first photoresist pattern 130 is performed. At this time, the upper portion of the first conductive layer 140 may be partially etched, but it is not a big problem in the progress of the present invention. In addition, the planarization process may be performed immediately after the planarization is performed to the height of the first conductive layer 140 without removing the first photoresist layer pattern 130.

Referring to FIG. 1E, a second photosensitive film pattern 150 is formed on the first conductive layer 140. In this case, the region exposed by the second photoresist pattern 150 is defined as a microvia formation region. Therefore, it is preferable to form so that the line width of an exposed area | region may be 25-150 micrometers.

Referring to FIG. 1F, the second conductive layer 160 is formed in the region between the second photoresist pattern 150. In this case, the second conductive layer 160 may also be formed in the same manner as the first conductive layer 140 in at least one selected from a copper plating pattern, a B2it bump, and a sputtering metal pattern.

Referring to FIG. 1G, the second photosensitive film pattern 150 is removed to form a microvia pattern 170 formed of the first conductive layer 140 and the second conductive layer 160.

Referring to FIG. 1H, a process of providing roughness to the surfaces of the second copper foil layer 120 and the microvia pattern 170 is performed. At this time, the surface roughness (roughness, roughness) is preferably formed using a chemical method or a multi bond treatment (Multi Bond Treatment), it is not an essential process can be selectively performed as necessary. Here, the etching process may be used as an embodiment of the chemical method, and the etching process may follow a general process for manufacturing a semiconductor, and thus the present invention is not limited thereto.

In addition, the illustrated form is merely shown in an arbitrary form to give a roughness, not the actual form. Therefore, the present invention is not limited to the illustrated form.

As a first step of the chip embedded printed circuit board manufacturing method bonded to the ultra-slim circuit board according to the present invention, a substrate manufactured through the process as shown in FIGS. 1A to 1H is defined as a base substrate. Here, not all layers of the base substrate are applied to the chip-embedded printed circuit board to which the ultra-slim circuit board according to the present invention is bonded, and only a layer including the microvia pattern is required for a practical configuration.

Therefore, as a next step for utilizing the layer including the microvia pattern as a substrate, a step of laminating an insulating layer on the second copper foil layer 120 of the base substrate is performed.

Laminating the insulating layer may be applied to both a dry lamination for pressing the insulating layer in the form of a film and a wet lamination method for coating a liquid material such as a photosensitive liquid. In the following description, the description will be made mainly on the form of compressing the insulating layer in the form of a film, but the present invention is not always limited thereto.

2A to 2D are cross-sectional views illustrating a method of performing an insulating layer lamination process and a grinding process on a slim substrate according to the present invention.

Referring to FIG. 2A, a cover film 210 supporting the insulating layer 200 and the insulating layer 200 for lamination is formed on the base substrate including the microvia pattern 170 formed until the step of FIG. 1H. Position it. Here, the cover film 210 does not need to be formed when the wet lamination process is performed.

Referring to FIG. 2B, the insulating layer 200 is laminated on the microvia pattern 170 and a baking process is performed so that the insulating layer 200 may be fixed on the base substrate.

Referring to FIG. 2C, the cover film 210 is removed.

Referring to FIG. 2D, the upper portion of the microvia pattern 170 is exposed by grinding or sanding the insulating layer 200. In this case, the grinding or sanding process may be performed by using a mechanical method such as a ceramic grinder or by hand, and when the insulating layer 200 is a photosensitive film, the grinding and sanding process may be replaced by an exposure and development process.

Next, by removing the carrier substrate 100, the first copper foil layer 110, and the second copper foil layer 120, a slim substrate made of the insulating layer 220 including the microvia pattern 270 can be completed. have. At this time, the slim substrate is an expression for referring to the portion excluding the carrier substrate 100, the first copper foil layer 110 and the second copper foil layer 120 in the above process, but the ultra-slim circuit board according to the present invention is bonded In order to stably carry out the subsequent process for manufacturing the chip embedded printed circuit board, it is preferable to perform the removal process of the carrier substrate 100, the first copper foil layer 110, and the second copper foil layer 120 after completion of the printed circuit board manufacturing. Do. Therefore, the slim substrate described below refers to a form in which the insulating layer 220 is included in the base substrate of FIG. 1H.

3A to 3E are cross-sectional views illustrating a method of manufacturing a slim printed circuit board using the slim substrate according to the present invention.

Referring to FIG. 3A, the seed layer 230 is formed on the slim substrate including the carrier substrate 100, the first copper foil layer 110, the second copper foil layer 120, the microvia pattern 170, and the insulating layer 220. ). At this time, the seed layer 230 is preferably formed of an electroless copper plating layer or an electroless copper plating layer + an electrolytic copper plating layer. Alternatively, a method of forming a conductive layer using a sputtering process can also be used.

Referring to FIG. 3B, a photosensitive film pattern 240 for forming a printed circuit pattern is formed on the seed layer 230. In this case, the photosensitive film pattern 240 may be formed by applying a liquid photosensitive liquid and then drying it, or may be used by laminating a photosensitive film in the form of a dry film.

Referring to FIG. 3C, a conductive layer 250 defining a circuit pattern is formed in a region between the photoresist patterns 240. In this case, the conductive layer 250 defining the circuit pattern is preferably formed of an electroless or electrolytic copper plating layer, and may also be formed by a sputtering process.

Referring to FIG. 3D, the photoresist pattern 240 is removed.

Referring to FIG. 3E, the seed layer 230 is etched leaving the conductive layer 250 defining the circuit pattern, thereby forming a circuit pattern including the conductive layer 250 and the seed layer 235 pattern. In this case, the etching process may be either dry or wet, and for the sake of convenience, the circuit pattern is represented as '250', which is a symbol of the conductive layer.

The final shape of FIG. 3E formed so far is a main configuration for manufacturing a chip embedded printed circuit board in which an ultra-slim circuit board according to the present invention is bonded, and serves as a main body for mounting an embedded semiconductor chip on the circuit pattern 250. Therefore, the final shape formed up to FIG. 3E is defined herein as a slim printed circuit board.

4A and 4B are cross-sectional views illustrating a method of manufacturing a chip mounting substrate of a chip embedded printed circuit board according to the present invention.

Referring to FIG. 4A, a laminate carrier substrate 300 for semiconductor chip mounting is prepared. At this time, the laminate carrier substrate 300 is preferably made of an insulator, if necessary, may be used copper clad laminate (CCL).

Here, the term "necessary" refers to a heat sink capable of dissipating heat generated in a semiconductor chip after manufacture of a chip embedded printed circuit board having a final ultra-slim circuit board bonded thereto. By further forming the layer, it means that the copper foil layer can maximize the corrosion protection and heat dissipation effect. The description thereof will be described in detail in the following second and fourth embodiments.

Referring to FIG. 4B, the adhesive film 310 is adhered to the package surface of the semiconductor chip 320 and then the adhesive film 310 is compressed to be adhered onto the laminate carrier substrate 300. Next, the stud bumps 330 are formed in the bonding region of the semiconductor chip 320. In this case, an alignment mark 340 for a subsequent matching process may be further formed in a region other than the region where the semiconductor chip 320 is mounted among the entire area of the laminate carrier substrate 300.

Through the above process, the shape of the substrate formed up to FIG. 4B is defined as a chip mounting substrate which is a configuration for manufacturing a chip embedded printed circuit board to which an ultra-slim circuit board according to the present invention is bonded. After that, the process of manufacturing an insulating substrate, which is another component, is performed.

5A and 5B are cross-sectional views illustrating a method of manufacturing an insulating substrate in a chip embedded printed circuit board manufacturing method according to the present invention.

Referring to FIG. 5A, a resin substrate 400 is prepared. At this time, the resin substrate 400 acts as an encapsulation layer for protecting the semiconductor chip in an embedded form and also serves as an insulating substrate for maintaining a printed circuit pattern in an embedded form. That is, the layer is such that both the semiconductor chip and the circuit pattern are embedded in the resin substrate 400. Accordingly, the thickness of the chip embedded printed circuit board to which the final ultra-slim circuit board is bonded is determined, and in consideration of the above characteristics, in the present invention, the resin substrate is PPG (Prepreg), RCC (Resin Coated Copper), and ABF (Ajinomoto). Bonding Film) can be used.

Referring to FIG. 5B, a through hole 410 is formed in a region corresponding to the stud bump 330 of FIG. 4B by performing a punching process or a laser drilling process on the resin substrate 400. In this way, the resin substrate including the through hole 410 is defined as an insulating substrate 420 that is a component for manufacturing a chip embedded printed circuit board to which an ultra-slim circuit board according to the present invention is bonded.

1A through 5B, the chip mounting substrate, the insulating substrate, and the slim printed circuit board, which are components for manufacturing the chip embedded printed circuit board, to which the ultra-slim circuit board according to the present invention is bonded, may be provided.

In this case, the order of providing each of the above structures is not important, and may be provided in the order prepared according to the situation. However, the interlayer relationship for thermal bonding should be a stack structure in order of a chip mounting substrate, an insulated substrate, and a slim printed circuit board, or a stack structure of a slim printed circuit board, an insulated substrate, and a chip mounted substrate.

In addition, the order in which the three substrates are thermally bonded is also not determined, and the three substrates may be bonded at the same time, or two selected substrates may be bonded first, followed by bonding the other substrate. You may also In this case, in the case of using the selective bonding method, it is preferable to first thermally bond the chip mounting substrate and the insulating substrate, and then thermally bond the slim printed circuit board.

Hereinafter, a detailed embodiment will be described with reference to the above-described lamination method and a process of completing the chip embedded printed circuit board to which the ultra-slim circuit board is bonded.

6A to 6E are cross-sectional views illustrating a method of manufacturing a chip-embedded printed circuit board to which an ultra-slim circuit board according to a first embodiment of the present invention is bonded.

Referring to FIG. 6A, the chip mounting substrate on which the semiconductor chip 320 is mounted is positioned on the bottom of the laminated carrier substrate 300 made of an insulator, and the insulating substrate 420 including the through hole is aligned thereon. Let's do it.

Next, the slim printed circuit board of FIG. 3E having the microvia pattern 170 and the circuit pattern 250 formed thereon is disposed on the insulating substrate 420.

At this time, it is preferable that the stud bump 330 and the through hole of the upper portion of the semiconductor chip 320 coincide with each other, and the circuit pattern 250 can be bonded to the stud bump 230 through the through hole. Such an alignment process is defined as a matching process.

Referring to FIG. 6B, the laminate carrier substrate 300 and the carrier substrate 100 are compressed and then heated to allow the semiconductor chip 320 and the circuit pattern 250 to be embedded in the insulating substrate 420.

In the present invention, this process is defined as a thermal bonding process. At this time, it is not necessary that all three layers are bonded at the same time, and if necessary, two selected layers may be bonded first, followed by bonding the remaining layers. In this case, the laminate carrier substrate 300 or the carrier substrate 100 may be removed and thermally bonded by applying pressure.

Referring to FIG. 6C, the first copper foil layer 110 used as a release layer among the copper foil layers formed on the carrier substrate 100 is removed.

Referring to FIG. 6D, all of the second copper foil layer 120 is removed and the insulating layer 220 including the microvia pattern 170 is exposed.

Here, the laminate carrier substrate 300 may also be removed as needed, but the following description will be made without the laminate carrier substrate 300 being removed.

Referring to FIG. 6E, the surface treatment layer 180 is formed on the exposed microvia pattern 170. In this case, the surface treatment layer 180 may be formed of any one selected from NiAu, NiPdAu, Au, Ag, Sn, OSP (Organic Solderability Preservative), SOP (Solder On Pad), and bumps.

Here, when the surface of the microvia pattern 170 is lower than the insulating layer 220, the printed circuit board may be a BGA type, and the surface of the microvia pattern 170 may be larger than the insulating layer 220. If protruding, it may be a LGA type printed circuit board. As such, the chip-embedded printed circuit board to which the ultra-slim circuit board is bonded according to the present invention has an advantage of easily adjusting the BGA type or LGA type by adjusting the etching degree of the final microvia pattern 170.

Next, a solder ball forming process may be further performed on the surface treatment layer 180.

7A to 7G are cross-sectional views illustrating a method of manufacturing a chip-embedded printed circuit board to which an ultra-slim circuit board according to a second embodiment of the present invention is bonded.

Referring to FIG. 7A, a chip mounting substrate on which a semiconductor chip 540 is mounted is formed using copper foil laminated plates 500, 510, and 520. At this time, the copper foil laminated plate is formed in a structure of the insulating layer 500, the first copper foil layer 510 and the second copper foil layer 520, respectively.

Next, the slim printed circuit board of FIG. 3E having the microvia pattern 170 and the circuit pattern 250 formed thereon is positioned on the insulating substrate 420. In this case, the slim printed circuit board is formed in a structure including the carrier substrate 100, the first copper foil layer 110, and the second copper foil layer 120, and may be described as having the same structure as the copper foil laminate.

Next, the stud bump 550 and the alignment mark 560 are formed by the same process as that of FIG. 4B.

Referring to FIG. 7B, a thermal bonding process is performed in which the copper-clad laminates 500, 510, 520 and the base substrate are compressed and then heated to embed the semiconductor chip 540 and the circuit pattern 250 in the insulating substrate 420. To perform.

Referring to FIG. 7C, the first copper foil layer 110 used as the release layer of the slim printed circuit board is first removed.

Referring to FIG. 7D, all of the second copper foil layer 120 may be removed to expose the insulating layer 220 including the microvia pattern 170.

Referring to FIG. 7E, the surface treatment layer 180 is formed on the exposed microvia pattern 170.

Referring to FIG. 7F, the insulating layer 500 and the first copper foil layer 510 are removed from the copper foil laminates 500, 510, and 520. Here, the remaining second copper foil layer 520 performs a heat sink function of receiving heat generated from the semiconductor chip 540 and dissipating it to the outside.

In addition, a corrosion preventing plate or a heat dissipating material layer 570 may be further formed on the surface of the second copper foil layer 520 remaining as shown in FIG. 7G. As such, when the corrosion preventing plate or the heat dissipating material layer 570 is further formed, the semiconductor chip protection function may be further strengthened and the cooling efficiency may be maximized. Therefore, in the chip-embedded printed circuit board structure in which the ultra-slim circuit board according to the present invention completed to FIG. 7E is bonded, it may be defined as a heat dissipation sheet.

8A to 8C are cross-sectional views illustrating a method of manufacturing a chip embedded printed circuit board to which an ultra-slim circuit board according to a third embodiment of the present invention is bonded.

The third embodiment according to the present invention shows a case in which the slim printed circuit board is formed in a multilayer structure in the above-described first embodiment.

As an example of the multilayer printed circuit board, the process of FIGS. 1B to 1H may be repeated two or more times.

Referring to FIG. 8A, it can be seen that an additional microvia pattern is formed on the slim substrate of FIG. 2D. Therefore, when the microvia pattern 170 of FIG. 2D is referred to as a first microvia pattern and the insulation layer 220 is referred to as a first insulation layer, the microvia pattern 170 includes a second microvia pattern 175 on the first insulation layer. The second insulating layer 260 is formed. In this case, in order to facilitate formation of the second microvia pattern 175, a seed copper foil layer 172 may be formed on the first microvia pattern 170.

Next, a circuit pattern 250 connected to the second microvia pattern 175 is formed to form a slim printed circuit board having a multilayer structure serving as the same structure as that of FIG. 3E.

8B and 8C, the carrier substrate 100, the first copper foil layer 110, and the second copper foil layer 120 are sequentially removed from the slim printed circuit board of the multilayer structure.

Next, although not shown, as shown in FIG. 6E, a surface treatment layer is further formed on the first microvia pattern 170, and a solder ball forming process is performed to bond the ultra-slim circuit board according to the present invention. The embedded printed circuit board manufacturing process can be completed.

9A to 9E are cross-sectional views illustrating a method of manufacturing a chip-embedded printed circuit board to which an ultra-slim circuit board according to a fourth embodiment of the present invention is bonded.

The fourth embodiment according to the present invention shows a case in which the slim printed circuit board is formed in a multilayer structure in the above-described second embodiment.

The embodiment of the multilayer printed circuit board of FIG. 9A is applied in the same manner as in FIG. 8A, and the process of removing the carrier substrate in FIGS. 9B to 9D is the same as the process of FIGS. 7C and 7G. In this case, the surface treatment layer type success tablet of FIG. 7E is omitted.

In addition, as shown in FIG. 9E, a process of forming a corrosion preventing plate or a heat radiation material layer 570 on the surface of the remaining second copper foil layer 520 to further strengthen the semiconductor chip protection function and maximize the cooling efficiency. The same applies also.

As described above, the chip-embedded printed circuit board to which the ultra-slim circuit board using the slim substrate including the microvia according to the present invention is bonded is easily manufactured without the laser drilling or the copper plating process. It can be formed easily. In addition, the effect of dissipating heat generated from the semiconductor chip can be improved, so that the electrical characteristics are excellent and the circuit design space can be maximized. Therefore, high-density circuit wiring is easy and the manufacturing cost of a printed circuit board can be reduced.

In addition, the printed circuit board according to the present invention has a new structure, which is different from the conventional one, and may be referred to as a coreless method that does not need to form a separate core substrate that is often used in the conventional printed circuit board. Therefore, the lamination thickness can be minimized, and the pitch between circuits can be adjusted to 40 μm or less. In addition, since a separate mask process for forming a BGA type or LGA type is not necessary, an unnecessary process such as mask alignment may be omitted to simplify the process of manufacturing a printed circuit board.

Although the embodiments of the present invention have been described above with reference to the accompanying drawings, the present invention is not limited to the above embodiments and can be modified in various forms, and having ordinary skill in the art to which the present invention pertains. It will be understood by those skilled in the art that the present invention may be embodied in other specific forms without changing the technical spirit or essential features of the present invention. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive.

1A to 1H are cross-sectional views illustrating a method of manufacturing a slim substrate including a microvia according to the present invention.

2A to 2D are cross-sectional views illustrating a method of performing an insulating layer lamination process and a grinding process on a slim substrate according to the present invention.

3A to 3E are cross-sectional views illustrating a method of manufacturing a slim printed circuit board using the slim substrate according to the present invention.

4A and 4B are cross-sectional views illustrating a method of manufacturing a chip mounting substrate of a chip embedded printed circuit board according to the present invention.

5A and 5B are cross-sectional views illustrating a method of manufacturing an insulating substrate of a chip embedded printed circuit board according to the present invention.

6A to 6E are cross-sectional views illustrating a method of manufacturing a chip embedded printed circuit board to which an ultra-slim circuit board according to a first embodiment of the present invention is bonded.

7A to 7G are cross-sectional views illustrating a method of manufacturing a chip-embedded printed circuit board to which an ultra-slim circuit board according to a second embodiment of the present invention is bonded.

8A to 8C are cross-sectional views illustrating a method of manufacturing a chip embedded printed circuit board to which an ultra-slim circuit board according to a third embodiment of the present invention is bonded.

9A to 9E are cross-sectional views illustrating a method of manufacturing a chip embedded printed circuit board to which an ultra-slim circuit board according to a fourth embodiment of the present invention is bonded.

Claims (17)

(a) manufacturing a chip mounting substrate in which a package surface of a semiconductor chip is bonded to an upper part of a laminate carrier substrate made of an insulator, and a stud bump is formed on a bonding region of the semiconductor chip; (b) manufacturing an insulating substrate having a through hole corresponding to the stud bump in a resin substrate; (c) A copper foil layer is formed on the carrier substrate, an insulating layer including a micro via pattern is formed on the copper foil layer, and a slim pattern having a circuit pattern connected to the stud bumps on the insulating layer. Manufacturing a printed circuit board; (d) matching and thermally bonding the chip mounting substrate, the insulating substrate, and the slim printed circuit board in order from the bottom so that the stud bump and the circuit pattern are bonded to each other; And (e) removing the carrier substrate and the copper foil layer of the slim printed circuit board; a method of manufacturing a chip embedded printed circuit board having an ultra-slim circuit board bonded thereto. The method of claim 1, The method of manufacturing a chip embedded printed circuit board having an ultra-slim circuit board bonded to an outer surface of the laminate carrier substrate of step (a), further comprising an alignment mark for the matching process of step (d). . The method of claim 1, Bonding of the package surface of the semiconductor chip is a chip embedded printed circuit board manufacturing method bonded to the ultra-slim circuit board, characterized in that using an adhesive film. The method of claim 1, In the step (d), the chip-embedded printed circuit board manufacturing method of claim 1, wherein the chip mounting substrate, the insulating substrate and the slim printed circuit board are simultaneously matched and thermally bonded to each other. The method of claim 1, In the step (d), the chip mounting substrate and the insulating substrate are first matched and thermally bonded, and then, the slim printed circuit board is bonded. Way. The method of claim 1, The carrier substrate is a chip embedded printed circuit board manufacturing method bonded to the ultra-slim circuit board, characterized in that using an insulating substrate or a stainless substrate. The method of claim 1, The copper foil layer is a chip embedded printed circuit board manufacturing method bonded to the ultra-slim circuit board, characterized in that formed of a two-layer structure of the first copper foil layer for use as a release layer and the second copper foil layer for forming a microvia pattern. The method of claim 1, After the step of forming the microvia pattern of the step (c) further comprises the step of imparting a roughness to the surface of the copper foil layer and the microvia pattern, chip embedded printed circuit board bonded to the ultra-slim circuit board Manufacturing method. The method of claim 8, The imparting roughness may be performed by using a chemical method or a multi bond treatment. The method of claim 1, After the step (c) further comprises the step of performing an AOI (Automatic Optical Inspection) inspection step for the slim printed circuit board chip embedded printed circuit board manufacturing method bonded. The method of claim 1, Removing the carrier substrate of step (e) is performed by mechanical or manual, and the removal of the copper foil layer is performed by etching etching ultra-thin circuit board bonded chip embedded printed circuit board manufacturing method. The method of claim 1, After performing step (e), forming a surface treatment layer on the microvia pattern exposed on the surface of the insulating layer; And Forming a solder ball on the surface treatment layer; 13. The method of claim 12, The surface treatment layer may be formed of any one of NiAu, NiPdAu, Au, Ag, Sn, OSP (Organic Solderability Preservative), SOP (Solder On Pad) and bumps. Manufacturing method. The method of claim 1, The slim printed circuit board is a chip embedded printed circuit board manufacturing method bonded to the ultra-slim circuit board, characterized in that the multilayer printed circuit board laminated with two or more insulating layers including the microvia pattern. (a) Manufacturing a chip mounting substrate having a copper clad laminate (CCL), a package surface of a semiconductor chip is bonded to the copper clad laminate (CCL), and a stud bump formed on a bonding region of the semiconductor chip. Doing; (b) manufacturing an insulating substrate having a through hole corresponding to the stud bump in a resin substrate; (c) a copper foil layer is formed on the carrier substrate, and an insulating layer including a micro via pattern formed on the copper foil layer is formed, and a circuit pattern connected to the stud bumps is formed on the insulating layer. Manufacturing a formed slim printed circuit board; (d) matching and thermally bonding the chip mounting substrate, the insulating substrate, and the slim printed circuit board in order from the bottom, such that the stud bumps and the circuit patterns are bonded to each other; And (e) removing the carrier substrate of the slim printed circuit board, wherein the ultra-slim circuit board is bonded chip embedded printed circuit board manufacturing method. The method of claim 15, (e-1) after performing step (e), forming a surface treatment layer on the microvia pattern exposed by the insulating layer including the microvia pattern; (e-2) removing the remaining portions other than the copper foil portion of the copper-clad laminate of step (a); And (e-3) forming a solder ball on the surface treatment layer; a method of manufacturing a chip embedded printed circuit board having an ultra-slim circuit board bonded thereto; The method of claim 16, After performing the step (e-1), the step of forming a corrosion preventing plate or a heat-radiating material layer on the surface of the remaining copper foil portion; chip embedded printed circuit bonded to the ultra-slim circuit board further comprising a Substrate manufacturing method.

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