KR100972648B1 - GaN light emitting diode chip scale package with micro cells in tandem - Google Patents

Abstract

The present invention relates to a GaN light emitting diode chip scale package having a series micro cell structure, comprising: a chip level package including an sapphire substrate and an insulating film, an N-type metal electrode, and a P-type metal electrode formed on an upper surface of a plurality of microcells connected in series; And a solder pad part bonded to the chip level package and including a ceramic substrate and a solder pad, and wherein the sapphire substrate is removed, thereby lowering process cost and increasing productivity and reliability.

GaN, Chip Scale, Package

Description

GaN light emitting diode chip scale package with micro cells in tandem}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a GaN light emitting diode chip scale package having a series micro cell structure, in which unit light emitting diode (LED) micro cells are connected in series, and solder surface mounting is directly performed on a mounting substrate such as a PCB. It is a GaN light emitting diode chip scale package having a series micro cell structure for a chip scale light emitting diode package having an external electrode.

A light emitting diode refers to a device that makes a minority carrier (electron or hole) injected using a PN junction structure of a semiconductor and emits a predetermined light by recombination thereof, and compounds such as GaAs, AlGaAs, GaN, InGaN, and AlGaInP Various colors can be realized by constructing a light emitting source by changing a semiconductor material.

Such a light emitting diode has a smaller power consumption and a longer life than conventional light bulbs or fluorescent lamps, can be installed in a narrow space, and exhibits strong vibration resistance. These light emitting diodes are used as display elements and backlights, and have excellent characteristics in terms of power consumption reduction and durability. Therefore, applications of the light emitting diodes have recently been extended to general lighting, large LCD-TV backlights, automotive headlights, and general lighting.

In manufacturing a light emitting diode module, a specific manufacturing method such as wire bonding is necessarily used. Certain methods, such as wire bonding, reduce the reliability of the product, which complicates the process.

1 is a view showing the structure of a light emitting diode chip with a conventional microcell. As shown, the structure of a light emitting diode chip having a microcell is a plurality of microcells 110 are connected in series, the N metal electrode 120 on one side of the substrate and the P metal electrode 130 on the other side Is formed. The N metal electrode 120 and the P metal electrode 130 are provided at ends of the plurality of microcells 110 connected in series to be connected to the microcells 110. Bonding wires 140 are formed on the N metal electrode 120 and the P metal electrode 130.

2 is a view illustrating the microcell of FIG. 1 in detail. As shown in FIG. 1, the one microcell includes a plurality of reflectors 210, a P-type electrode 220, and an N-type on an upper surface of the sapphire substrate 200. The electrode 230 is provided.

Conventionally, module manufacturing is performed through a paste-based chip mounting process and wire bonding, resulting in yield and productivity problems due to a complicated process. In addition, the thermal conductivity of the printed circuit board (PCB), such as a printed circuit board (PCB) through the low thermal conductivity is disadvantageous in terms of reliability.

Therefore, the present invention provides a solder-based stable mount by fabricating a chip-level package of flip structure that enables surface mounting directly on the substrate at the LED chip fabrication level, eliminating wire bonding process The aim of the present invention is to provide a GaN light emitting diode chip scale package having a series micro cell structure which reduces manufacturing cost and improves reliability by simplifying the design.

In addition, an object of the present invention is to provide a GaN light emitting diode chip scale package having a good thermal characteristics by connecting a substrate that can replace a sapphire substrate with poor thermal characteristics with a metal via hole and then removing the sapphire substrate. have.

Another object of the present invention is to provide a GaN light emitting diode chip scale package having a series micro cell structure in which AC power can be directly connected to each other through cross connection of two chip level packages.

GaN light emitting diode chip scale package of the series micro-cell structure of the present invention for achieving the above object comprises a sapphire substrate, a plurality of microcells connected in series; Metal vias formed on upper surfaces of both ends of the microcell; An insulating film formed on the upper surface of the microcell except for the region where the metal via is formed; An N-type metal electrode positioned on a portion of an upper surface of the sapphire substrate and formed on an upper surface of the first region in the region where the insulating layer is removed; And a P-type metal electrode positioned on another portion of the sapphire substrate and formed on an upper surface of the second region in the region where the insulating layer is removed.

In addition, the GaN light emitting diode chip scale package of the series micro-cell structure of the present invention for achieving the above object includes a sapphire substrate and a chip having an insulating film, an N-type metal electrode and a P-type metal electrode on the upper surface of the plurality of microcells connected in series Level package; And a solder pad part bonded to the chip level package and including a ceramic substrate and a solder pad, wherein the sapphire substrate is removed.

The microcell may include a plurality of reflectors, a P-type electrode, and an N-type electrode on an upper surface of the sapphire substrate.

The insulating film is characterized in that any one of polyimide, epoxy, SiN and SiO2.

The sapphire substrate is characterized in that the length-to-length ratio of about 2: 1.

The N-type metal electrode and the P-type metal electrode may be formed at portions where the insulating film is not formed in the microcell.

The N-type metal electrode and the P-type metal electrode is characterized in that it comprises a metal via.

The solder pad is formed on both side portions of the upper surface of the ceramic substrate, and includes an N-type solder pad and a P-type solder pad, and connects the N-type metal electrode and the N-type solder pad, and the P-type metal electrode and P It characterized in that it comprises a metal via for connecting the solder pad.

The N-type solder pad of the solder pad portion bonded to the chip level package is electrically connected to the P-type solder pad of the solder pad portion bonded to the neighboring chip level package, and AC power is input.

The GaN light emitting diode chip scale package of the series micro cell structure according to the present invention can reduce the process cost and increase productivity and reliability by eliminating a separate wire bonding process.

In addition, the GaN light emitting diode chip scale package of the series micro cell structure of the present invention has excellent thermal characteristics.

In addition, the GaN LED chip scale package of the series microcell structure of the present invention is capable of AC direct input operation.

Hereinafter, a GaN light emitting diode chip scale package having a series micro cell structure according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a diagram illustrating a configuration of a chip level package. As illustrated, the chip level package includes a plurality of microcells 310, an insulating layer 320, an N metal electrode 330, and a P metal electrode 340.

The plurality of microcells 310 are connected in series with each other. Metal vias 350 are formed at both ends of the plurality of microcells 310 connected in series.
The plurality of microcells 310 are formed on the entire upper surface of the sapphire substrate 300, and when the N metal electrode 330 and the P metal electrode 340 are positioned on the plurality of microcells 310 , FIG. As shown in FIG. 3, the metal via 350 is exposed to the top surfaces of the N metal electrode 330 and the P metal electrode 340.
Since the description of the microcell 310 has been described with reference to FIG. 1, a detailed description thereof will be omitted.

The insulating layer 320 is formed except for a region where the metal via 350 is formed in the plurality of microcells 310 connected in series. That is, the insulating film 320 is formed on the upper surface of the sapphire substrate 300, and the insulating film 320 is not formed on the two corners.

As described above, in the process of forming the insulating film 320 in the plurality of microcells 310, after forming the insulating film 320 in the entirety of the plurality of microcells 310, a partial region of the sapphire substrate 300, namely, Etch the insulating film 320 formed in the region where the metal via 350 is formed, or remove the insulating film 320 from the sapphire substrate 300 except for the region where the metal via 350 is formed when the insulating film 320 is formed. There are various methods such as forming. In addition, the insulating layer 320 may use any one of polyimide, epoxy, SiN, and SiO 2.

The N-type metal electrode 330 is formed in one of the regions in which the insulating layer 320 is not formed in the plurality of microcells 310. That is, the N-type metal electrode 330 is formed on one side of the top surface of the sapphire substrate 300. In addition, the N-type metal electrode 330 is electrically connected to the metal via 350 formed in the first region, which is one end of the microcell 310.

The P-type metal electrode 340 is formed in one of the regions in which the insulating layer 320 is not formed in the plurality of microcells 310. That is, the P-type metal electrode 330 is formed on the other side of the upper surface of the sapphire substrate 300. The P-type metal electrode 340 is electrically connected to the metal via 350 formed in the second region, which is the other end of the microcell 310.

The chip scale package of the present invention is formed using the chip level package. 4 is a diagram illustrating a configuration of a chip scale package. As illustrated, the chip scale package includes a light emitting layer 400 and a solder pad part 430.

The light emitting layer 400 has a configuration in which a plurality of microcells from which a sapphire substrate formed in a chip level package is removed is connected in series.

The solder pad part 430 includes a ceramic substrate 410 and a solder pad 420. The chip scale package is formed using a chip level package. As shown in FIG. 5, the solder pad part 510 is formed on the chip level package 500 and the sapphire substrate 520 is removed to form the chip scale package. do.

The solder pad part 510 is formed with P-type solder pads 530 and N-type solder pads 540 on both side portions of the upper surface of the ceramic substrate 550. Each solder pad 530 and 540 is connected to an N-type metal electrode and a P-type metal electrode formed in the chip level package through metal vias 560. In the case where the solder pads 530 and 540 are connected to the metal electrode through the metal via 560, the P-type solder pad 530 is connected to the P-type metal electrode and the N-type solder pad 540 is the N-type metal. Connected with the electrode.

A thin GaN structure is formed by overlapping the solder pad part 510 and the chip level package.

As described above, the sapphire substrate 520 having poor thermal characteristics may be removed and replaced with the ceramic substrate 550, thereby obtaining more improved thermal characteristics.

6 is a diagram illustrating AC direct connection in a chip-scale package. As shown, the P-type external electrode 600 and the N-type external electrode 610 are cross-connected to operate by directly connecting the AC input power.

Here, the sapphire substrate 300 may have a ratio of horizontal to vertical lengths of about 2: 1. In this case, as shown in FIG. 6, when two chip scale packages are connected to the AC direct connection, so-called power LEDs may be implemented.

On the other hand, while shown and described in connection with a specific preferred embodiment of the present invention, various modifications and changes of the present invention without departing from the spirit or field of the invention provided by the claims below It will be readily apparent to those of ordinary skill in the art.

1 is a view showing the structure of a light emitting diode chip equipped with a conventional microcell.

FIG. 2 is a detailed view of the microcell of FIG. 1. FIG.

3 is a diagram illustrating a configuration of a chip level package.

4 is a diagram illustrating a configuration of a chip scale package.

5 is a view illustrating manufacturing a chip scale package using a chip level package and a solder pad unit.

Figure 6 shows an AC direct connection in a chipscale package.

Claims (9)

delete A chip level package having an insulating film, an N-type metal electrode, and a P-type metal electrode formed on upper surfaces of the plurality of microcells connected in series; And It is bonded to the chip-level package, and formed on both sides of the ceramic substrate and the upper surface of the ceramic substrate, including an N-type solder pad and a P-type solder pad, connecting the N-type metal electrode and the N-type solder pad Including a solder pad including a solder pad including a metal via connecting the P-type metal electrode and the P-type solder pad, And forming the chip-level package on the sapphire substrate, bonding the chip-level package and the solder pad part, and then removing the sapphire substrate. 3. The method of claim 2, The microcell includes a plurality of reflectors, a P-type electrode, and an N-type electrode on an upper surface of the sapphire substrate. 3. The method of claim 2, The insulating film is a polyimide, epoxy, SiN and SiO2 GaN light emitting diode chip scale package of the series micro-cell structure, characterized in that any one. delete 3. The method of claim 2, The N-type metal electrode and the P-type metal electrode is a GaN light emitting diode chip scale package of the series micro-cell structure, characterized in that formed in the portion where the insulating film is not formed in the microcell. delete delete 3. The method of claim 2, The N-type solder pad of the solder pad portion bonded to the chip level package is electrically connected to the P-type solder pad of the solder pad portion bonded to the neighboring chip level package, and AC power is input. GaN light emitting diode chip scale package.

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