KR100941569B1 - 프로세싱 시스템 및 프로세싱 시스템 사용 방법 및 장치 - Google Patents

프로세싱 시스템 및 프로세싱 시스템 사용 방법 및 장치 Download PDF

Info

Publication number
KR100941569B1
KR100941569B1 KR1020020081687A KR20020081687A KR100941569B1 KR 100941569 B1 KR100941569 B1 KR 100941569B1 KR 1020020081687 A KR1020020081687 A KR 1020020081687A KR 20020081687 A KR20020081687 A KR 20020081687A KR 100941569 B1 KR100941569 B1 KR 100941569B1
Authority
KR
South Korea
Prior art keywords
circuit
memory
packet
reassembled
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020020081687A
Other languages
English (en)
Korean (ko)
Other versions
KR20030053050A (ko
Inventor
보우차드그레그에이
칼리마우리시오
데이비드슨조엘알
하사웨이마이클더블유
컬크제임스티
왈톤크리스토퍼브라이언
Original Assignee
에이저 시스템즈 인크
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 에이저 시스템즈 인크 filed Critical 에이저 시스템즈 인크
Publication of KR20030053050A publication Critical patent/KR20030053050A/ko
Application granted granted Critical
Publication of KR100941569B1 publication Critical patent/KR100941569B1/ko
Assigned to 엘에스아이 코포레이션 reassignment 엘에스아이 코포레이션 권리의 전부이전등록 Assignors: 에이저 시스템즈 엘엘시
Assigned to 인텔 코포레이션 reassignment 인텔 코포레이션 권리의 전부이전등록 Assignors: 엘에스아이 코포레이션
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • H04L45/56Routing software
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/90Buffering arrangements
    • H04L49/9084Reactions to storage capacity overflow
    • H04L49/9089Reactions to storage capacity overflow replacing packets in a storage arrangement, e.g. pushout
    • H04L49/9094Arrangements for simultaneous transmit and receive, e.g. simultaneous reading/writing from/to the storage element
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • H04L45/60Router architectures
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/50Queue scheduling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/90Buffering arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/90Buffering arrangements
    • H04L49/9042Separate storage for different parts of the packet, e.g. header and payload

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
KR1020020081687A 2001-12-21 2002-12-20 프로세싱 시스템 및 프로세싱 시스템 사용 방법 및 장치 Expired - Fee Related KR100941569B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/029,679 US8782287B2 (en) 2001-12-21 2001-12-21 Methods and apparatus for using multiple reassembly memories for performing multiple functions
US10/029,679 2001-12-21

Publications (2)

Publication Number Publication Date
KR20030053050A KR20030053050A (ko) 2003-06-27
KR100941569B1 true KR100941569B1 (ko) 2010-02-10

Family

ID=21850300

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020020081687A Expired - Fee Related KR100941569B1 (ko) 2001-12-21 2002-12-20 프로세싱 시스템 및 프로세싱 시스템 사용 방법 및 장치

Country Status (5)

Country Link
US (1) US8782287B2 (https=)
EP (1) EP1326475A1 (https=)
JP (1) JP4163499B2 (https=)
KR (1) KR100941569B1 (https=)
TW (1) TWI254529B (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7280527B2 (en) * 2002-05-13 2007-10-09 International Business Machines Corporation Logically grouping physical ports into logical interfaces to expand bandwidth
US7379467B1 (en) * 2003-05-08 2008-05-27 Cypress Semiconductor Corporation Scheduling store-forwarding of back-to-back multi-channel packet fragments
KR100970989B1 (ko) * 2008-04-28 2010-07-21 김상현 다목적 가위
JP6369175B2 (ja) * 2014-07-04 2018-08-08 富士通株式会社 パケット処理装置、制御プログラム、及びパケット処理装置の制御方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR950701167A (ko) * 1992-03-23 1995-02-20 패킷 재조립 방법 및 장치(Packet Reassembly Method and Apparatus)
US5623494A (en) * 1995-06-07 1997-04-22 Lsi Logic Corporation Asynchronous transfer mode (ATM) interconnection system for multiple hosts including advanced programmable interrupt controller (APIC)
JP2000349816A (ja) * 1999-06-04 2000-12-15 Fujitsu Ltd パケットデータ処理装置及びそれを用いたパケット中継装置
WO2001016682A1 (en) 1999-08-27 2001-03-08 International Business Machines Corporation Vlsi network processor and methods

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5317034A (en) * 1976-07-30 1978-02-16 Sharp Corp Image sensor output correcting system
US4149243A (en) * 1977-10-20 1979-04-10 International Business Machines Corporation Distributed control architecture with post and wait logic
US4593357A (en) * 1982-02-19 1986-06-03 Laboratory Equipment Corp. Motor vehicle performance monitoring system
US4885684A (en) * 1987-12-07 1989-12-05 International Business Machines Corporation Method for compiling a master task definition data set for defining the logical data flow of a distributed processing network
US5179530A (en) * 1989-11-03 1993-01-12 Zoran Corporation Architecture for integrated concurrent vector signal processor
US6058114A (en) * 1996-05-20 2000-05-02 Cisco Systems, Inc. Unified network cell scheduler and flow controller
FI974020A0 (fi) 1997-10-21 1997-10-21 Nokia Telecommunications Oy Optimering av resurser i ett paketnaetsflerprocessorsystem
US6249528B1 (en) * 1998-03-12 2001-06-19 I-Cube, Inc. Network switch providing per virtual channel queuing for segmentation and reassembly
US6483839B1 (en) * 1998-03-18 2002-11-19 Conexant Systems, Inc. Apparatus and method for scheduling multiple and simultaneous traffic in guaranteed frame rate in ATM communication system
US6330584B1 (en) * 1998-04-03 2001-12-11 Mmc Networks, Inc. Systems and methods for multi-tasking, resource sharing and execution of computer instructions
US6771652B1 (en) * 1999-11-23 2004-08-03 International Business Machines Corporation Method and system for controlling transmission of packets in computer networks
US6944153B1 (en) * 1999-12-01 2005-09-13 Cisco Technology, Inc. Time slot interchanger (TSI) and method for a telecommunications node
US6629147B1 (en) * 2000-03-31 2003-09-30 Intel Corporation Segmentation and reassembly of data frames
US7092393B1 (en) * 2001-02-04 2006-08-15 Cisco Technology, Inc. Method and apparatus for distributed reassembly of subdivided packets using multiple reassembly components
US6934760B1 (en) * 2001-02-04 2005-08-23 Cisco Technology, Inc. Method and apparatus for resequencing of packets into an original ordering using multiple resequencing components

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR950701167A (ko) * 1992-03-23 1995-02-20 패킷 재조립 방법 및 장치(Packet Reassembly Method and Apparatus)
US5623494A (en) * 1995-06-07 1997-04-22 Lsi Logic Corporation Asynchronous transfer mode (ATM) interconnection system for multiple hosts including advanced programmable interrupt controller (APIC)
JP2000349816A (ja) * 1999-06-04 2000-12-15 Fujitsu Ltd パケットデータ処理装置及びそれを用いたパケット中継装置
WO2001016682A1 (en) 1999-08-27 2001-03-08 International Business Machines Corporation Vlsi network processor and methods

Also Published As

Publication number Publication date
JP4163499B2 (ja) 2008-10-08
JP2003218908A (ja) 2003-07-31
EP1326475A1 (en) 2003-07-09
EP1326475A8 (en) 2003-11-12
KR20030053050A (ko) 2003-06-27
US8782287B2 (en) 2014-07-15
TW200304302A (en) 2003-09-16
TWI254529B (en) 2006-05-01
US20030120798A1 (en) 2003-06-26

Similar Documents

Publication Publication Date Title
EP2317702B1 (en) Methods and apparatus related to a distributed switch fabric
JP2788577B2 (ja) フレーム変換方法及び装置
JP2003508967A (ja) ネットワーク・プロセッサ及び方法を用いるネットワーク・スイッチ
US20130094370A1 (en) Methods and Apparatus for Selecting the Better Cell From Redundant Streams Within A Cell-Oriented Environment.
US6359887B1 (en) Transparent circuit emulation for packet switching network
US7480308B1 (en) Distributing packets and packets fragments possibly received out of sequence into an expandable set of queues of particular use in packet resequencing and reassembly
US8824468B2 (en) System and method for parsing frames
US7272675B1 (en) First-in-first-out (FIFO) memory for buffering packet fragments through use of read and write pointers incremented by a unit access and a fraction of the unit access
US20070159970A1 (en) Power reduction in switch architectures
US7379467B1 (en) Scheduling store-forwarding of back-to-back multi-channel packet fragments
KR100941569B1 (ko) 프로세싱 시스템 및 프로세싱 시스템 사용 방법 및 장치
US7092393B1 (en) Method and apparatus for distributed reassembly of subdivided packets using multiple reassembly components
US6185212B1 (en) ATM cell processing apparatus
US20030118020A1 (en) Method and apparatus for classification of packet data prior to storage in processor buffer memory
US6931014B2 (en) Method for generating and transmitting a train packet in an ATM switch system
US6999450B2 (en) Ethernet based TDM switch
US7590056B2 (en) Processor configured for efficient processing of single-cell protocol data units
JP2002544738A (ja) 多重経路非同期伝送モードスイッチのセルシーケンスを復元するための装置及び方法
JP3019853B2 (ja) Atmスイッチおよびその制御方法
WO2002023823A1 (en) Apparatus and methods for processing packets in a broadband data stream
Konstantoulakis et al. Efficient layered communication stack implementation for broadband end-systems
JPH1155267A (ja) Atmスイッチ
WO1991018463A1 (en) Switching architecture and method

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

A201 Request for examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PE0801 Dismissal of amendment

St.27 status event code: A-2-2-P10-P12-nap-PE0801

D13-X000 Search requested

St.27 status event code: A-1-2-D10-D13-srh-X000

D14-X000 Search report completed

St.27 status event code: A-1-2-D10-D14-srh-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

FPAY Annual fee payment

Payment date: 20130117

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

FPAY Annual fee payment

Payment date: 20140121

Year of fee payment: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R14-asn-PN2301

FPAY Annual fee payment

Payment date: 20150130

Year of fee payment: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

FPAY Annual fee payment

Payment date: 20160127

Year of fee payment: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R14-asn-PN2301

R17-X000 Change to representative recorded

St.27 status event code: A-5-5-R10-R17-oth-X000

FPAY Annual fee payment

Payment date: 20170201

Year of fee payment: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20180203

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20180203