KR100940465B1 - 디지털 신호처리기 - Google Patents

디지털 신호처리기 Download PDF

Info

Publication number
KR100940465B1
KR100940465B1 KR1020007010577A KR20007010577A KR100940465B1 KR 100940465 B1 KR100940465 B1 KR 100940465B1 KR 1020007010577 A KR1020007010577 A KR 1020007010577A KR 20007010577 A KR20007010577 A KR 20007010577A KR 100940465 B1 KR100940465 B1 KR 100940465B1
Authority
KR
South Korea
Prior art keywords
data
instruction
register
command
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020007010577A
Other languages
English (en)
Korean (ko)
Other versions
KR20010082524A (ko
Inventor
시길버트씨
조우퀴즈헨
자산자이케이
강인엽
린지안
모티왈라퀘이드
존디푸
장리
장하이타오
리웨이싱
사카마키찰스이
칸타크프라샨트에이
Original Assignee
퀄컴 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/044,088 external-priority patent/US6496920B1/en
Priority claimed from US09/044,086 external-priority patent/US6425070B1/en
Application filed by 퀄컴 인코포레이티드 filed Critical 퀄컴 인코포레이티드
Priority to KR1020067005980A priority Critical patent/KR100835148B1/ko
Priority to KR1020067005979A priority patent/KR100896674B1/ko
Publication of KR20010082524A publication Critical patent/KR20010082524A/ko
Application granted granted Critical
Publication of KR100940465B1 publication Critical patent/KR100940465B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0877—Cache access modes
    • G06F12/0886—Variable-length word access
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30112—Register structure comprising data of variable length
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30141—Implementation provisions of register files, e.g. ports
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3816—Instruction alignment, e.g. cache line crossing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Memory System (AREA)
KR1020007010577A 1998-03-18 1999-03-04 디지털 신호처리기 Expired - Fee Related KR100940465B1 (ko)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1020067005980A KR100835148B1 (ko) 1998-03-18 1999-03-04 디지털 신호처리기
KR1020067005979A KR100896674B1 (ko) 1998-03-18 1999-03-04 디지털 신호처리기

Applications Claiming Priority (13)

Application Number Priority Date Filing Date Title
US4410498A 1998-03-18 1998-03-18
US4410898A 1998-03-18 1998-03-18
US4408998A 1998-03-18 1998-03-18
US4408798A 1998-03-18 1998-03-18
US09/044,088 US6496920B1 (en) 1998-03-18 1998-03-18 Digital signal processor having multiple access registers
US09/044,104 1998-03-18
US09/044,087 1998-03-18
US09/044,108 1998-03-18
US09/044,086 US6425070B1 (en) 1998-03-18 1998-03-18 Variable length instruction decoder
US09/044,089 1998-03-18
US09/044,088 1998-03-18
US09/044,086 1998-03-18
PCT/US1999/004887 WO1999047999A1 (en) 1998-03-18 1999-03-04 A digital signal processor

Related Child Applications (2)

Application Number Title Priority Date Filing Date
KR1020067005980A Division KR100835148B1 (ko) 1998-03-18 1999-03-04 디지털 신호처리기
KR1020067005979A Division KR100896674B1 (ko) 1998-03-18 1999-03-04 디지털 신호처리기

Publications (2)

Publication Number Publication Date
KR20010082524A KR20010082524A (ko) 2001-08-30
KR100940465B1 true KR100940465B1 (ko) 2010-02-04

Family

ID=27556460

Family Applications (3)

Application Number Title Priority Date Filing Date
KR1020007010577A Expired - Fee Related KR100940465B1 (ko) 1998-03-18 1999-03-04 디지털 신호처리기
KR1020067005980A Expired - Lifetime KR100835148B1 (ko) 1998-03-18 1999-03-04 디지털 신호처리기
KR1020067005979A Expired - Lifetime KR100896674B1 (ko) 1998-03-18 1999-03-04 디지털 신호처리기

Family Applications After (2)

Application Number Title Priority Date Filing Date
KR1020067005980A Expired - Lifetime KR100835148B1 (ko) 1998-03-18 1999-03-04 디지털 신호처리기
KR1020067005979A Expired - Lifetime KR100896674B1 (ko) 1998-03-18 1999-03-04 디지털 신호처리기

Country Status (11)

Country Link
EP (2) EP1066559B1 (cg-RX-API-DMAC7.html)
JP (4) JP2002507789A (cg-RX-API-DMAC7.html)
KR (3) KR100940465B1 (cg-RX-API-DMAC7.html)
CN (2) CN1279435C (cg-RX-API-DMAC7.html)
AR (5) AR026078A2 (cg-RX-API-DMAC7.html)
AT (1) ATE297567T1 (cg-RX-API-DMAC7.html)
AU (1) AU2986099A (cg-RX-API-DMAC7.html)
CA (1) CA2324219C (cg-RX-API-DMAC7.html)
DE (1) DE69925720T2 (cg-RX-API-DMAC7.html)
DK (1) DK1066559T3 (cg-RX-API-DMAC7.html)
WO (1) WO1999047999A1 (cg-RX-API-DMAC7.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018012828A1 (ko) * 2016-07-13 2018-01-18 김태형 다기능 연산 장치 및 고속 푸리에 변환 연산 장치

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100940465B1 (ko) * 1998-03-18 2010-02-04 퀄컴 인코포레이티드 디지털 신호처리기
JP4100300B2 (ja) 2003-09-02 2008-06-11 セイコーエプソン株式会社 信号出力調整回路及び表示ドライバ
JP4661169B2 (ja) * 2003-11-14 2011-03-30 ヤマハ株式会社 ディジタルシグナルプロセッサ
JP4300151B2 (ja) * 2004-04-19 2009-07-22 Ｏｋｉセミコンダクタ株式会社 演算処理装置
US7246218B2 (en) * 2004-11-01 2007-07-17 Via Technologies, Inc. Systems for increasing register addressing space in instruction-width limited processors
US7337272B2 (en) * 2006-05-01 2008-02-26 Qualcomm Incorporated Method and apparatus for caching variable length instructions
US11768689B2 (en) 2013-08-08 2023-09-26 Movidius Limited Apparatus, systems, and methods for low power computational imaging
US10001993B2 (en) 2013-08-08 2018-06-19 Linear Algebra Technologies Limited Variable-length instruction buffer management
FR3021427B1 (fr) * 2014-05-22 2016-06-24 Kalray Structure de paquet d'instructions de type vliw et processeur adapte pour traiter un tel paquet d'instructions
WO2016016730A1 (en) * 2014-07-30 2016-02-04 Linear Algebra Technologies Limited Low power computational imaging
KR102515720B1 (ko) * 2014-07-30 2023-03-31 모비디어스 리미티드 명령어 사전인출을 위한 방법 및 장치
JP7384374B2 (ja) * 2019-02-27 2023-11-21 株式会社ウーノラボ 中央演算処理装置
US11204768B2 (en) 2019-11-06 2021-12-21 Onnivation Llc Instruction length based parallel instruction demarcator
EP4080354A1 (en) * 2021-04-23 2022-10-26 Nxp B.V. Processor and instruction set

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4099229A (en) * 1977-02-14 1978-07-04 The United States Of America As Represented By The Secretary Of The Navy Variable architecture digital computer
US5293611A (en) * 1988-09-20 1994-03-08 Hitachi, Ltd. Digital signal processor utilizing a multiply-and-add function for digital filter realization
JP2791086B2 (ja) * 1989-03-15 1998-08-27 富士通株式会社 命令プリフェッチ装置
EP0436341B1 (en) * 1990-01-02 1997-05-07 Motorola, Inc. Sequential prefetch method for 1, 2 or 3 word instructions
US5295249A (en) * 1990-05-04 1994-03-15 International Business Machines Corporation Compounding preprocessor for cache for identifying multiple instructions which may be executed in parallel
JP2560889B2 (ja) * 1990-05-22 1996-12-04 日本電気株式会社 マイクロプロセッサ
JP2682761B2 (ja) * 1991-06-18 1997-11-26 松下電器産業株式会社 命令プリフェッチ装置
US5438668A (en) * 1992-03-31 1995-08-01 Seiko Epson Corporation System and method for extraction, alignment and decoding of CISC instructions into a nano-instruction bucket for execution by a RISC computer
JPH06103068A (ja) * 1992-09-18 1994-04-15 Toyota Motor Corp データ処理装置
JPH06250854A (ja) * 1993-02-24 1994-09-09 Matsushita Electric Ind Co Ltd 命令プリフェッチ装置
JP3168845B2 (ja) * 1994-10-13 2001-05-21 ヤマハ株式会社 ディジタル信号処理装置
US5819056A (en) * 1995-10-06 1998-10-06 Advanced Micro Devices, Inc. Instruction buffer organization method and system
JP3655403B2 (ja) * 1995-10-09 2005-06-02 株式会社ルネサステクノロジ データ処理装置
US5710914A (en) * 1995-12-29 1998-01-20 Atmel Corporation Digital signal processing method and system implementing pipelined read and write operations
JP2806359B2 (ja) * 1996-04-30 1998-09-30 日本電気株式会社 命令処理方法及び命令処理装置
KR100940465B1 (ko) * 1998-03-18 2010-02-04 퀄컴 인코포레이티드 디지털 신호처리기

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018012828A1 (ko) * 2016-07-13 2018-01-18 김태형 다기능 연산 장치 및 고속 푸리에 변환 연산 장치
US10949493B2 (en) 2016-07-13 2021-03-16 Tae Hyoung Kim Multi-functional computing apparatus and fast fourier transform computing apparatus

Also Published As

Publication number Publication date
KR20060040748A (ko) 2006-05-10
DK1066559T3 (da) 2005-10-03
AR026079A2 (es) 2002-12-26
AR026081A2 (es) 2002-12-26
JP6300284B2 (ja) 2018-03-28
EP1066559B1 (en) 2005-06-08
JP6152558B2 (ja) 2017-06-28
CN1301363A (zh) 2001-06-27
JP2016146189A (ja) 2016-08-12
CN1279435C (zh) 2006-10-11
KR100896674B1 (ko) 2009-05-14
AR026078A2 (es) 2002-12-26
AR026080A2 (es) 2002-12-26
DE69925720T2 (de) 2006-03-16
JP5677774B2 (ja) 2015-02-25
WO1999047999A1 (en) 1999-09-23
EP1457876A3 (en) 2006-11-02
ATE297567T1 (de) 2005-06-15
HK1035594A1 (en) 2001-11-30
KR20010082524A (ko) 2001-08-30
JP2010282637A (ja) 2010-12-16
DE69925720D1 (de) 2005-07-14
EP1066559A1 (en) 2001-01-10
JP2015028793A (ja) 2015-02-12
JP2002507789A (ja) 2002-03-12
KR100835148B1 (ko) 2008-06-04
CA2324219A1 (en) 1999-09-23
KR20060040749A (ko) 2006-05-10
CN1523491A (zh) 2004-08-25
AU2986099A (en) 1999-10-11
AR026082A2 (es) 2002-12-26
CA2324219C (en) 2011-05-10
EP1457876A2 (en) 2004-09-15
EP1457876B1 (en) 2017-10-04
HK1094608A1 (zh) 2007-04-04

Similar Documents

Publication Publication Date Title
JP5677774B2 (ja) デジタル信号プロセッサ
US6615341B2 (en) Multiple-data bus architecture for a digital signal processor using variable-length instruction set with single instruction simultaneous control
JP2016146189A5 (cg-RX-API-DMAC7.html)
US5922066A (en) Multifunction data aligner in wide data width processor
US6002880A (en) VLIW processor with less instruction issue slots than functional units
US6496920B1 (en) Digital signal processor having multiple access registers
US7308559B2 (en) Digital signal processor with cascaded SIMD organization
US7111155B1 (en) Digital signal processor computation core with input operand selection from operand bus for dual operations
EP2267596B1 (en) Processor core for processing instructions of different formats
JP2002529847A (ja) ビットｆｉｆｏを有するディジタル信号プロセッサ
US7107302B1 (en) Finite impulse response filter algorithm for implementation on digital signal processor having dual execution units
US6820189B1 (en) Computation core executing multiple operation DSP instructions and micro-controller instructions of shorter length without performing switch operation
US6859872B1 (en) Digital signal processor computation core with pipeline having memory access stages and multiply accumulate stages positioned for efficient operation
HK1071611A (en) A digital signal processor using a variable length instruction set
HK1094608B (en) A digital signal processor

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

A201 Request for examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

A107 Divisional application of patent
E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0104 Divisional application for international application

St.27 status event code: A-0-1-A10-A18-div-PA0104

St.27 status event code: A-0-1-A10-A16-div-PA0104

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U12-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

FPAY Annual fee payment

Payment date: 20121227

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

FPAY Annual fee payment

Payment date: 20131227

Year of fee payment: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

FPAY Annual fee payment

Payment date: 20141230

Year of fee payment: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

FPAY Annual fee payment

Payment date: 20151230

Year of fee payment: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

FPAY Annual fee payment

Payment date: 20170706

Year of fee payment: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20180129

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20180129