KR100927014B1 - LCD and its driving method - Google Patents

Abstract

The present invention provides a liquid crystal display device and a method of driving the same, which can prevent a brightening phenomenon at the top of a screen by minimizing a delay amount of a common voltage pulsed to remove an afterimage.

According to an aspect of the present invention, there is provided a liquid crystal display including: a liquid crystal cell matrix, a liquid crystal display panel including a plurality of groups and common electrode line groups for supplying a reference voltage to the liquid crystal cell matrix for each group; A matrix driver for driving the liquid crystal cell matrix; A plurality of common voltage generators supplying voltages to each of the plurality of common electrode line groups, wherein the plurality of common voltage generators supply the reference voltage in an effective pixel signal supply period, and a blank period. It characterized in that for supplying a discharge voltage for discharging the remaining charges in the liquid crystal cell.

Description

Liquid crystal display and its driving method {LIQUID CRYSTAL DISPLAY AND METHOD OF DIRVING THE SAME}             

1 shows a liquid crystal display of a conventional IPS mode.

Fig. 2 is a drive waveform diagram supplied to the common electrode line shown in Fig. 2.

FIG. 3 schematically illustrates a liquid crystal display device in an IPS mode according to a first embodiment of the present invention. FIG.

4 is a detailed circuit diagram illustrating the common voltage generator illustrated in FIG. 3.

FIG. 5 is a diagram of a common voltage waveform supplied to the liquid crystal display panel shown in FIG. 3.

FIG. 6 is a diagram illustrating an arrangement structure of a common voltage supply line supplying a common voltage to the divided common electrode line illustrated in FIG. 3.

FIG. 7 schematically illustrates a liquid crystal display device in an IPS mode according to a second embodiment of the present invention. FIG.

<Description of Symbols for Main Parts of Drawings>

12, 22, 32: liquid crystal display panel 14: gate driver

16: data driver

18, 24, 26, 28, 30, 34, 36, 38: common voltage generator                 

20: amplifier 40: tape carrier package (TCP)

42: gate drive IC

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a driving method thereof, which can prevent a bright phenomenon of an upper end of a screen due to a delay of a common voltage driven by an impulse to remove an afterimage.

The liquid crystal display device displays an image by adjusting the light transmittance of the liquid crystal using an electric field. To this end, the liquid crystal display device includes a liquid crystal display panel having a liquid crystal cell matrix and a driving circuit for driving the liquid crystal display panel.

Such a liquid crystal display includes a twisted nematic (TN) mode for driving a liquid crystal using a vertical electric field and an in-plane switch for driving a liquid crystal using a horizontal electric field according to a direction of an electric field driving a liquid crystal. , IPS) mode. Here, the liquid crystal display of the TN mode is a mode in which the liquid crystal is driven by a vertical electric field between the pixel electrode and the common electrode disposed opposite to the upper and lower substrates, and has a large aperture ratio but a narrow viewing angle. The IPS mode is a mode in which a liquid crystal is driven by a horizontal electric field between a pixel electrode and a common electrode arranged side by side on a lower substrate, and has a large viewing angle, but a small aperture ratio.                         

1 is a plan view equivalently showing a liquid crystal display of a general IPS mode.

The liquid crystal display of the IPS mode shown in FIG. 1 includes a liquid crystal display panel 12 having a liquid crystal cell matrix, a gate driver 14 for driving gate lines GL1 to GLn of the liquid crystal display panel 12. The common voltage is commonly connected to the data driver 16 for driving the data lines DL1 to DLm of the liquid crystal display panel 12 and the common electrode lines CL1 to CLn of the liquid crystal display panel 12. The common voltage generator 18 is provided to supply the common voltage Vcom to the supply line ICL.

The liquid crystal display panel 12 includes a thin film transistor TFT formed at each intersection of the data lines DL1 to DLm and the gate lines GL1 to GLn, and between the thin film transistor TFT and the common electrode line CL. The connected liquid crystal cell is provided.

The thin film transistor TFT is turned on when the scan signal from the gate line GL, that is, the gate high voltage VGH is supplied, and supplies the pixel signal from the data line DL to the liquid crystal cell. The thin film transistor TFT is turned off when the gate low voltage VGL is supplied from the gate line GL to maintain the pixel signal charged in the liquid crystal cell.

The liquid crystal cell includes a pixel electrode connected to the drain electrode of the thin film transistor TFT and a common electrode disposed side by side with the pixel electrode and the liquid crystal interposed therebetween, and connected to the common electrode line CL. Is represented by the liquid crystal capacitor Clc. In addition, the liquid crystal cell further includes a storage capacitor Cst formed at a portion where the pixel electrode and the common electrode overlap with each other so that the charged pixel signal is stably maintained until the next pixel signal is charged. . The liquid crystal cell is formed by a voltage difference between the common voltage Vcom supplied to the common electrode through the common electrode line CL and the pixel signal supplied to the pixel electrode through the thin film transistor TFT and the charged pixel signal. The arrangement state of the liquid crystal having dielectric anisotropy varies according to the horizontal electric field, thereby adjusting grayscale.

The gate driver 14 sequentially supplies scan signals to the gate lines GL1 to GLn so that the thin film transistor TFT connected to the gate lines GL1 to GLn is driven in units of the gate line GL.

The data driver 16 converts digital pixel data from a timing controller (not shown) into an analog pixel signal and supplies it to the data lines DL1 to DLm.

The common voltage generator 16 generates a common voltage Vcom which becomes a reference voltage when driving the liquid crystal cell, and supplies the common voltage Vcom to the common electrode lines CL1 to CLn through the common voltage supply line ICL.

When the horizontal electric field is formed by the pixel electrode and the common electrode in each of the liquid crystal cells of the conventional IPS liquid crystal display, charges by the horizontal electric field are also accumulated in the insulating film between the pixel electrode and the common electrode. As a result of the charges accumulated in the insulating layer, the driving voltage applied to the liquid crystal from the pixel electrode and the common electrode is delayed, thereby causing an afterimage problem in the liquid crystal display of the IPS mode.                         

In order to solve the afterimage problem of the IPS mode liquid crystal display, a method of pulse driving the common voltage Vcom in a blank period in which a valid pixel signal is not supplied to the liquid crystal display panel for each frame has been proposed as shown in FIG. 2. .

Referring to FIG. 2, the common voltage Vcom is leveled down in the blank period BP in response to the data enable signal DE indicating the supply period of the valid pixel data and the blank period BP. The residual image problem is solved by supplying the common voltage Vcom leveled down in the blank period BP to all of the liquid crystal cells through the common electrode to discharge the charges accumulated in the insulating film between the pixel electrode and the common electrode.

However, as shown in FIG. 2, when the common voltage Vcom leveled down in the blank period BP of the previous frame (i-1) F is increased to the normal voltage in the current frame iF, a predetermined voltage is increased. The delay time Δt occurs. The delay time Δt is generated by the line resistance component of the common electrode line CL formed in the liquid crystal display panel and the parasitic capacitor component between the common electrode line CL and the data line DL. Due to this delay time Δt, the common voltage Vcom is distorted at the portion where the effective pixel signal starts to be supplied to the liquid crystal display panel in the current frame iF, resulting in a deterioration of image quality in which the upper portion of the screen appears relatively bright. Doing. Furthermore, since the delay time Δt of the common voltage Vcom becomes longer when the number of liquid crystal cells is increased to display a high resolution image, the brightness of the upper screen becomes worse.

Accordingly, it is an object of the present invention to provide a liquid crystal display device and a driving method thereof capable of preventing a brightening phenomenon at the top of a screen by minimizing a delay amount of a common voltage pulsed to remove residual images.

In order to achieve the above object, the liquid crystal display device according to the present invention comprises a liquid crystal cell matrix and a plurality of groups, the liquid crystal display panel including common electrode line groups for supplying a reference voltage to the liquid crystal cell matrix for each group. and; A matrix driver for driving the liquid crystal cell matrix; A plurality of common voltage generators supplying voltages to each of the plurality of common electrode line groups, wherein the plurality of common voltage generators supply the reference voltage in an effective pixel signal supply period, and a blank period. It characterized in that for supplying a discharge voltage for discharging the remaining charges in the liquid crystal cell.

Each of the liquid crystal cells includes a pixel electrode for charging the pixel signal through a thin film transistor connected to a gate line for supplying a scan signal and a data line for supplying a pixel signal, and a common electrode connected to the common electrode line group. It is characterized by being driven by a horizontal electric field formed.

The common electrode line groups may be separated in the vertical direction.

The common electrode line groups may be separated in a horizontal direction.

A method of driving a liquid crystal display according to the present invention includes supplying a reference voltage to each of a plurality of common electrode line groups included in the liquid crystal cell matrix in a period of supplying an effective pixel signal to the liquid crystal cell matrix; And supplying a discharge voltage for discharging charges remaining in the liquid crystal cells to each of the plurality of common electrode line groups separately in the blank period.

Each liquid crystal cell included in the liquid crystal cell matrix includes a pixel electrode for charging the pixel signal through a thin film transistor connected to a gate line for supplying a scan signal and a data line for supplying the pixel signal, and the common electrode line group. And is driven using a horizontal electric field formed by a common electrode charged with the reference voltage.

Other objects and advantages of the present invention in addition to the above objects will become apparent from the detailed description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 3 to 7.

3 schematically illustrates a liquid crystal display device in an IPS mode according to an embodiment of the present invention.

The liquid crystal display illustrated in FIG. 3 includes a liquid crystal display panel 22 including a plurality of common electrode line groups GCL1 to GCL4 for supplying a common voltage Vcom to a liquid crystal cell matrix, and a common electrode line group GCL1 to A plurality of common voltage generators 24, 26, 28, and 30 are provided to supply the common voltage Vcom to each of the GCL4).

The liquid crystal display panel 22 includes a thin film transistor formed of a switching element at each intersection of data lines and gate lines (not shown), and a liquid crystal cell connected between the thin film transistor and the common electrode line CL.

The thin film transistor supplies and maintains the pixel signal from the data line to the pixel electrode of the liquid crystal cell in response to the scan signal from the gate line. The liquid crystal cell includes a pixel electrode connected to the drain electrode of the thin film transistor, and a common electrode arranged side by side with the pixel electrode and the liquid crystal interposed therebetween, and connected to the common electrode line CL. Represented by (Clc). In addition, the liquid crystal cell further includes a storage capacitor Cst formed at a portion where the pixel electrode and the common electrode overlap each other with an insulating layer therebetween so that the charged pixel signal is stably maintained until the next pixel signal is charged. The liquid crystal cell has a horizontal electric field formed by a voltage difference between the common voltage Vcom supplied to the common electrode through the common electrode line CL and the pixel signal supplied to the pixel electrode through the thin film transistor and the charged pixel signal. Accordingly, the arrangement state of the liquid crystal having dielectric anisotropy is changed to adjust grayscale by adjusting light transmittance.

Here, the common electrode lines CL supplying the common voltage Vcom are divided into a plurality of groups in the vertical direction, for example, the first to fourth common electrode line groups GCL1 to GCL4 as shown in FIG. 3. Divided. The divided first to fourth common electrode line groups GCL1 to GCL4 receive the common voltage Vcom separately from the common voltage generators 24, 26, 28, and 30. As the common electrode lines CL are divided into a plurality of groups, the line resistance of the common electrode line CL may be reduced, and the parasitic capacitor capacity between the common electrode line CL and the data line may be reduced. It becomes possible. Accordingly, it is possible to shorten the delay time [Delta] t during pulse driving of the common voltage Vcom due to the line resistance component and the parasitic capacitor component of the common electrode line CL.

The first to fourth common voltage generators 24, 26, 28, and 30 independently generate the common voltage Vcom and supply the same to the common electrode line groups GCL1 to GCL4. To this end, each of the first to fourth common voltage generators 24, 26, 28, and 30 has a detailed circuit configuration as shown in FIG. 4.

The common voltage generator shown in FIG. 4 responds to the data enable signal DE or the inverted data enable signal NDE from a timing controller (not shown), as shown in FIG. 5, in the effective data supply period. When the cell is driven, the common voltage Vcom, which is a reference voltage, is generated, and in the blank period BP, the leveled down reference voltage Vcom is generated. To this end, the common voltage generator divides the first and second resistors R1 and Rv for dividing the driving voltage VCLD from the power supply unit of the liquid crystal display, and divides them by the first and second resistors R1 and Rv. And an operational amplifier 20 for amplifying and outputting a driving voltage which is variable according to the data enable signal DE or the inverted data enable signal NDE. Here, the level of the common voltage Vcom output from the operational amplifier 20 may be varied by adjusting the resistance of the second resistor Rv, which is a variable resistor.

The common voltage Vcom supplied from each of the common voltage generators 24, 26, 28, and 30 having such a configuration is divided in the vertical direction so that the resistance electrode and the parasitic capacitor component are significantly reduced compared to the conventional common electrode line. It is supplied independently to the groups GCL1 to GCL4. Accordingly, as shown in FIG. 5, the common voltage Vcom leveled down in the blank period BP of the previous frame (i-1) F is leveled up from the start point of the current frame iF to the normal voltage. The delay time [Delta] t can be significantly shortened. Since the common voltage Vcom is supplied to the liquid crystal display panel 22 even at the beginning of the current frame iF due to the shortening of the delay time Δt of the common voltage Vcom, the brightness of the upper part of the screen does not occur. Will not.

Meanwhile, a common electrode in which the common voltage Vcom supplied from each of the first to fourth common voltage generators 24, 26, 28, and 30 illustrated in FIG. 3 is divided in the vertical direction in the liquid crystal display panel 22. For example, a path supplied to each of the line groups GCL1 to GCL4 is illustrated in FIG. 6.

6, a tape carrier package having a gate drive integrated circuit (hereinafter referred to as an IC) 42 for driving gate lines (not shown) of the liquid crystal display panel 22; The liquid crystal display panel 22 is connected to the liquid crystal display panel 22 through a TCP 40 hereinafter. The common voltages Vcom supplied from each of the first to fourth common voltage generators 24, 26, 28, and 30 illustrated in FIG. 3 are different from common voltage supply lines ICL1 to TCP through the TCP 40. Independently supplied to the first to fourth common electrode line groups GCL1 to GCL4 formed in the liquid crystal display panel 22 through ICL4.

FIG. 7 schematically illustrates a liquid crystal display device in an IPS mode according to a second embodiment of the present invention.                     

The liquid crystal display illustrated in FIG. 7 is common to the liquid crystal display panel 32 including the plurality of common electrode line groups GCL1 to GCL3 divided in the horizontal direction, and to each of the common electrode line groups GCL1 to GCL3. A plurality of common voltage generators 34, 36, and 38 supplying the voltage Vcom is provided.

The liquid crystal display panel 32 includes a thin film transistor formed of a switching element at each intersection of data lines and gate lines (not shown), and a liquid crystal cell connected between the thin film transistor and the common electrode line CL.

The thin film transistor supplies and maintains the pixel signal from the data line to the pixel electrode of the liquid crystal cell in response to the scan signal from the gate line. The liquid crystal cell includes a pixel electrode connected to the drain electrode of the thin film transistor, and a common electrode arranged side by side with the pixel electrode and the liquid crystal interposed therebetween, and connected to the common electrode line CL. Represented by (Clc). In addition, the liquid crystal cell further includes a storage capacitor Cst formed at a portion where the pixel electrode and the common electrode overlap each other with an insulating layer therebetween so that the charged pixel signal is stably maintained until the next pixel signal is charged. The liquid crystal cell has a horizontal electric field formed by a voltage difference between the common voltage Vcom supplied to the common electrode through the common electrode line CL and the pixel signal supplied to the pixel electrode through the thin film transistor and the charged pixel signal. Accordingly, the arrangement state of the liquid crystal having dielectric anisotropy is changed to adjust grayscale by adjusting light transmittance.

Here, the common electrode lines CL supplying the common voltage Vcom are divided into a plurality of groups in the horizontal direction, for example, the first to third common electrode line groups GCL1 to GCL3 as shown in FIG. 7. Divided. The divided first to third common electrode line groups GCL1 to GCL3 receive the common voltage Vcom from the common voltage generators 34, 36, and 38 individually. As the common electrode lines CL are divided into a plurality of groups GCL1 to GCL3, the line resistance of the common electrode line CL may be reduced and a parasitic capacitor between the common electrode line CL and the data line. It is possible to reduce the dose.

The first to third common voltage generators 34, 36, and 38 independently generate the common voltage Vcom and supply the common voltage line group GCL1 to GCL3. To this end, each of the first to fourth common voltage generators 34, 36, and 38 has a detailed circuit configuration as shown in FIG. 4. The common voltage generator shown in FIG. 4 responds to the data enable signal DE or the inverted data enable signal NDE from a timing controller (not shown), as shown in FIG. 5, in the effective data supply period. When the cell is driven, the common voltage Vcom, which is a reference voltage, is generated, and in the blank period BP, the leveled-down reference voltage Vcom is generated.

The common voltage Vcom supplied from each of the common voltage generators 34, 36, and 38 is divided in the horizontal direction so that the common electrode line groups GCL1 to GCL3 in which the resistance component and the parasitic capacitor component are significantly reduced compared to the conventional ones. Are supplied independently. Accordingly, as shown in FIG. 5, the common voltage Vcom leveled down in the blank period BP of the previous frame (i-1) F is leveled up from the start point of the current frame iF to the normal voltage. The delay time [Delta] t can be significantly shortened. Since the common voltage Vcom is supplied to the liquid crystal display panel 32 even at the beginning of the current frame iF due to the shortening of the delay time Δt of the common voltage Vcom, the brightness of the upper part of the screen does not occur. Will not.

As described above, in the liquid crystal display and the driving method thereof according to the present invention, the resistance component and the parasitic capacitor component of the common electrode line are supplied by supplying a common voltage to each of the plurality of common electrode line groups divided in the vertical direction or the horizontal direction. Can be reduced. Accordingly, according to the liquid crystal display and the driving method of the IPS mode according to the present invention, the brightness of the upper part of the screen due to the common voltage delay time is reduced by shortening the delay time of the common voltage pulse-driven in the blank period to remove afterimages. It can prevent the image quality can be improved.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (6)

A liquid crystal display panel comprising a liquid crystal cell matrix and a plurality of groups, the common electrode line groups for supplying a reference voltage to the liquid crystal cell matrix for each group; A matrix driver for driving the liquid crystal cell matrix; Comprising a plurality of common voltage generator for supplying a voltage to each of the plurality of common electrode line groups, The plurality of common voltage generators, And a discharge voltage for supplying the reference voltage in an effective pixel signal supply period and a discharge voltage for discharging the remaining charges in the liquid crystal cell in a blank period. The method of claim 1, Each liquid crystal cell included in the liquid crystal cell matrix is A horizontal electric field formed by a pixel electrode for charging the pixel signal through a thin film transistor connected to a gate line for supplying a scan signal and a data line for supplying a pixel signal, and a common electrode connected to the common electrode line group. It is driven, the liquid crystal display device. The method of claim 1, And the common electrode line groups are separated in a vertical direction. The method of claim 1, And the common electrode line groups are separated in a horizontal direction. In the driving method of a liquid crystal display device containing a liquid crystal cell matrix. Supplying a reference voltage individually to each of the plurality of common electrode line groups included in the liquid crystal cell matrix during a period of supplying an effective pixel signal to the liquid crystal cell matrix; And supplying a discharge voltage for discharging charges remaining in the liquid crystal cells to each of the plurality of common electrode line groups individually in a blank period. The method of claim 5, wherein Each liquid crystal cell included in the liquid crystal cell matrix is A pixel electrode charging the pixel signal through a thin film transistor connected to a gate line supplying a scan signal and a data line supplying the pixel signal, and a common electrode connected to the common electrode line group to charge the reference voltage. A drive method of a liquid crystal display device, characterized in that the drive using a horizontal electric field formed by.

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