JP2002055323A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device capable of preventing 'an OFF persistence' to be generated on the display screen of a liquid crystal display element when the power source of the display device is turned OFF. SOLUTION: This device is a liquid crystal display device which is provided with a liquid crystal display element having plural pixels and plural video signal lines applying gradation voltages to the plural pixels and has discharging means which are provided in an area outside a display area and which discharge electric charges stored in the pixels when the power source is interrupted. Moreover, each pixel has active elements and the discharging means have transistors which are provided for every video signal line and which become ON for a fixed time after the power source is interrupted and capacitive elements which are provided for every video signal line and which supply voltages for turning respective active elements of the pixels ON to the respective video signal lines through the transistors when the power source is interrupted.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and, more particularly, to a technique effective when applied to a liquid crystal display panel of an active matrix type liquid crystal display device.

[0002]

2. Description of the Related Art An active matrix type liquid crystal display device having an active element (for example, a thin film transistor) for each pixel and switchingly driving the active element is widely used as a display device of a notebook type personal computer or the like. One of the active matrix type liquid crystal display devices includes a TFT (Th
in Film Transistor type liquid crystal display panel (TFT-
LCD), a drain driver disposed on one side of the long side of the liquid crystal display panel, a gate driver disposed on one side of the short side of the liquid crystal display panel, and a TFT type liquid crystal display comprising an interface unit. Modules are known. Such a liquid crystal display device is described, for example, in Japanese Patent Application No. 10-50699.

[0003]

In the above-described TFT type liquid crystal display module, when the thin film transistor of each pixel arranged in a matrix is turned on, a gradation voltage is applied to each pixel, and the liquid crystal capacitance of each pixel is increased. An image is displayed on the liquid crystal display panel by accumulating charges corresponding to the gradation voltage. Then, when the power of the liquid crystal display module is turned off, the electric charge accumulated in the liquid crystal capacitance of each pixel is discharged via the thin film transistor. However, in general, when forming a thin film transistor, the threshold voltage of the thin film transistor varies. In particular, when a thin film transistor is formed by an amorphous transistor as in a liquid crystal display module, the variation in the threshold voltage is large. Therefore, in the above-described liquid crystal display module, due to the variation in the threshold voltage of the thin film transistor, when the power is turned off, the electric charge accumulated in the liquid crystal capacitance of some pixels is not easily discharged, and the display is not performed until then. There is a problem in that a phenomenon called “off image sticking” occurs in which the image that has been removed appears for a while.

[0004] Even if the light source of the backlight unit that irradiates the liquid crystal display panel with the irradiation light simultaneously with turning off the power supply of the liquid crystal display module is not illuminated, the external light incident on the liquid crystal display panel (if the room is indoors, Illuminating light), this “off-afterimage” occurs. SUMMARY OF THE INVENTION The present invention has been made to solve the problems of the prior art, and an object of the present invention is to provide a liquid crystal display device having an "off image lag" generated on a display screen of a liquid crystal display element when power is turned off. To provide a technology that can prevent the above.
The above objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0005]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows. That is, the present invention includes a plurality of pixels,
A liquid crystal display device comprising a liquid crystal display element having a plurality of video signal lines for applying a gradation voltage to the plurality of pixels, wherein the liquid crystal display element is provided in a region outside a display region, and A discharge unit that discharges the electric charge stored in the pixel. Further, in a preferred embodiment of the present invention, the image processing apparatus further includes a video signal line driving unit that supplies a gradation voltage to each of the video signal lines, and the discharging unit is connected to the video signal line driving unit of each of the video signal lines. Provided at an end opposite to the end to be formed. In a preferred embodiment of the present invention, each of the pixels has an active element, and the discharging unit is provided for each of the video signal lines.
A transistor which is turned on for a certain period of time after power-off and is provided for each of the video signal lines, and supplies a voltage for turning on an active element of each of the pixels to each of the video signal lines through each of the transistors at the time of power-off. A capacitor.

[0006] In a preferred embodiment of the present invention,
The discharging unit is supplied with a first common wiring electrode to which a reference voltage is supplied during normal operation, a second common wiring electrode to which a negative voltage is supplied during normal operation, and a positive voltage during normal operation. A third transistor having a third common wiring electrode, a first transistor, a second transistor, and a capacitor provided for each video signal line, wherein the first transistor provided for each video signal line is One electrode is connected to one electrode of a capacitive element provided for each of the video signal lines, a second electrode is connected to each of the drain signal lines, and a control electrode is connected to the second common wiring electrode. The second provided for each signal line
In the transistor, the first electrode is provided on one electrode of the capacitive element provided for each of the video signal lines, the second electrode is provided on the second common wiring electrode, and the control electrode is provided on the third common wiring electrode. And the other electrode of the capacitive element provided for each of the video signal lines is connected to the first common wiring electrode.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. In all the drawings for describing the embodiments of the present invention, components having the same functions are denoted by the same reference numerals, and their repeated description will be omitted. First Embodiment <Basic Configuration of Liquid Crystal Display Module of First Embodiment of the Present Invention> FIG. 1 is a block diagram showing a basic configuration of a TFT type liquid crystal display module of the present embodiment. As shown in FIG. 1, the liquid crystal display module according to the present embodiment includes a liquid crystal display panel 10, a display control device 110, a power supply circuit 12
0, a drain driver section 130, and a gate driver section 140. The liquid crystal display panel 10 includes a TFT substrate on which a pixel electrode, a thin film transistor, and the like are formed;
A filter substrate on which a counter electrode, a color filter, and the like are formed is overlapped with a predetermined gap therebetween, and both substrates are bonded together with a sealing material provided in a frame shape near a peripheral portion between the two substrates. Liquid crystal is sealed and sealed inside a seal material between the two substrates from a liquid crystal sealing opening provided in a part of the material, and further, a polarizing plate is stuck outside the two substrates.
The drain driver section 130 is composed of a plurality of drain drivers each composed of a semiconductor integrated circuit device (IC). Similarly, the gate driver section 140 is composed of a plurality of gates each composed of a semiconductor integrated circuit device (IC). Consists of a driver. Here, a semiconductor chip (IC) constituting a drain driver and a gate driver
Is the so-called Tape Carrier Package
The liquid crystal display panel 10 is mounted on one of the transparent substrates of the liquid crystal display panel 10 by a chip-on-film method or a chip-on-film method.

<Configuration of liquid crystal display panel 10 shown in FIG. 1>
FIG. 2 is a diagram showing an equivalent circuit of an example of the liquid crystal display panel 10 shown in FIG. As shown in FIG. 2, the liquid crystal display panel 10 has a plurality of pixels formed in a matrix. Each pixel includes two adjacent signal lines (a drain signal line (D) or a gate signal line (G)) and two adjacent signal lines (a gate signal line (G) or a drain signal line (D)). And is arranged in the intersection area with. Each pixel has a thin film transistor (TFT1, TFT2), and the source electrode of the thin film transistor (TFT1, TFT2) of each pixel is connected to the pixel electrode (ITO1). Since a liquid crystal layer is provided between the pixel electrode (ITO1) and the common electrode (ITO2), a liquid crystal capacitance (CLC) is equivalently provided between the pixel electrode (ITO1) and the common electrode (ITO2). Connected. Furthermore, thin film transistors (TFT1,
An additional capacitor (CADD) is connected between the source electrode of the TFT 2) and the previous gate signal line (G).

FIG. 3 is a diagram showing an equivalent circuit of another example of the liquid crystal display panel 10 shown in FIG. In the example shown in FIG.
An additional capacitance (CADD) is formed between the gate signal line (G) in the preceding stage and the source electrode, but in the equivalent circuit of the example shown in FIG. 2, between the common signal line (CN) and the source electrode. The difference is that a storage capacitor (CSTG) is formed. Although the present invention can be applied to both, in the former method, the former gate signal line (G) pulse jumps into the pixel electrode (ITO1) via the additional capacitance (CADD), whereas the latter method. In this case, since there is no dive, better display is possible. 2 and 3, A
R is a display area, and FIGS. 2 and 3 are circuit diagrams, which are drawn corresponding to the actual geometric arrangement.

In the liquid crystal display panel 10 shown in FIGS. 2 and 3, the drain electrodes of the thin film transistors (TFT1, TFT2) of each pixel arranged in the column direction are connected to a drain signal line (D), respectively. The line (D) is connected to a corresponding drain driver of the drain driver unit 130 that applies a gradation voltage to the liquid crystal layer of each pixel in the column direction. Further, the gate electrodes of the thin film transistors (TFT1, TFT2) in each pixel arranged in the row direction are connected to a gate signal line (G), respectively, and each gate signal line (G) is connected for one horizontal scanning time in the row direction. The gate electrodes of the thin film transistors (TFT1 and TFT2) of each pixel have a high-level (hereinafter simply referred to as H-level) selective scanning drive voltage and a low-level (hereinafter simply referred to as L-level) non-selection. It is connected to a corresponding gate driver of the gate driver section 140 that supplies a scanning drive voltage.

<Outline of Operation of Liquid Crystal Display Module of Present Embodiment> The display control device 110 is composed of one semiconductor integrated circuit (LSI), and receives a clock signal, a display timing signal, and a horizontal signal transmitted from a computer main body. The drain driver and the gate driver of the drain driver unit 130 and the gate driver unit 140 are controlled based on the display control signals of the synchronization signal and the vertical synchronization signal and the display data (RGB). Drive. The gate driver 140, based on the frame start instruction signal (FLM) and the shift clock (CL3) sent from the display control device 110,
An H level selection scanning voltage is sequentially supplied to each gate signal line (G) of the liquid crystal display panel 10. Thereby, the plurality of thin film transistors (TFT1, TFT2) connected to each gate signal line (G) of the liquid crystal display panel 10 conduct for one horizontal scanning time.

The drain driver is a display control device 110
The display data transmitted from the display control device 110 is sequentially latched based on a start pulse (display data capture start signal) transmitted from the display control device 110 and a display data latch clock (CL2). The drain driver supplies a gray scale voltage corresponding to the latched display data to each drain signal line (D) based on the output timing control clock (CL1) sent from the display control device 110, and supplies one horizontal A gradation voltage (a gradation voltage corresponding to display data) is applied to the liquid crystal capacitance (CLC) of each pixel through the thin film transistors (TFT1, TFT2) that are conductive during the scanning time.
Accumulates the charge corresponding to. By the above operation, an image is displayed on the liquid crystal display panel 10. The power supply circuit 120 shown in FIG. 1 supplies a positive gradation reference voltage and a negative gradation reference voltage to each drain driver, and supplies a thin film transistor (TFT1, T1) to the gate driver 40.
A scanning drive voltage to be applied to the gate electrode of FT2) is supplied. In the present embodiment, the power supply circuit 120 includes:
A voltage of Vcom, a voltage of VGL, and a voltage of VGH, which will be described later, are supplied to a common wiring electrode in a discharge unit which will be described later. The display control device 110 and the power supply circuit 120
Is mounted on the controller board.

<Characteristic Configuration of Liquid Crystal Display Module of Present Embodiment> FIG. 4 shows a liquid crystal display panel 10 of the present embodiment.
FIG. 3 is a diagram showing a circuit configuration of FIG. FIG. 4 shows only one thin film transistor (TFT). As shown in the figure, in the present embodiment, when the power of the liquid crystal display module is turned off, the liquid crystal is accumulated in the liquid crystal capacitance (CLC) of each pixel in an area outside the display area AR of the liquid crystal display panel 10. There is provided a discharge unit (discharge means of the present invention) for discharging the electric charge. This discharge unit is connected to a reference voltage (FIG. 4).
Then, the first common wiring electrode 51 for supplying the voltage of Vcom applied to the common electrode (ITO2) and the L level voltage (VGL; VEE which is a minus voltage in FIG. 4)
And a third common wiring electrode 21 for supplying an H-level voltage (VGH; VLCD which is a positive voltage in FIG. 4). The voltages supplied to these common wiring electrodes (21, 22, 51) are supplied from the power supply circuit 120 shown in FIG.

Further, for each drain signal line (D), a first transistor 31, a second transistor 32,
A capacitance element 41 is provided. First transistor 31
Is that the drain electrode 31d is on the drain signal line (D), the source electrode 31s is on one electrode 411 of the capacitor 41,
Gate electrode 31g is connected to second common wiring electrode 22. In the second transistor 32, the drain electrode 32d is connected to the gate electrode 31g of the first transistor 31, and the source electrode 32s is connected to the source electrode 31 of the first transistor 31.
At s, the gate electrode 32g is connected to the third common wiring electrode 21. The other electrode 412 of the capacitance element 41 is maintained on the first common wiring electrode 51.

Hereinafter, the operation of the discharge section of the present embodiment will be described. During normal operation (that is, when the power supply of the liquid crystal display module is turned on), an H-level VGH voltage is applied to the gate electrode 32g of the second transistor 32 from the third common wiring electrode 21. The second transistor 32 is turned on. Accordingly, the capacitance element 41
The second electrode 412 is set to a voltage of Vcom,
1 is charged to the voltage of VGL. However, the L level VGL voltage is applied to the gate electrode 31g of the first transistor 31 from the second common wiring electrode 22, so that the first transistor 31 is turned off. Accordingly, the voltage of VGL of the first electrode 411 of the capacitor 41 is not applied to the drain signal line (D), and a normal display state is maintained.

When the power is turned off (ie, when the power of the liquid crystal display module is turned off), the drain signal line (D),
The potentials of the first common wiring electrode 51, the second common wiring electrode 22, and the third common wiring electrode 21 are all equal to the ground potential (GN).
D). At this time, a voltage of the ground potential (GND) is applied to both the gate electrode 31g of the first transistor 32 and the gate electrode 32g of the second transistor 32. The source electrode 31s of the first transistor 32 and the source electrode 32s of the second transistor 32 are connected to the first electrode 411 of the capacitor 41. The first electrode 411 of the capacitor 41 Since the transistor is charged to the L level voltage (VGL) during normal operation, both the first transistor 31 and the second transistor 32 are turned on.

However, the on-resistance between the source and the drain of the first transistor 31 (R1) and the on-resistance between the source and the drain of the second transistor 32 (R2)
When there is a relationship of the following equation (1),
When the on-resistance (R2) between the source and the drain of the transistor 32 is larger than the on-resistance (R1) between the source and the drain of the first transistor 31, the electric charge of the capacitor 41 mainly becomes the first resistance. Through the transistor 31.

R1≪R2 (1) As a result, the voltage of the first electrode 411 of the capacitive element 41 becomes It is applied to the signal line (D). As a result, all thin film transistors (TFTs) in the display area
Since a ground potential (GND) is applied to the gate electrode and an L level VGL voltage is applied to the drain electrode, the thin film transistor (TFT) is turned on, and the electric charge accumulated in the pixel (that is, the pixel capacitance (CLC ) Is rapidly discharged. As a result, the present embodiment makes it possible to prevent “off-afterimage”, which is a conventional problem.

The channel width and channel length of the first transistor 31 are W1 and L1, respectively, and the channel width and channel length of the second transistor 32 are W1 and W2, respectively.
When L2 and L2, the above equation (1) can be expressed as the following equation (2).

L1 / W1≪L1 / W2 (2) As can be seen from the equation (2), the above equation (1) is satisfied. To achieve this, the channel width (W1) of the first transistor 31 is set to be larger than the channel width (W1) of the second transistor 32, and the channel length (L1) of the first transistor 31 is set to the second value. May be smaller than the channel length (L2) of the transistor 32 of FIG. For example, if the channel lengths of the first transistor 31 and the second transistor 32 are the same, the channel width (W1) of the first transistor 31 is larger than the channel width (W1) of the second transistor 32. Alternatively, if the channel widths of the first transistor 31 and the second transistor 32 are the same, the channel length (L1) of the first transistor 31 is made larger than the channel length (L2) of the second transistor 32. May also be reduced.

In the present embodiment, the H-level VGH voltage supplied to the third common wiring electrode 21 is:
It is necessary that the voltage be such that the second transistor can be turned on during normal operation. Also, the first common wiring electrode 51
And the voltage supplied to the second common wiring electrode 22 is (V
The voltage of (GL−Vcom + GND) needs to be set lower than the threshold voltage (VTH) of the second transistor 32. Further, in the present embodiment, the above-described discharge unit is provided near the end of the drain signal line (D) farther from the connection end with the drain driver 60. This makes it possible to increase the time constant for discharging the capacitor 41. In general, in the liquid crystal display panel 10, a pair of diodes is provided for each drain signal line (D) in order to prevent the thin film transistors (TFT1, TFT2) from being destroyed by static electricity during the manufacturing process. In order to reliably operate the discharge unit of the present embodiment, the discharge unit of the present embodiment needs to be provided on the side opposite to the above-described diode.

Hereinafter, an actual layout pattern of the discharge section of the present embodiment will be described with reference to FIGS. 5A to 9, FIG. 5A is a plan pattern diagram, and FIG. 5B is a cross-sectional view showing a cross-sectional structure taken along the line AA ′ shown in FIG. 5 to FIG.
In the above, the dimensions of the first transistor 31 and the second transistor 32 are actually formed so as to satisfy the expression (1) (or the expression (2)).
6 to 9 show almost the same dimensions. In the layout pattern shown in FIG. 5, the glass substrate (SUB1) of the TFT substrate is placed on the glass substrate (SUB1) of the TFT substrate.
On the side opposite to the side where the drain driver of B1) is provided,
Each common wiring electrode is formed in the order of the first second common wiring electrode 22a, the first common wiring electrode 51, the third common wiring electrode 21, and the second second common wiring electrode 22b.
Here, these common wiring electrodes (21, 22a, 22)
b, 51) is composed of, for example, an aluminum film.

On these common wiring electrodes, a gate insulating film (GI) made of, for example, a silicon nitride film is formed. On the gate insulating film (GI) on the first second common wiring electrode 22a and the third common wiring electrode 21, the first
And a second semiconductor layer (AS1, AS2).
The electrode (DD1) extending along the first second common wiring electrode 22a from the drain signal line (D) to the first semiconductor layer (AS1) forms a drain electrode of the first transistor 31. An electrode (DD) extending from the first semiconductor layer (AS1) to the second semiconductor layer (AS2)
2) a source electrode of the first transistor 31 and a source electrode of the second transistor;
Of the second electrode 412.

Here, as shown in FIG. 6A, this electrode (DD2) has a portion on the first common wiring electrode 51,
It protrudes along the extension direction of the first common wiring electrode 51, whereby the capacitance value of the capacitance element is set to an optimum value. An electrode (DD) extending from the second semiconductor layer (AS2) to the second second common wiring electrode 22b
3) constitutes the drain electrode of the second transistor 32, and one end of this electrode (DD3) is electrically connected to the second common wiring electrode 22 via the contact hole (CH). . Finally, a protective layer (OC) is provided on these electrodes. Note that these electrodes and semiconductor layers are formed by the same steps as those for manufacturing the liquid crystal display panel.

In the layout pattern shown in FIG. 6, the electrode (DD3) shown in FIG.
2b, this electrode (DD)
3) is contact hole (CH1), protective layer (OC)
The point that it is electrically connected to the second second common wiring electrode 22b via the transparent conductive film (ITO) formed thereon and the contact hole (CH2) is different from the layout pattern shown in FIG. Different.

In the layout pattern shown in FIG.
On the common wiring electrode 51, the third common wiring electrode 21, and the second second common wiring electrode 22b, for example, an oxide film (SI) made of an anodic oxide film is provided, and a semiconductor layer (AS) is formed. 5 is different from the layout pattern shown in FIG. 5 in that it is provided to extend from the first second common wiring electrode 22a to the second second common wiring electrode 22b. Therefore, in the layout pattern shown in FIG. 7, the second second common wiring electrode 22b and the electrode (DD)
3) Contact hole (CH1) for electrical connection with
Is provided over both the gate insulating film (GI) and the semiconductor layer (AS). Further, for example, a transparent conductive film (I) is formed on the oxide film (SI) of the first common wiring electrode 51.
TO), an electrode (DD4) composed of a gate insulating film (GI) and a semiconductor layer (A).
S) and a contact hole (CH
3) is connected to the electrode (DD2). Further, the second second common wiring electrode 22b is also made of a transparent conductive film (ITO).

In the layout patterns shown in the figures, the gate length direction of the first and second transistors (31, 32) is the extension direction of the drain signal line (D).
The layout pattern shown in FIG. 8 is a layout pattern in which the gate length direction of the first and second transistors (31, 32) extends in the direction in which the common wiring electrodes (21, 22a, 22b, 51) extend. In the layout pattern shown in FIG. 8, as shown in FIG. 8A, the drain signal line (D) also serves as the drain electrode of the first transistor, and the electrodes (DD2, DD3) are shown in FIG. The width is smaller than that shown.

In the layout pattern shown in FIG. 9, the second common wiring electrode 22b is deleted, and the common wiring electrodes are replaced with the first common wiring electrode 51 and the second common wiring electrode 2b.
2, in that there are three third common wiring electrodes 21,
This is different from the layout pattern shown in FIG. for that reason,
In the layout pattern shown in FIG. 9, the electrode (DD3)
Are located on the gate insulating film (GI) and the second common wiring electrode 2
2 to the second semiconductor layer (AS2), and
One end is electrically connected to the second common wiring electrode 22 via a contact hole (CH).

In the above-described embodiment, the case where the first transistor 31 and the second transistor are constituted by thin film transistors has been described. However, the first transistor 31 and the second transistor 32
It is possible to use an OS transistor or the like. When the first transistor 31 and the second transistor 32 are configured by CMOS transistors or the like, the source electrode 32s of the second transistor 32 is connected to the first transistor 32s.
By connecting the drain electrode 32d of the second transistor 32 to the source electrode 31s of the first transistor 31 to the gate electrode 31g of the transistor 31 and the gate-source voltage of the second transistor at power-off, Since the voltage is 0 V, the second transistor 32 can be turned off when the power is turned off. In each of the above embodiments, the embodiment in which the present invention is applied to the vertical electric field type liquid crystal display panel has been described. However, the present invention is not limited to this, and the present invention is also applicable to the horizontal electric field type liquid crystal display panel. It is possible. As described above, the invention made by the inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and can be variously modified without departing from the gist of the invention. Of course, it is.

[0028]

The effects obtained by typical ones of the inventions disclosed in the present application will be briefly described as follows. ADVANTAGE OF THE INVENTION According to the liquid crystal display device of this invention, it becomes possible to prevent "off-afterimage" at the time of power-off.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a basic configuration of a TFT type liquid crystal display module according to an embodiment of the present invention.

FIG. 2 is a diagram showing an equivalent circuit of an example of the liquid crystal display panel shown in FIG.

FIG. 3 is a diagram showing an equivalent circuit of another example of the liquid crystal display panel shown in FIG.

FIG. 4 is a circuit diagram illustrating a configuration of a discharge unit according to the embodiment of the present invention.

FIG. 5 is a diagram showing an example of a specific layout pattern of the charge discharging unit shown in FIG.

6 is a diagram showing another example of a specific layout pattern of the charge discharging unit shown in FIG.

FIG. 7 is a diagram showing another example of a specific layout pattern of the charge discharging unit shown in FIG.

8 is a diagram showing another example of a specific layout pattern of the charge discharging unit shown in FIG.

9 is a diagram showing another example of a specific layout pattern of the charge discharging unit shown in FIG.

[Explanation of symbols]

10 ... Liquid crystal display panel (TFT-LCD), 31, 32
... Transistors, 41 ... Capacitance elements, 21, 22, 51 ...
Common wiring electrode, 60: drain driver, 110: display control device, 120: power supply circuit, 130: drain driver unit, 140: gate driver unit, D: drain signal line (video signal line or vertical signal line), G: gate Signal line (scanning signal line or horizontal signal line), ITO1 ... pixel electrode, ITO2 ... common electrode, CN ... common signal line, TFT
... thin film transistor, CLC ... liquid crystal capacitance, CSTG ... storage capacitance, CADD ... additional capacitance, CH ... contact hole, D
D: electrode, AS: semiconductor layer, GI: gate insulating film, SI
... oxide film, OC ... protective layer.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI theme coat ゛ (reference) G09G 3/36 G02F 1/136 500 F term (reference) 2H092 GA51 GA60 JA24 JA41 JB22 JB31 JB61 KA05 NA25 PA06 PA08 PA11 PA13 2H093 NA16 NA41 NA51 NC01 NC26 NC41 NC52 ND12 5C006 AA16 AF67 BB16 BC12 BC20 BF04 BF43 EA01 EB05 FA22 FA34 5C080 AA10 BB05 DD05 EE29 FF11 JJ02 JJ06

Claims (5)

[Claims] 1. A liquid crystal display device comprising: a liquid crystal display element having a plurality of pixels and a plurality of video signal lines for applying a gradation voltage to the plurality of pixels, wherein the liquid crystal display element has a display area. A liquid crystal display device comprising: a discharge unit provided in an outside region and discharging electric charges accumulated in the pixel when power is turned off. 2. A video signal line driving means for supplying a gradation voltage to each of the video signal lines, wherein the discharging means is opposite to an end of each of the video signal lines connected to the video signal line driving means. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is provided at an end on the side. 3. Each of the pixels has an active element, and the discharging unit is provided for each of the video signal lines, and is provided for each of the video signal lines, and a transistor which is turned on for a predetermined time after power is turned off. 3. The capacitor according to claim 1, further comprising a capacitor that supplies a voltage for turning on an active element of each pixel to each of the video signal lines through each of the transistors when the power supply is cut off. 4. Liquid crystal display device. 4. A discharging circuit comprising: a first common wiring electrode to which a reference voltage is supplied during a normal operation; a second common wiring electrode to which a negative voltage is supplied during a normal operation; A third common wiring electrode to which a voltage is supplied; a first transistor provided for each video signal line;
A first transistor provided for each video signal line, wherein a first electrode is provided on one electrode of a capacitor provided for each video signal line; Are connected to the drain signal lines, and control electrodes are connected to the second common wiring electrodes. A second transistor provided for each video signal line has a first electrode connected to each video signal line. A second electrode is connected to the second common wiring electrode, a control electrode is connected to the third common wiring electrode, and a capacitance element is provided for each of the video signal lines. 3. The liquid crystal display device according to claim 1, wherein the other electrode is connected to the first common wiring electrode. 5. The liquid crystal display according to claim 1, wherein said discharging means is formed in said liquid crystal display element by the same process as said liquid crystal display element. apparatus.