KR100924623B1 - Contact structure and production method thereof and probe contact assembly using same - Google Patents

Abstract

The present invention relates to a connection structure for establishing an electrical connection with a connection target. The connecting structure is formed of a connector carrier and a plurality of connectors. The connector carrier includes a slide plate for locking the connector on the connector carrier. The connector has an upper end having a cutout that engages the slide plate, a lower end oriented in the opposite direction to the upper end and serving as a connection point for electrical connection with the connection target, and a diagonal provided between the upper end and the lower end to serve as a spring. Has a beam portion. In another aspect, the connector is first mounted on the connector adapter, and the connector adapter is attached to the connector carrier.

Splice structure, connector, connector carrier, connector adapter, cutout

Description

CONNECTION STRUCTURE AND PRODUCTION METHOD THEREOF AND PROBE CONTACT ASSEMBLY USING SAME

The present invention relates to a connection structure, a method for manufacturing the same, and a probe connection assembly using the connection structure, and in particular, to a connection structure having a plurality of connectors in a vertical direction, and to a connection probe assembly, a probe card, an IC chip, or another connection mechanism. A method is provided for fabricating a plurality of such interconnect structures in a horizontal direction on a semiconductor wafer to form the same interconnect structure and for removing the connectors from the wafer to be mounted in a vertical direction on the substrate.

In testing high density, high speed electrical devices such as LSI and VLSI circuits, high performance connection structures such as probe cards with multiple connectors should be used. In other applications, connection structures can be used for IC packages or IC leads.

The present invention relates to structures for use in testing and burn-in LSI and VLSI chips, semiconductor wafers and dies, packaged semiconductor devices, printed circuit boards, and the like, as well as processes for manufacturing such interconnect structures. The present invention can also be applied to other purposes such as leads or terminal pins of IC chips, IC packages or other electronic devices. However, for simplicity and simplicity of explanation, the present invention is primarily described for semiconductor wafer testing.

In the case where the semiconductor device being tested is in the form of a semiconductor wafer, a semiconductor test system, such as an IC tester, is usually connected to a substrate handler such as an automatic wafer probe to automatically test the semiconductor wafer. Such an example is shown in FIG. 1, where the semiconductor test system typically has a test head 100 in a separate housing and electrically connected to the test system by cable bundle 110. The test head 100 and the substrate handler 400 are mechanically and electrically connected to each other through the interface component 140 with the aid of the manipulator 500 driven by the motor 510. The semiconductor wafer under test is automatically provided to the test position of the test head 100 by the substrate handler 400.

On the test head 100, the semiconductor wafer under test is provided with a test signal generated by the semiconductor test system. The resulting output signal from the semiconductor wafer under test (IC circuit formed on the semiconductor wafer) is transferred to the semiconductor test system. In a semiconductor test system, the output signal from the wafer is compared with expected data to determine if the IC circuit on the semiconductor wafer is functioning properly.

1 and 2, the test head 100 and the substrate handler 400 are connected through an interface component consisting of a performance board 120, coaxial cable, pogo pins, and a connector. The performance board 120 is a printed circuit board having a circuit connection inherent in the electrical footprint of the test head 100. The test head 100 includes a plurality of printed circuit boards 150 corresponding to a plurality of test channels (test pins) of a semiconductor test system. The printed circuit boards 150 each have a connector 160 for receiving corresponding connection terminals 121 mounted on the performance board 120.

A “frog” ring 130 (pogo pin block) is connected to the performance substrate 120 to accurately determine the location of connection to the substrate handler 400. The prog ring 130 has a plurality of connection pins 141, such as a ZIF connector or a pogo pin, connected to the connection terminal 121 via a coaxial cable 124.

As shown in FIG. 2, the test head 100 is positioned above the substrate handler 400 and connected to the substrate handler via the interface component 140. Within the substrate handler 400, the semiconductor wafer 300 to be tested is mounted on a chuck 180. In this example, the probe card 170 is provided over the semiconductor wafer 300 to be tested. The probe card 170 has a plurality of probe connectors 190 (such as cantilevers or needles) for connecting with a connection target such as a circuit terminal or pad in an IC circuit on the semiconductor wafer 300 under test.

The electrode (connection pad) of the probe card 170 is electrically connected to the connection pin 141 provided on the programming ring 130. The connecting pin 141 is also connected to the connecting terminal 121 of the performance board 120 through the coaxial cable 124, and each connecting terminal 121 is connected to the corresponding printed circuit board of the test head 100. 150). In addition, the printed circuit board 150 is connected to the semiconductor test system via a cable 110 having, for example, hundreds of inner cables.

Under this arrangement, the probe connector 190 (needle) connects with the surface (connection target) of the semiconductor wafer 300 on the chuck 180 to apply a test signal to the semiconductor wafer 300 and the resulting output from the wafer 300. Receive the signal. As discussed above, the resulting output signal from the semiconductor wafer 300 under test is compared with expected data generated by the semiconductor test system to determine if the IC circuit on the semiconductor wafer 300 is operating properly.

3 is a bottom view of the probe card 170 of FIG. In this example, the probe card 170 has an epoxy ring to which a plurality of probe connectors 190 called needles or cantilevers are mounted. When the chuck 180 mounted with the semiconductor wafer 300 moves upward in FIG. 2, the tip of the connector 190 connects with a pad or bump (connection target) on the wafer 300. The end of the needle 190 is connected to a wire 194 connected to a delivery line (not shown) formed on the probe card 170. The delivery line is connected to a plurality of electrodes 197 (connection pads) in communication with the pogo pin 141 of FIG.

Typically, the probe card 170 is constructed by a multi-layer polyimide substrate having a ground plane, a power plane, and signal transmission lines on many layers. As is known in the art, the signal transmission lines are characterized by a balanced characteristic, such as 50 Ω, with balanced parameters, i.e., the dielectric constant and magnetic permeability of the polyimide, the inductance and capacitance of the signal path within the probe card 170, respectively. It is designed to have an impedance. Thus, the signal lines are impedance matched to establish a high frequency transmission bandwidth for the wafer 300 for supplying current in steady state and a high current peak generated by the device's output switching in the transition state. To remove the noise, capacitors 193 and 195 are provided between the power plane and the ground plane on the probe card.

An equivalent circuit of the probe card 170 is shown in FIG. As shown in FIGS. 4A and 4B, the signal transmission line on the probe card 170 is from the electrode 197, the strip (impedance matching) line 196, and the wire 194. Extends into connector 190 (needle). Since the wire 194 and the connector 190 are not impedance matched, these portions are considered as the inductor L in the high frequency band as shown in Fig. 4C. Since the total length of wire 194 and connector 190 is about 20-30 mm, significant limitations will be created from the inductor when testing the high frequency performance of the device under test.

Other factors limiting the frequency bandwidth in the probe card 170 remain in the power and ground connectors shown in FIGS. 4D and 4E. If the power line can supply a sufficiently large current to the device under test, it will not severely limit the operating bandwidth in testing the device. However, a series of connected wires 194 and needles 190 for supplying power (FIG. 4D) and a series of connected wires 194 and connectors 190 for grounding power and signals ( Since Fig. 4 (e) corresponds to the inductor, the high speed current flow is severely limited.

In addition, capacitors 193 and 195 are provided between the power line and the ground line to ensure proper performance of the device under test by filtering out noise or surge pulses on the power line. Capacitor 193 has a relatively large value, such as 10 kW, and can be disconnected from the power line by a switch if necessary. Capacitor 195 has a relatively small capacitance value, such as 0.01 mA, and is fixedly connected in close proximity to the DUT. These capacitors function as high frequency decoupling on the power lines. In other words, the capacitor limits the high frequency performance of the probe connector.

Thus, as described above, the most widely used probe connectors are limited to a frequency bandwidth of approximately 200 MHz, which is insufficient for testing modern semiconductor devices. In the industry, frequency bandwidths above 1 GHz are considered necessary in the near future. In addition, there is a need in the industry to be able to handle 32 or more of a plurality of semiconductor devices, especially memories, in parallel with increasing the test throughput of the probe card.

In the prior art, the probe card and probe connector as shown in Figure 3 are made manually, resulting in inconsistent quality. Such non-uniform qualities include variations in size, frequency bandwidth, connectivity, resistance, and the like. In a conventional probe connector, another factor that makes the connection performance unreliable is the temperature change at which the probe connector and the semiconductor wafer under test have different temperature expansion rates. Thus, under varying temperatures, the connection positions between them change, adversely affecting the connection force, the connection resistance and the bandwidth. Therefore, there is a need for a new concept of interconnect structure that can satisfy the needs of next-generation semiconductor test technology.

It is therefore an object of the present invention to provide a connection structure having a plurality of connectors for electrically connecting with a connection target with high reliability as well as high frequency bandwidth, high pin count and high connection performance.

It is another object of the present invention to provide a connector structure having a plurality of connectors, in which the connector and the connector carrier can be easily assembled by using a locking mechanism including a sliding plate.

Another object of the present invention is to provide a connecting structure formed of a connector carrier and a plurality of connectors, wherein the connector is easily and reliably mounted on the connector carrier by use of a connector adapter.

Another object of the present invention is to provide a connection structure for establishing an electrical connection with a plurality of semiconductor devices for simultaneously testing the semiconductor devices in parallel.

Another object of the present invention is to provide a method for providing a plurality of connectors on a silicon substrate in a two-dimensional manner, removing the connectors from the substrate, and mounting the connectors on the connection substrate in a three-dimensional manner to form the connection structure. It is.

In the present invention, the connecting structure is formed by a plurality of connectors manufactured on the flat surface of the dielectric substrate such as the silicon substrate by photolithography technique. The interconnect structures of the present invention are advantageously applied to test and burn-in LSI and VLSI chips, semiconductor wafers and dies, packaged ICs, printed circuit boards and the like. The connection structure of the present invention can also be used as a component of electronic devices such as IC leads and pins.

A first aspect of the invention is a connection structure for establishing an electrical connection with a connection target. The connecting structure is formed of a connector carrier and a plurality of connectors. The connector includes a vertically oriented top end having a cutout to establish a locking mechanism, a lower end oriented in an opposite direction to the top end functioning as a connection point for electrical connection with the connection target, and an upper end to function as a spring. It has a diagonal beam portion provided between the lower ends.

A second aspect of the invention is a connection structure formed of a connector carrier and a plurality of connectors. The connector is mounted on the connector carrier via the connector adapter. The connector has an upper end oriented in the vertical direction, a lower end serving as a connection point for electrical connection with the connecting target, and a diagonal beam portion provided between the upper end and the lower end to serve as a spring.

A third aspect of the invention is a method of making a connector on a silicon substrate in a two-dimensional manner and removing it from there to establish the connection structure. Various manufacturing methods are used to manufacture the connector on the flat surface of the substrate. The connector is removed from the substrate and mounted on the connector carrier.

Another aspect of the second invention is a probe connection assembly comprising the connection structure of the invention. The probe connection assembly comprises a connector carrier having a plurality of connectors mounted on a surface, a probe card for mounting the connector carrier to establish an electrical connection between the connector and the electrode provided on the probe card, and a pin block on the probe card. When attached, it is formed of a pin block having a plurality of connecting pins for connecting between the probe card and the semiconductor test system. Each connector is a structure as described above for the first aspect of the invention.

According to the invention, the connecting structure has a plurality of connectors which are easily and securely mounted on the connector carrier by use of a displacement locking mechanism or connector adapter. The connection structure has a very high frequency bandwidth and can achieve constant quality of connection performance, high reliability and long life, and low cost. In addition, since the connector is mounted on the same substrate material as the device under test, it is possible to compensate for the position error caused by the temperature change.

Further, according to the present invention, the manufacturing process can manufacture a plurality of connectors in the horizontal direction on the silicon substrate by using a relatively simple technique. Such a connector is assembled by removing it from the substrate and mounting it vertically on the connection substrate, then using the cutout on the top of the contact and sliding the top layer of the carrier. The connection structure produced by the present invention is low cost, high efficiency, high mechanical strength and reliability.

A first embodiment of the present invention will now be described in detail with reference to Figs. It should be understood that the description of the present invention includes terms such as "horizontal" or "vertical". The present inventors use these terms to describe the relative positional relationship of the components associated with the present invention. Therefore, the interpretation of the terms "horizontal" or "vertical" should not be limited to absolute meanings such as ground horizontal or gravity vertical.

5A and 5B show an example of the connecting structure of the first embodiment of the present invention. The connection structure is constituted by a connector carrier 20 and a connector 30. In the application of a semiconductor test, the connecting structure is positioned over a semiconductor device, such as, for example, the semiconductor wafer 300 being tested. When the silicon wafer 300 is moved upward, the lower end of the connector 30 connects with the connection pad 320 on the semiconductor wafer 300 to establish electrical communication therebetween.

The connector carrier 20 consists of a system carrier 22 and a slide plate (layer) 25. The slide plate 25 locks the connector 30 on the connector carrier 20 by sliding (displacing) on the system carrier 22. FIG. 5A shows the situation before locking the connector 30 on the connector carrier 20, and FIG. 5B shows the situation in which the connector 30 has been locked on the connector carrier by displacing the slide plate 25. FIG. The connector carrier 20 is preferably made of silicone or a dielectric material such as polyamide, ceramic or glass. The system carrier 22 and the slide plate 25 both have through holes for mounting the connector 30.

5A and 5B, each connector 30 is composed of an upper end 33 (base), a diagonal beam (spring) portion 32, and a lower end 35 (connection). Each connector 30 is manufactured such that the upper end 33 of the connector has a cutout 39 (locking groove) for receiving the slide plate 25 to lock the connector on the connector carrier 20. Preferably, a stopper 38 is provided in each connector 30 to reliably mount the connector 30 on the connector carrier 20. That is, the stopper 38 limits the upward movement of the connector 30 by engaging the bottom surface of the system carrier 22. The stopper 38 also functions to securely lock the connector 30 on the connector carrier 20 together with the slide plate 25 when the slide plate 25 is fitted in the cutout 39.

The diagonal beam portion 32 extends diagonally from the upper end 33 to the lower end 35. The upper end 33 and the lower end 35 serve as a connection point for establishing electrical communication with other components. In semiconductor test applications, the upper end 33 functions to connect with the probe card of the test system, and the lower end 35 functions to connect with a connection target such as a connection pad on the semiconductor wafer 300.

In order to assemble the connector 30 on the connector carrier 20, the connector 30 is first inserted into the through hole created on the slide plate 25 and the system carrier 22. For this purpose, the slide plate 25 is horizontally displaced on the surface of the system carrier 22 such that the through holes on the slide plate 25 and the through holes on the system carrier are mated with each other on the same vertical axis. In the example of Figure 5A, the slide plate 25 is located on the right side. In FIG. 5B, after inserting all the connectors into the through holes on the system carrier and the slide plate, the slide plate 25 is displaced in a horizontal position toward the left to be inserted into the nodule of the connector 30. Thus, the connector 30 is locked on the connector carrier 20.

5C shows another example of the connecting structure of the present invention. In this example, the connector carrier 20 consists of a system carrier 22, an upper carrier 24, a slide plate 25, an intermediate carrier 26, and a bottom carrier 28. The connector carrier 20 is preferably made of a dielectric material such as silicon or polyimide, ceramic or glass. The system carrier 22 supports the top, middle and bottom carriers with some space therebetween.

The upper carrier 24, the intermediate carrier 26, and the bottom carrier 28 each have through holes for mounting the connector 30. The slide plate 25 is slidably provided on the upper carrier 24 in the horizontal direction. In the same manner described above with reference to FIGS. 5A and 5B, the slide plate 25 also has a through hole for inserting the connector 30. After inserting the connector 30 into the through hole on the upper carrier 24 and the slide plate 25, the slide plate 25 is fitted with the slide plate in the cutout 39 of the connector 30. Is displaced toward the left to lock. Such locking mechanisms (displacement-locking mechanisms) and processes will be described in more detail later with reference to FIGS. 12A-12C.

In FIG. 5C, each connector 30 has an overall upper end 33 (base), a diagonal beam (spring) portion 32, a straight beam portion 36, a lower end 35 (connection), and a return portion 37. It has a cantilevered shape consisting of. Each connector 30 is manufactured such that the upper end 33 of the connector has a cutout 39 for receiving the slide plate 25 on the upper carrier 24. Preferably, stoppers 34 and 38 are provided in each connector 30 to reliably mount the connector 30 on the connector carrier 20. The stopper 38 restricts upward movement of the connector by engaging the upper carrier 24, and the stopper 34 restricts downward movement of the connector 30 by engaging with the intermediate carrier 26.

Diagonal beam portion 32 extends diagonally between top portion 33 and straight beam portion 36. The straight beam portion 25 extends downward between the diagonal beam portion 32 and the lower end 35. The upper end 33 and the lower end 35 serve as connection points for establishing electrical communication with other components. In semiconductor test applications, the upper end 33 functions to connect with the probe card of the test system, and the lower end 35 functions to connect with a connection target such as the connection pad 320 on the semiconductor wafer 300.

The return portion 37 extends upwardly from the lower end 35 in parallel with the straight beam portion 36. In other words, the return portion 37 and the straight beam portion 36 constitute a space S, a gap therebetween at an approximate position inserted into the through hole of the bottom plate carrier 28. This structure ensures a sufficient width for the through hole on the bottom carrier 28 and allows flexibility when the connector 30 is deformed. This is effective when the connector is pressed against the connection target and will be described in detail later with reference to FIGS. 7A and 7B.

The connector 30 is mounted on the connector carrier 20 through a through hole provided in the connector carrier. In this example, the upper carrier 24, the slide plate 25, the intermediate carrier 26, and the bottom carrier 28 each include a through hole for receiving the connector 30 therein. The upper end 33 protrudes from the upper surface of the upper carrier 24, and the lower end 35 protrudes from the lower surface of the bottom carrier 28. The slide plate 25 can slide on the upper carrier 24 to engage the cutout 39 on the upper end of the connector 30, thereby locking the connector 30 on the connector carrier 20.

The middle portion of the connector 30 can be loosely coupled to the intermediate carrier 26. Thus, the connector 30 can move in the middle portion and the lower portion when the upper end is locked on the upper carrier 24. When the connection structure is pressed against a connection target, such as a connection pad 320 on the semiconductor wafer 300, the connector 30 is deformed to achieve the spring action described below.

The diagonal beam (spring) portion 32 of the connector serves as a spring to create resilience when the lower end 35 is pressed against the connection target. The lower end 35 (connection point) of the connector 30 is preferably sharpened to rub against the surface of the connection pad 320. Resilience enhances such a frictional effect on the surface of the connection pad 320 at the lower end 35. The friction effect improves the connection performance when the connection point rubs with the metal oxide surface layer of the connection pad 320 such that the connection point is electrically connected with the conductive material of the connection pad 320 under the metal oxide surface layer.

6 (a) and 6 (b) show the basic concept of the present invention for manufacturing such a connector. In the present invention, as shown in Fig. 6A, the connector 30 is manufactured in the horizontal direction on the flat surface of the substrate 40, that is, parallel to the flat surface of the substrate 40. In other words, the connector 30 is formed on the substrate 40 in a two-dimensional manner. The connector 30 is then removed from the substrate 40 and mounted on the connector carrier 20 shown in FIGS. 5A and 5B in a vertical direction, ie in a three-dimensional manner. Typically, the substrate 40 is a silicon substrate, but other substrates using dielectric materials are also possible.

In the example of Figs. 6A and 6B, as described above, the connector 30 is manufactured in the horizontal direction on the flat surface of the substrate 40. As shown in Figs. Then, in the example of Fig. 6B, the connector 30 is transferred from the substrate to the adhesive member 90 such as an adhesive tape, adhesive film or adhesive plate (collectively "adhesive tape"). In the next process, the connector 30 on the adhesive tape 90 is removed therefrom, for example by the use of a pick and place mechanism, on a connector carrier 20 of FIGS. 5A-5C, ie in a three-dimensional manner. Is mounted.

FIG. 7A shows a detailed view of the connector 30 of the present invention for use within the connection structure of FIGS. 5A and 5B. 7B and 7C show detailed views of the connector 30 of the present invention for use within the connection structure of FIG. 5C. FIG. 7B shows a front view of the connector 30 when no pressure is applied, and FIG. 7C shows a front view of the connector 30 when the pressure is applied to the connection structure by being pressed against the connection target.

As described above with reference to FIGS. 5A and 5B, the connector 30 of FIG. 7A includes an upper end 33 (base), a diagonal beam (spring) portion 32, and a lower end 35 (connection) having a cutout. Have In the example of FIGS. 7B and 7C, the connector 30 has an upper end 33 (base) with a cutout, a diagonal beam (spring) portion 32, a straight beam portion 36, a lower end 35 (connection), and It has a return part 37. On each connector 30, a cutout 39 is provided in the upper end 33 to accommodate the slide plate 25 on the connector carrier 20 to lock the connector in place.

In the semiconductor test application, the upper end 33 is connected with the probe card of the test system as shown in FIG. 13, and the lower end 35 is connected with the connection target such as the semiconductor wafer under test. When mounted on the connector carrier 20 of FIG. 5C, the upper end 33 protrudes from the upper surface of the upper carrier 24 of the connector carrier 20, and the lower end 35 is the bottom carrier of the connector carrier 20. Protrudes from the lower surface of 28).

In the front view of FIG. 7B, the diagonal beam portion 32 and the straight beam portion 36 preferably have a width less than the width of the upper end 33 or the lower end 35 to promote spring action. The space S (gap) between the return portion 37 and the straight beam portion 36 further enhances the spring action, as shown in Fig. 7C. That is, the space S allows horizontal movement of the straight beam portion 36 and the diagonal beam portion 32 in the manner shown in FIG. 7C. Because of the reduced width and the space S formed in the beam portions 32, 36 and the lower end 35, the diagonal beam portion 32 and the straight beam portion 36 are reduced when the connector 30 is pressed against the connection target. Easily deformed

8A to 8L are schematic diagrams showing examples of manufacturing processes for manufacturing the connector 30 of the present invention. In Figure 8A, a sacrificial layer 42 is formed on a substrate 40, which is typically a silicon substrate. Other substrates are possible, such as glass substrates and ceramic substrates. The sacrificial layer 42 is made of, for example, silicon oxide (SiO ₂ ) through a deposition process such as chemical vapor deposition (CVD). The sacrificial layer 42 is to separate the connector 30 from the silicon substrate at a later stage of the fabrication process.

An adhesion promoting layer 44 is formed on the sacrificial layer 42 as shown in FIG. 8B, for example, via an evaporation process. Examples of materials for the adhesion promotion layer 44 include, for example, chromium (Cr) and titanium (Ti) having a thickness of about 200-1,000 mm 3. The adhesion promotion layer 44 is to facilitate adhesion of the conductive layer 46 of FIG. 8C on the silicon substrate 40. Conductive layer 46 is made of copper (Cu) or nickel (Ni), for example, having a thickness of about 1,000-5,000 mm 3. Conductive layer 46 is then to establish the conductivity for the electroplating process at the stage.

In the next process, photoresist layer 48 is formed on conductive layer 46 that is precisely aligned such that photomask 50 is exposed to ultraviolet (UV) light as shown in FIG. 8D. Photo mask 50 shows a two-dimensional image of connector 30 to be developed on photoresist layer 48. As is known in the art, positive and negative photoresists can be used for this purpose. If a positive acting resist is used, the photoresist covered by the opaque portion of the mask 50 hardens (cures) after exposure. Examples of photoresist materials include novolac (M-cresol-formaldehyde), PMMA (poly methyl methacrylate), SU-8, and photosensitive polyimide. In the developing process, the exposed portion of the resist is dissolved and washed, leaving the photoresist layer 48 of FIG. 8E having an opening or pattern ("A"). Thus, the top view of FIG. 8F shows a pattern or opening (“A”) on the photoresist layer 48 with the image (shape) of the connector 30.

In the above photolithography process, it is also possible to expose the photoresist layer 48 with electron beams or X-rays, as known in the art, instead of UV light. It is also possible to directly record an image of the connecting structure on the photoresist layer 48 by exposing the photoresist 48 with a direct recording electron beam, X-ray, or light source (laser).

Conductive materials such as copper (Cu), nickel (Ni), aluminum (Al), rhodium (Rh), palladium (Pd), tungsten (W) or other metals, nickel-cobalt (NiCo) or other alloy compounds thereof As shown at 8g, it is deposited (electroplated) in a pattern ("A") of photoresist layer 48 to form connector 30. Preferably, the connection material of the conductive layer 46 and other connection materials should be used to distinguish the etching features from one another as will be described later. The plated portion of the connector 30 of FIG. 8G is removed in the polishing (planarization) process of FIG. 8H.

The above-described process can be repeated to produce connectors having different thicknesses by forming two or more conductive layers. For example, some portions of the connector 30 may be designed to have a thicker thickness than other portions. In such a case, after forming the first layer of the connector (conductive material), if necessary, the process of FIGS. 8D-8H will be repeated to form a second layer or another layer on the first layer of the connector.

In the next process, the photoresist layer 48 is removed in a resist stripping process as shown in FIG. 8I. Typically, photoresist layer 48 is removed by a wet chemical process. Other examples of stripping include acetone stripping and plasma O ₂ It is stripping. In FIG. 8J, the sacrificial layer 42 is etched such that the connector 30 is separated from the silicon substrate 40. Another etching process is performed such that the adhesion promoting layer 44 and the conductive layer 46 are removed from the connector 30 as shown in FIG. 8K.

Etching conditions may be selected to etch layers 44 and 46 but not to etch connector 30. In other words, to etch the conductive layer 46 without etching the connector 30, as described above, the conductive material used for the connector 30 should be different from the material of the conductive layer 46. Finally, the connector 30 is separated from any other material as shown in the perspective view of FIG. 8L. 8A to 8L show only one connector 30 in the actual manufacturing process as shown in FIGS. 6A and 6B, but a plurality of connectors are manufactured at the same time.

9A to 9D are schematic diagrams showing examples of manufacturing processes for manufacturing the connector of the present invention. In this example, the adhesive tape 90 is integrated into the manufacturing process to transfer the connector 30 from the silicon substrate 40 to the adhesive tape. 9A-9D show only the second half of the manufacturing process with which the adhesive tape 90 is involved.

FIG. 9A shows a process corresponding to the process shown in FIG. 8I, wherein photoresist layer 48 is removed in a resist stripping process. Then, also in the process of FIG. 9A, an adhesive tape 90 is positioned on the top surface of the connector 30 such that the connector 30 is adhered to the adhesive tape 90. As described above with reference to Fig. 6B, within the scope of the present invention, the adhesive tape 90 includes other types of adhesive members such as adhesive films and adhesive plates and the like. The adhesive tape 90 also includes any member for sucking the connector 30 such as a magnetic plate or tape, an electrically charged plate or tape, and the like.

In the process shown in FIG. 9B, the sacrificial layer 42 is etched such that the connector 30 on the adhesive tape 90 is separated from the silicon substrate 40. Another etching process is performed such that the adhesion promoting layer 44 and the conductive layer 46 are removed from the connector 30 as shown in FIG. 9C.

As mentioned above, in order to etch the conductive layer 46 without etching the connector 30, the conductive material used for the connector 30 must be different from the material of the conductive layer. Although the manufacturing process of Figs. 9A to 9C shows only one connector, a plurality of connectors are manufactured simultaneously in the actual manufacturing process. Thus, a plurality of connectors 30 are delivered to the adhesive tape 90 and separated from the silicon substrate and other materials as shown in the plan view of FIG. 9D.

10A to 10N are schematic diagrams showing another example of a manufacturing process for manufacturing the connector 30, in which the connector is delivered with an adhesive tape. In FIG. 10A, an electroplated seed (conductive) layer 342 is formed on a substrate 340, which is typically a silicon or glass substrate. Seed layer 342 is made of copper (Cu) or nickel (Ni), for example, having a thickness of about 1,000-5,000 mm 3. A chromium-inconel layer 344 is formed on the seed layer 342 as shown in FIG. 10B, for example, through sputtering fixation.

In the next process of FIG. 10C, a conductive substrate 346 is formed on the chromium-inconel layer 344. Conductive layer 346 is made of nickel-cobalt (NiCo), for example, having a thickness of about 100-130 μm. After passivating the conductive substrate 346, a photoresist layer 348 having a thickness of about 100-120 mu m is formed on the conductive substrate 346 of FIG. 10d, and the photo mask 348 is formed of a photoresist layer ( 348 is precisely aligned to be exposed to ultraviolet (UV) light as shown in FIG. 10E. Photo mask 350 shows a two-dimensional image of connector 30 to be developed on the surface of photoresist layer 348.

In the developing process, the exposed portion of the resist is dissolved and washed, leaving the photoresist layer 348 of FIG. 10F with the plating pattern transferred from the photo mask 350 having the image (shape) of the connector 30. In step 10G, the connector material is electroplated in a plating pattern on photoresist layer 348 to a thickness of about 50-60 μm. An example of a conductive material is nickel-cobalt (NiCo). The nickel-cobalt connector material will not adhere strongly to the conductive substrate 346 made of nickel-cobalt.

In the case where the connector has two or more different thicknesses, the above-described process may be repeated to make the connector by forming two or more conductive layers. That is, after forming the first layer of the connector, if necessary, the process of FIGS. 10D-10G is repeated to form a second layer or another layer on the first layer of the connector.

In the next process, photoresist layer 348 is removed in a resist stripping process as shown in FIG. 10H. In FIG. 10I, conductive substrate 346 is stripped from chrome-inconel layer 344 on substrate 340. Conductive substrate 346 is a thin substrate on which connector 30 is mounted with a relatively weak adhesive strength. A plan view of the conductive substrate 346 having the connector 30 is shown in FIG. 10J.

10K shows the process by which the adhesive tape 90 is placed on the top surface of the connector 30. The adhesive strength between the adhesive tape 90 and the connector 30 is greater than the adhesive strength between the connector 30 and the conductive substrate 346. Thus, once the adhesive tape 90 is removed from the conductive substrate 346, the connector 30 is transferred from the conductive substrate 346 to the adhesive tape 90 as shown in FIG. 10L. FIG. 10M shows a top view of an adhesive tape 90 having a connector 30 thereon, and FIG. 10N shows a cross-sectional view of an adhesive tape 90 having a connector 30 thereon.

11A and 11B are schematic diagrams showing an example of a process for picking up the connector 30 from the adhesive tape 90 and placing the connector on the connector carrier 20. The pick and place mechanism of FIGS. 11A and 11B is advantageously applied to a connector manufactured by the manufacturing process of the present invention described with reference to FIGS. 9A-9D and 10A-10N including an adhesive tape. 11A is a front view of the pick and place mechanism 80 showing the first half process of pick and place operation. 11B is a front view of the pick and place mechanism 80 showing a second half process of pick and place operation.

In this example, the pick and place mechanism 80 includes a delivery mechanism 84 that picks up and positions the connector 30 and a moving arm 86 that allows movement of the delivery mechanism 84 in the X, Y, and Z directions. 87, tables 81 and 82 whose positions can be adjusted in the X, Y and Z directions, and a monitor camera 78 having, for example, a CCD image sensor therein. The delivery mechanism 84 includes a suction arm 85 that performs suction (pinch operation) and suction release operation (positioning operation) for the connector 30. The suction force is generated by a negative pressure, for example a vacuum. Suction arm 85 rotates within a predetermined angle, such as 90 °.

In operation, the adhesive tape 90 with the connector 30 and the connector carrier 20 with the joining position 32 (or through hole) are provided on the respective tables 81 and 82 on the pick and place mechanism 80. Is located on. As shown in FIG. 11A, the delivery mechanism 80 picks up the connector 30 from the adhesive tape 90 by the suction force of the suction arm 85. After picking up the connector 30, the suction arm 85 is rotated by 90 °, for example, as shown in FIG. 11B. Thus, the orientation of the connector 30 changes from the horizontal direction to the vertical direction. Such an orientation mechanism is merely an example, and a person skilled in the art knows that there are many other ways of changing the orientation of the connector. The delivery mechanism 80 positions the connector 30 on the connector carrier 20. The connector 30 is attached to the connector carrier 20 using a sliding plate on the carrier to lock the connector and the carrier after the connector is inserted into the through hole.

12A to 12C are schematic diagrams showing a process for assembling and locking the connector 30 reliably on the connector carrier 20 by use of the slide plate (layer) 25. The slide plate 25 is fitted with a cutout 39 formed on the top of the connector 30. As shown in FIG. 12A, the connector carrier 20 has a slide plate 25 on the system carrier 22. The through holes 29 of the slide plate 25 and the through holes 23 of the system carrier 22 are mated with each other on the same vertical axis. Spacers 27 may be inserted into the gap between slide plate 25 and system carrier 22 to maintain the position of slide plate 25.

The connector 30 is then positioned through the through holes 23 and 29 on the system carrier 22 and the slide plate 25 as shown in FIG. 12B. The cutout 39 of the connector 30 is located on the same vertical position as the slide plate 25 on the connector carrier 20. The stopper 38 formed in the middle portion of the connector 30 suppresses the upward movement of the connector when engaged with the bottom surface of the system carrier 22.

After all the connectors 30 have been inserted into the through holes, the spacers 27 are removed from the connector carrier 20 to allow the slide plate 25 to elastically move backwards to the left. Thus, the slide plate 25 is fitted in the cutout 39 on the top of the connector 30 as shown in Fig. 12C. By inserting the slide plate 25 into the cutout 39, the connector 30 and the connector carrier 20 are easily and reliably assembled. In addition, if the connector carrier 20 does not have a mechanism for elastically moving the slide plate 25 described above, the slide plate 25 can be manually displaced to the left, and by using the spacer 27 It is held in the left position in the side opposite to the position of 12b.

Figure 13 is a sectional view showing an example of the entire laminated structure for forming the probe connection assembly using the connection structure of the present invention. The probe connection assembly is used as the interface between the device under test (DUT) and the test head of the semiconductor test system as shown in FIG. In this example, the probe connection assembly includes a path board 260 (probe card) and a pogo pin block 130 (programming) provided over the connection structure to the extent shown in FIG.

The connection structure is constituted by a plurality of connectors 30 mounted on the connector carrier 20. The upper end 33 (base) of each connector 30 protrudes from the upper surface of the connector carrier 20. The lower end 35 (connection) protrudes from the lower surface of the connector carrier 20. In the present invention, the diagonal beam (spring) portion 32 between the upper end 33 and the middle portion has a cantilever shape inclined upward from the middle plate carrier 26. The connector 30 may be inserted slightly loosely in the through hole on the connector carrier 20 in a manner that allows small movement in the vertical and horizontal directions when pressed against the semiconductor wafer 300 and the probe card 260.

The probe card 260, the pogo pin block 130, and the connection structure are mechanically and electrically connected to each other to form a probe connection assembly. Thus, an electrical passage from the connection point of the connector 30 to the test head 100 via the cable 124 and the performance board 120 (FIG. 2) is created. Thus, when the semiconductor wafer 300 and the probe connection assembly are pressed against each other, electrical communication will be established between the DUT (connection pad 320 on the wafer 300) and the test system.

Pogo pin block 130 (programming) corresponds to that shown in FIG. 2 with a plurality of pogo pins for connecting between probe card 260 and performance board 120. A cable 124, such as a coaxial cable and an upper end of the pogo pin, is connected through the performance board 120 to a signal to a printed circuit board 150 (pin electronic card) in the test head 100 of FIG. The probe card 260 has a plurality of electrodes 262, 265 on its upper and lower surfaces.

When assembled, the base 33 (upper end) of the connector 30 connects with the electrode 262. Electrodes 262 and 265 are connected through interconnect traces 263 to extend the pitch of the connecting structure to reach the pitch of the pogo pins in the pogo pin block 130. Since the connector 30 is loosely inserted into the through hole of the connector carrier 20, the diagonal beam portion 32 of the connector 30 is easily deformed, when the electrode 262 and the pressure are pressed against the semiconductor wafer 300. The elastic connection force is generated toward the connection pad 320.

14 is a cross-sectional view showing another example of the probe connection assembly using the connection structure of the present invention. In this example, the probe connection structure includes a conductive elastomer 250, a probe card 260, and a pogo pin block 130 (program ring) provided over the connection structure. Since the connector 30 has a diagonal beam (spring) portion as described above to create elasticity in the vertical direction, such a conductive elastic body is usually unnecessary. However, the conductive elastomer is still useful for compensating (flatness) the nonuniformity of the gap between the probe card 260 and the connecting structure.

The conductive elastomer 250 is provided between the connecting structure and the probe card 260. When assembled, the upper end 33 of the connector 30 contacts the conductive elastic body 250. The conductive elastic body 250 is an elastic sheet having a plurality of conductive wires 252 in the vertical direction. For example, the conductive elastomer 250 is comprised of a silicone rubber sheet and multiple rows of metal filaments 252. The metal filament 252 (wire) is provided in the vertical direction of FIG. 14, ie perpendicular to the horizontal sheet of the conductive elastic body 250. As shown in FIG. An example of the pitch between the metal filaments is 0.05 mm or less, and the thickness of the silicone rubber sheet is about 0.2 mm. Such conductive elastomers are Japan Shin-Itzu Polymer Co., Ltd. Manufactured by LTI and commercially available.

A second embodiment of the present invention will now be described in detail with reference to Figs. Fig. 15 is a sectional view showing an example of the connecting structure of the second embodiment of the present invention. The connection structure is constituted by a connector carrier 420, a connector adapter 425, and a plurality of connectors 430. In the application of the semiconductor test, when the silicon wafer 300 is moved upward, the lower end of the connector 430 connects with the connection pad 320 on the semiconductor wafer 300 to establish electrical communication therebetween.

Connector carrier 320 and connector adapter 425 are made of a dielectric material such as silicon or polyimide, ceramic, and glass, for example. The connector 430 is made of or coated with a conductive material. Two or more connectors 430 are attached to the connector adapter 425, and the connector adapter is attached to the connector carrier 420. Two or more connector adapters 25 each having a plurality of connectors 430 are attached to a connector carrier, details of which will be described later with reference to FIGS. 17A-17D.

In Fig. 15, each connector 430 is composed of an upper end 433 (base), a diagonal (spring) portion 432, and a lower end 435 (connection). A stopper 438 is provided to each connector 430 at a predetermined distance from the upper end 433 to reliably mount the connector 430 on the connector adapter 425. That is, the top portion 433 and the stopper 438 form cutouts 439 (FIGS. 16A-16C) that fit into grooves 427 on the connector adapter 425. In other words, the distance between the top end 433 and the stopper 438 is formed to be approximately equal to the thickness of the connector adapter 425. Cutout 439, connector adapter 425, and connector carrier 420 create a locking mechanism for securely and easily mounting connector 430 on connector carrier 420.

Diagonal portion 432 extends diagonally from top portion 433 to bottom portion 435. Top portion 433 and bottom portion 435 serve as a connection point for establishing electrical communication with other components. In semiconductor test applications, the upper end 433 functions to connect with the probe card of the test system, and the lower end 435 functions to connect with a connection target such as the connection pad 320 on the semiconductor wafer 300.

As discussed above, connector 430 is mounted on connector carrier 420 via connector adapter 425. Top portion 433 and bottom portion 435 protrude from the top and bottom surfaces of connector adapter 425, respectively. The diagonal (spring) portion 432 of the connector 430 functions as a spring that generates an elastic force when the lower end 435 is pressed against a connection target such as the connection pad 320. The lower end 435 (connection point) of the connector 430 is preferably sharpened to rub against the surface of the connection pad 320. The elastic force enhances such a frictional effect on the surface of the connection pad 320 at the lower end 435. The friction effect enhances the connection performance when the connection point 435 rubs with the metal oxide surface layer of the connection pad 320 to electrically connect with the conductive material of the connection pad 320 under the metal oxide surface layer.

16A to 16C show examples of the shape of the connector 430 of the present invention. As described above with reference to Fig. 15, the connector 430 has an upper end 433 (base), a diagonal (spring) portion 432, and a lower end 435 (connection). The cutout 439 (depression) is formed by the top end 433 and the stopper 438 so that the connector 430 can fit snugly in a groove formed on the connector adapter 425.

In the example of Figure 16A, diagonal portion 432 is a straight beam extending diagonally to enhance spring action. In the example of FIG. 16B, the diagonal portion 432 is bent in a zigzag fashion at an intermediate position to promote spring action. In the example of FIG. 16C, cutout 439 is formed only on one side of the top of connector 430. Many other shapes of connectors can be used within the connection structure of the present invention as long as they have a structure that is appropriately attached to the connector adapter 425.

Preferably, diagonal portion 432 has a smaller width and / or thickness than top portion 433 to promote spring action. Because of the reduced width and diagonal portion 432, the connector 430 can easily deform when pressed against the connection target. As described above with reference to FIGS. 6 and 8-10, the connector 430 is fabricated in the horizontal direction on the horizontal surface of the silicon substrate. To achieve such a thickness difference of the connector 430, the process for depositing the conductive material will be repeated in the manufacturing process described above with reference to FIGS.

17A-17D are schematic diagrams illustrating a process for reliably mounting a connector 430 on a connector carrier 420 using the connector adapter 425. As shown in Fig. 17A, the connector 430 has cutouts 439 (recessions) on both sides of its upper portion. The cutout 439 has a predetermined length (distance between the upper end 433 and the stopper 438) to securely attach to the connector adapter 425.

The connector adapter 425 has a groove 427 and a stopper 426 as shown in Fig. 17B. The cutouts 439 of the connector 430 and the grooves 427 of the connector adapter 425 are manufactured to fit snugly against each other. That is, the width and thickness of cutout 439 of connector 430 is made equal to the width and thickness of groove 427 on connector adapter 425. Further, the distance between the top end 433 of the connector and the stopper 438 is made equal to the thickness of the connector adapter 425. The connector adapter 425 has a stopper 426 (stepped portion) to be fitted with the connector carrier 420.

17C, connector 430 is mounted on connector adapter 425 by fitting cutout 439 into groove 437. In FIG. When mounted, connector adapter 425 and connector 430 are coplanar with one another on the front surface of FIG. 17C. Adhesives (not shown) may be applied to the connector 430 and the connector adapter 425 to be securely fixed to each other.

In FIG. 17D, a connector adapter 425 having a plurality of connectors 430 is inserted into the connector carrier 420. In the example of FIG. 17D, the connector carrier 420 has a plurality of slots 424 that receive a connector adapter 425 to which the connector 430 is mounted. Each slot has a step 428 (stopper) that engages with the stopper 426 of the connector adapter 425. By inserting the connector adapter 425 with the connector 430 into the slot 424 of the connector carrier 420, the connector 430 and the connector carrier 420 are reliably and easily assembled with each other. The stopper 426 of the connector adapter 425 contacts the stepped portion 428 formed in the slot 424 to determine the vertical position of the connector 430.

Figure 18 is a cross sectional view showing an example of the entire laminated structure for forming the probe connection assembly using the connection structure of the second embodiment of the present invention. The probe connection assembly is used as an interface between the device under test (DUT) and the semiconductor test system as shown in FIG. In this example, the probe connection assembly includes a path board 260 (probe card) and a pogo pin block 130 (program ring) provided over the connection structure to the extent shown in FIG.

The connection structure is constituted by a plurality of connectors 430 mounted on the connector carrier 420. An upper end 433 (base) of each connector 430 protrudes from an upper surface of the connector carrier 420. The lower end 435 (connection) protrudes from the bottom surface of the connector carrier 420. Connector 430 is inserted into slot 424 on connector carrier 420 via connector adapter 425. As described above, the diagonal (spring) portion 433 extends in the diagonal direction between the upper end 433 and the lower end 435. Diagonal portion 432 creates an elastic force when pressed against semiconductor wafer 300.

The probe card 260, the pogo pin block 130, and the connection structure are mechanically and electrically connected to each other to form a probe connection assembly. Thus, an electrical passage is created from the connection point of the connector 430 to the test head 100 via the cable 124 and the performance board 120 (FIG. 2). Thus, when the semiconductor wafer 300 and the probe connection assembly are pressed against each other, electrical communication will be established between the DUT (connection pad 320 on the wafer 300) and the test system.

Pogo pin block 130 (programming), probe card 260, and cable 124 are the same as shown in FIGS. 13 and 14, and through performance board 120 in test head 100 of FIG. The signal is transmitted to the printed circuit board 150 (pin electronic card). When assembled, the upper end 433 of the connector 430 connects with the electrode 262 of the probe card. Since the connector 430 mounted on the connector carrier 420 has a diagonal portion 432, the connector 430 is easily deformed toward the connection pad 320 when pressed against the semiconductor wafer 300, thereby providing a connection force. Create

Fig. 19 is a sectional view showing another example of the probe connection assembly using the connection structure of the second embodiment of the present invention. In this example, the probe connection assembly includes a conductive elastomer 250 in addition to the probe connection assembly of FIG. The conductive elastomer 250 is provided between the connecting structure and the probe card 260. When assembled, the upper end 433 of the connector 430 connects with the conductive elastic body 250. As described above with reference to Fig. 14, the conductive elastic body 250 is an elastic sheet such as silicone rubber having a plurality of conductive wires 252 in the vertical direction.

According to the present invention, the interconnect structure has a very high frequency bandwidth to meet the test requirements of next-generation semiconductor technology. In the first embodiment, the connecting structure is easily and securely formed by a displacement locking mechanism in which the connector is locked on the connector carrier by the slide plate. In the second embodiment, the connecting structure is easily and securely formed by mounting the connector on the connector carrier via the connector adapter. Since a plurality of connectors are manufactured on the substrate at the same time without involving manual handling, it is possible to achieve a constant quality of connection performance, high reliability and long life.

Although only preferred embodiments have been specifically shown and described herein, it is to be understood that many modifications and variations of the present invention are possible in light of the above teachings and within the scope of the appended claims without departing from the spirit and intended scope of the invention. You have to understand.

1 is a schematic diagram showing the structural relationship between a substrate handler and a semiconductor test system having a test head.

2 illustrates an example of a more detailed structure for connecting a test head of a semiconductor test system to a substrate handler through an interface component.

Figure 3 is a bottom view showing an example of a probe card having an epoxy ring for mounting a plurality of probe connectors in the prior art.

4A to 4E are circuit diagrams showing an equivalent circuit of the probe card of FIG.

5A-5C are schematic diagrams showing an example of the connecting structure of the present invention using a connector manufactured in the horizontal direction on a substrate and mounted vertically on the connector.

6 (a) and 6 (b) are schematic diagrams showing the basic concept of the manufacturing method of the present invention, in which a plurality of connectors are formed on a flat surface of the substrate and removed therefrom for later processing.

7A to 7C are diagrams showing details of the connector of the present invention, and FIGS. 7A and 7B are front views of a connector without applying pressure, and FIG. 7C is a connector of FIG. 7B when pressed against a connection target. Front view.

8A to 8L are schematic diagrams showing examples of the manufacturing process of the present invention for producing the connector of the present invention.

9A to 9D are schematic diagrams showing another example of the manufacturing process of the present invention for producing the connector of the present invention.

10A-10N are schematic diagrams showing examples of processes for fabricating the connector of the present invention on the surface of a substrate and delivering the connector to an intermediate plate.

11A and 11B are schematic diagrams showing examples of pick and place mechanisms and processes thereof for picking up and placing a connector on a connector carrier for manufacturing the connection structure of the present invention.

12A-12C are schematic diagrams illustrating a process for assembling and locking a connector onto a connector carrier in the present invention.

13 is a cross-sectional view showing an example of a probe connection assembly using the connection structure of the present invention for use between the semiconductor device under test and the test head of the semiconductor test system.

14 is a cross-sectional view showing another example of a probe connection assembly using the connection structure of the present invention for use as an interface between a semiconductor device under test and a test head of a semiconductor test system.

Fig. 15 is a sectional view showing another example of the connecting structure of the present invention including a connector, a connector carrier, and a connector adapter.

16A-16C are front views showing examples of the connector structure of the present invention using the concept shown in FIG.

17A-17C are perspective views showing a connecting structure of the present invention based on the concept of FIG. 15, FIG. 17A shows a connector, FIG. 17B shows a connector adapter, and FIG. 17C shows a connector adapter with a connector mounted thereon. Fig. 17D shows the connector carrier for mounting the connector adapter of Fig. 17C.

18 is a sectional view showing another example of the probe connection assembly using the connection structure of FIG. 15 arranged between the semiconductor device under test and the test head of the semiconductor test system.

FIG. 19 is a sectional view showing another example of the probe connection assembly using the connection structure of FIG. 15 arranged between the semiconductor device under test and the test head of the semiconductor test system.

Claims (10)

Connection structure for establishing an electrical connection with a connection target, An upper end each oriented in a vertical direction and having a cutout, a lower end oriented in a direction opposite to the upper end and serving as a connection point for electrical connection with a connection target, and provided between the upper end and the lower end as a spring A plurality of connectors made of a conductive material composed of a functioning diagonal beam portion, A connector carrier having a slide plate on the top surface of which a slide plate is fitted into a cutout of the connector after inserting the connector into a through hole formed on the connector carrier to mount the plurality of connectors; And a spacer inserted between the connector carrier and the slide plate after inserting the slide plate into the cutout of the connector to maintain the position of the slide plate on the connector carrier, The cutout of the connector has a length equal to the thickness of the slide plate such that an inner circumference of the through hole of the slide plate is fitted into the cutout, thereby inserting the spacer between the connector carrier and the slide plate. Lock the connector onto the connector carrier, The upper end of each connector protrudes from the upper surface of the connector carrier and the lower end of each connector protrudes from the lower surface of the connector carrier. The connecting structure of claim 1, wherein the connector carrier comprises an upper carrier having the upper surface, a bottom carrier having the lower surface, and an intermediate carrier provided between the upper carrier and the bottom carrier. The connection structure of claim 2, wherein the connector carrier comprises a system carrier for supporting the top carrier, the intermediate carrier, and the bottom carrier with a predetermined distance between respective carriers. The connecting structure according to claim 1, wherein the connector carrier and the slide plate have through holes for mounting the connector. The connection according to claim 2, wherein the connector includes a first stopper for limiting upward displacement of the connector by contacting the upper carrier, and a second stopper for limiting downward displacement of the connector by contacting the intermediate carrier. structure. 2. The connector of claim 1, wherein each of the connectors further comprises a straight beam portion at the lower end and a return portion returned from the bottom end of the straight beam portion to extend in parallel with the straight beam portion to create a predetermined gap therebetween. Connection structure. A probe connection assembly for establishing an electrical connection with a connection target, A connector carrier having a plurality of connectors mounted on a surface of the connector carrier, a slide plate for mounting the plurality of connectors on the connector carrier; A probe card for mounting the connector carrier and for establishing electrical communication between the connector and an electrode provided on the probe card; A pin block having a plurality of connecting pins for connecting between the probe card and the semiconductor test system when the pin block is attached to the probe card, Each connector has a cutout that is oriented in the vertical direction and fits with the slide plate so as to be mounted on the connector carrier and oriented in the opposite direction to the upper end for electrical connection with the connection target. A lower end portion serving as a connection point, and a diagonal beam portion provided between the upper end portion and the lower end portion and serving as a spring, After inserting the slide plate into the cutout of the connector, the spacer further includes a spacer inserted between the connector carrier and the slide plate to maintain the position of the slide plate on the connector carrier, The cutout of the connector has a length equal to the thickness of the slide plate such that an inner circumference of the through hole of the slide plate is fitted into the cutout, thereby inserting the spacer between the connector carrier and the slide plate. A probe connection assembly that locks the connector onto the connector carrier. 8. The connector of claim 7, wherein the connector carrier has an upper surface and a lower surface for mounting the plurality of connectors, the upper end of each connector projecting from the upper surface of the connector carrier, and the lower end of each connector. A probe connection assembly protruding from the bottom surface of the connector carrier. The probe connection assembly of claim 8, wherein the connector carrier comprises an upper carrier having the upper surface, a bottom carrier having the lower surface, and an intermediate carrier provided between the upper carrier and the bottom carrier. 10. The probe connection assembly of claim 9, wherein the upper carrier, the intermediate carrier, and the bottom carrier each have through holes for mounting the connector.

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