KR100914196B1 - Driving apparatus of liquid crystal display panel and method thereof - Google Patents

Abstract

The present invention relates to a driving apparatus and a method of a liquid crystal panel, and when driving a liquid crystal panel in a 2-dot inversion method, a voltage value of a data signal is applied during an initial predetermined time when a data signal is applied to the liquid crystal panel through a pull-up control unit. When a negative data signal is supplied to the pixels connected to the n-th gate line by being raised, and then a positive data signal is supplied to the pixels connected to the n-th gate line, the predetermined rise time is required. By supplying the signal slightly higher, it is possible to compensate for the case where the voltage value of the data signal is not sufficiently supplied to the pixels connected to the n-th gate wiring, thereby providing a constant voltage to the liquid crystal cells.

Description

DRIVING APPARATUS OF LIQUID CRYSTAL DISPLAY PANEL AND METHOD THEREOF}

1 is an equivalent circuit diagram of a general liquid crystal cell.

FIG. 2 is a voltage waveform diagram applied to the liquid crystal cell in FIG.

3 is an exemplary view showing input and output signal waveforms of a data driver integrated circuit applied to a conventional 1 dot inversion method.

4 is an exemplary view showing polarities of data signals supplied to pixels in the conventional 1 dot inversion scheme.

5 is an exemplary view showing input and output signal waveforms of a data driver integrated circuit applied to a conventional two dot inversion method.

6 is an exemplary view showing polarities of data signals supplied to pixels in the conventional two dot inversion scheme.

7 is an exemplary view showing a driving device of a liquid crystal panel according to an embodiment of the present invention.

8 is an exemplary view showing a signal waveform of a liquid crystal panel driving apparatus according to the 2-dot inversion method according to the present invention.

FIG. 9 is an exemplary diagram illustrating an example of implementing a pull-up control unit as a de-flip flop in FIG. 7; FIG.                 

10 is a waveform diagram of input / output signals of the de-flip flop in FIG.

11 is an exemplary view showing polarities of data signals supplied to pixels in a 2-dot inversion scheme according to the present invention.

*** Explanation of symbols for main parts of drawing ***

200: thin film transistor 201: gate wiring

202: liquid crystal capacity 203: data wiring

204: storage capacitor 211: gate driver integrated circuit

212: data driver integrated circuit 213: gamma correction voltage generator

214: pull-up control unit Vcom: common electrode voltage

CS11: control signal

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for driving a liquid crystal panel and a method thereof, and more particularly to a liquid crystal panel capable of supplying a constant voltage to liquid crystal cells when driving the liquid crystal panel in a 2-dot inversion method. It relates to a driving device and a method thereof.

In general, a liquid crystal display device displays a desired image by individually supplying data signals according to image information to liquid crystal cells arranged in a matrix form, and adjusting a light transmittance of the liquid crystal cells. to be.                         

The liquid crystal display device comprises: a liquid crystal panel in which liquid crystal cells forming a pixel unit are arranged in an active matrix form; A driver integrated circuit (IC) for driving the liquid crystal cells is provided.

In this case, the liquid crystal panel includes a color filter substrate and a thin film transistor array substrate facing each other, and a liquid crystal layer filled in spaced intervals between the color filter substrate and the thin film transistor array substrate.

Common electrodes and pixel electrodes are formed on opposite inner surfaces of the color filter substrate and the thin film transistor array substrate to apply an electric field to the liquid crystal layer. In this case, the pixel electrode is formed for each liquid crystal cell on the thin film transistor array substrate, while the common electrode is integrally formed on the entire surface of the color filter substrate. Therefore, by controlling the voltage applied to the pixel electrode in a state where a voltage is applied to the common electrode, it is possible to individually control the light transmittance of the liquid crystal cells.

On the thin film transistor array substrate of the liquid crystal panel, data lines for transmitting a data signal supplied from a data driver integrated circuit to the liquid crystal cells, and gate lines for transmitting a scan signal supplied from the gate driver integrated circuit to the liquid crystal cells. Are orthogonal to each other, and liquid crystal cells are defined at each intersection of these data lines and the gate lines.

The gate driver integrated circuit sequentially supplies scanning signals to the gate lines so that the liquid crystal cells arranged in a matrix form are sequentially selected one by one, and the selected one line of liquid crystal cells is selected from the data driver integrated circuit. The data signal is supplied.

As described above, in order to control the voltage applied to the pixel electrode for each liquid crystal cell, a thin film transistor used as a switching element is formed in each liquid crystal cell, and a liquid crystal in which a scan signal is supplied to the gate electrode of the thin film transistor through the gate lines. In the cells, a conductive channel is formed between the source electrode and the drain electrode of the thin film transistor, wherein a data signal supplied to the source electrode of the thin film transistor through the data lines is supplied to the pixel electrode via the drain electrode of the thin film transistor. The light transmittance of the liquid crystal cell is adjusted.

Referring to the driving of the general liquid crystal display as described above in more detail as follows.

First, the common electrode voltage is supplied to the common electrode formed integrally on the front surface of the color filter substrate, and the scan signal is sequentially supplied from the gate driver integrated circuit to the gate lines formed on the thin film transistor array substrate. Therefore, the liquid crystal cells arranged in a matrix form are sequentially selected in units of gate wirings.

Since the scan signals supplied to the liquid crystal cells of the selected gate line are applied to the gate electrodes of the thin film transistors respectively provided in the liquid crystal cells, a conductive channel is formed between the source electrode and the drain electrode of the thin film transistor.

In addition, a data signal is supplied to the liquid crystal cells of the selected gate line through the data line in the data driver integrated circuit, and the data signal is applied to the source electrode of the thin film transistor.                         

Therefore, the data signal supplied to the source electrode of the thin film transistor is supplied to the drain electrode through the conductive channel during the period in which the scan signal is applied.

The data signal supplied to the drain electrode is supplied to the pixel electrode connected to the drain electrode to form an electric field in the liquid crystal layer together with the common electrode voltage supplied to the common electrode.

When an electric field is formed in the liquid crystal layer, the liquid crystal is rotated by dielectric anisotropy to transmit light emitted from the backlight toward the color filter substrate through the pixel electrode, the liquid crystal layer, and the common electrode from the thin film transistor array substrate. At this time, the strength of the electric field is adjusted according to the voltage magnitude of the data signal applied to the pixel electrode, and the light transmittance of the liquid crystal layer is controlled by the strength of the electric field.

On the other hand, the voltage value of the data signal is charged in the storage capacitor provided in each liquid crystal cell during the scan signal is applied.

The voltage value of the data signal charged in the storage capacitor is supplied to the pixel electrode during the turn-off period of the thin film transistor to which the scan signal is not applied, thereby maintaining the driving of the liquid crystal.

In addition, when an electric field in a constant direction is continuously applied to the liquid crystal layer, the liquid crystal is deteriorated, resulting in afterimages occurring in the liquid crystal panel by the DC voltage component. Therefore, in order to prevent deterioration of the liquid crystal and to remove the DC voltage component, the voltage value of the data signal is applied to repeat the positive / negative with respect to the common electrode. This driving method is called an inversion method. .                         

The driving of the liquid crystal display as described above will be described in detail with reference to the accompanying drawings.

1 is an equivalent circuit diagram of a general liquid crystal cell.

Referring to FIG. 1, a liquid crystal cell is common with a thin film transistor 100 having a gate electrode connected to a gate wiring 101, a source electrode connected to a data wiring 103, and a drain electrode of the thin film transistor 100. 2 shows a voltage waveform of FIG. 2 for driving an inversion method of a liquid crystal panel having a liquid crystal capacitor 102 and a storage capacitor 104 connected in parallel between electrode voltages Vcom, and having an equivalent circuit of such a unit liquid crystal cell. It will be described in detail with reference to.

1 and 2, the common electrode voltage Vcom is applied to the common electrode, and the voltage V _DATA of the data signal is applied to the source electrode of the thin film transistor 100 through the data line 103. The scan signal V _G is applied to the gate electrode of the thin film transistor 100 through the gate line 101 every frame.

Therefore, first, in the turn-on period of the thin film transistor 100 to which the scan signal V _G of the nth frame is applied at high potential, a positive data signal voltage value V _DATA is transferred from the source electrode to the drain electrode. It is supplied to the pixel electrode to drive the liquid crystal, and is charged in the storage capacitor 104. In this case, the positive data signal voltage value V _DATA applied to the pixel electrode is gradually charged due to the influence of the liquid crystal capacitor 102 and the storage capacitor 104 in the turn-on period of the thin film transistor 100. (charging), and are shown in the pixel voltage (V _P ) waveform as shown in FIG.

In addition, when the scan signal V _G transitions from the high potential to the low potential and the thin film transistor 100 is turned off, the gate may be formed due to parasitic capacitance caused by the overlap between the gate electrode and the drain electrode of the thin film transistor 100. Since the voltage variation of the electrode affects the pixel electrode connected to the drain electrode, a voltage drop occurs from the charged pixel voltage V _P , which is referred to as a change in pixel voltage ΔV _P.

On the other hand, in the turn-off period of the thin film transistor 100 to which the scan signal V _G is applied at low potential, the pixel voltage V _P charged in the storage capacitor 104 is continuously supplied to the pixel electrode, thereby It keeps running.

On the other hand, in the n + 1 frame, since the inversion driving method described above is applied, a negative data signal voltage value V _DATA is supplied from the source electrode to the pixel electrode through the drain electrode, and the storage capacitor 104 is provided. Is charged.

Thus, the turn of the n + 1 frame pixel voltage (V _P) is a thin film transistor 100 is ideal relative to the common electrode voltage (Vcom) of a-on, transition, and the turn-pixel voltage of the n-th frame from the off-period Show a voltage waveform that is symmetric to (V _P ).

However, as the pixel voltage V _P is lower than the _data signal voltage value V _DATA due to the variation of the pixel voltage ΔV _P , the pixel electrode of the nth frame and the n + 1th frame is actually used. The voltages V _P are not symmetrical with each other as shown in FIG.

On the other hand, the inversion driving method is a frame inversion method such that the voltage value of the data signal is supplied with the opposite polarity every time one frame of the image is changed, and the voltage value of the data signal is changed whenever the gate wirings are changed. Line inversion method to supply the opposite polarity, and voltage value of the data signal to be supplied to the opposite polarity to the liquid crystal cells adjacent to each other, and to be supplied to the opposite polarity every time one frame of the image is changed. It is divided into dot inversion method.

Among the inversion driving methods described above, the dot inversion method suppresses screen distortions such as flicker and cross talk as compared to the frame inversion method or the line inversion method to provide an image having excellent image quality. .

Therefore, in recent years, the dot inversion method is mainly used. The dot inversion method is classified into a 1 dot inversion method and a 2 dot inversion method, which will be described in detail with reference to the accompanying drawings.

3 is an exemplary view showing input and output signal waveforms of a data driver integrated circuit applied to a single dot inversion scheme.

Referring to FIG. 3, first, a polarity pulse POL1 and a data output enable signal DOE1 are input to a data driver integrated circuit. In the single dot inversion method, the data output enable signal DOE1 input to the data driver IC has a frequency twice that of the polarity pulse POL1.

The data driver integrated circuit receiving the polarity pulse POL1 and the data output enable signal DOE1 is synchronized with the falling edge (or rising edge) of the data output enable signal DOE1 in response to the data signal DS1. Is supplied to the data wires. At this time, the data signal DS1 supplied from the data driver integrated circuit to the data lines is alternately applied with the positive polarity (+) and the negative polarity (−) as shown in the waveform diagram of FIG.

Meanwhile, a gate output enable signal (not shown) having the same frequency as the data output enable signal DOE1 is supplied to the gate driver integrated circuit, and the gate driver integrated circuit uses the gate output enable signal to scan the signal. (Not shown) are generated and sequentially supplied to the gate wirings.

In the one-dot inversion scheme as described above, the positive and negative data signals are differently supplied to the pixels adjacent to each other to display an image as shown in the exemplary diagram of FIG. .

However, the 1-dot inversion method has a problem in that power consumption is very large as the positive (+) and negative (-) data signals are supplied differently to all adjacent pixels. To overcome this drawback, a two-dot inversion scheme has been proposed.

5 is an exemplary view showing input and output signal waveforms of a data driver integrated circuit applied to a two dot inversion scheme.

Referring to FIG. 5, first, a polarity pulse POL2 and a data output enable signal DOE2 are input to a data driver integrated circuit. In this case, in the 2-dot inversion scheme, the data output enable signal DOE2 input to the data driver integrated circuit has a frequency four times that of the polarity pulse POL2.

The data driver integrated circuit receiving the polarity pulse POL2 and the data output enable signal DOE2 synchronizes the data signal DS2 with the data signal DS2 in synchronization with a falling edge (or rising edge) of the data output enable signal DOE2. Feed the fields. At this time, since the data output enable signal DOE2 has a frequency four times the polarity pulse POL2, when the polarity pulse POL2 is positive, two data signals DS2 are continuously supplied to the data lines. When the polarity pulse POL2 is negative, two data signals DS2 are successively supplied to the data lines.

Meanwhile, a gate output enable signal (not shown) having the same frequency as the data output enable signal DOE2 is supplied to the gate driver integrated circuit, and the gate driver integrated circuit uses the gate output enable signal to scan signals. (Not shown) are generated and sequentially supplied to the gate wirings.

In the two-dot inversion scheme as described above, the positive and negative data signals are alternately supplied in the horizontal direction, as shown in the exemplary diagram of FIG. ), Positive (+), negative (-) and negative (-) data signals are alternately supplied to display an image. Accordingly, the 2-dot inversion scheme can reduce power consumption compared to the 1-dot inversion scheme in which the polarities of the data signals are supplied to all the pixels adjacent to each other.

However, the conventional two-dot inversion scheme as described above is used when the positive (+) or negative (-) data signal is equally applied to the nth gate line and the n + 1th gate line. Voltage values supplied to the pixels connected to the n-th gate line and the pixels connected to the n + 1th gate line are different.

This is described in detail on the assumption that the positive data signal is supplied to the pixels connected to the n-th gate wiring, and the negative data signal is supplied to the pixels connected to the n-th gate wiring. Let's do it.

First, a negative data signal is supplied to the pixels connected to the n−1 th gate line through the data line.

A positive data signal is supplied to the pixels connected to the nth gate line through the data line. In this case, the negative data signal supplied to the pixels connected to the n-th gate wiring and the positive data signal supplied to the pixels connected to the n-th gate wiring are the same data. Since the signal is supplied through the wiring, the negative data signal is supplied to the pixels connected to the n-th gate wiring, and then the positive data signal is supplied to the pixels connected to the n-th gate wiring. When is supplied, a predetermined rise time is required.

However, since a positive polarity (+) data signal is applied to the pixels connected to the n + 1th gate line according to the 2 dot inversion method, the positive signal is applied to the pixels connected to the nth gate line. Unlike the case where the polarity (+) data signal is supplied, a predetermined rise time is not required.

Therefore, the voltage value supplied to the pixels connected to the nth gate line and the voltage value supplied to the pixels connected to the n + 1th gate line have a slight difference, which results in a bad horizontal band in the liquid crystal panel. This will cause poor image quality.

Accordingly, the present invention has been made to solve the above-described problems, and an object of the present invention is to provide a driving apparatus and method for a liquid crystal panel which can make a voltage value supplied to a liquid crystal cell constant. .

First, the driving apparatus of the liquid crystal panel for achieving the object of the present invention as described above is a data signal applied to the data wirings by a plurality of gate wirings and data wirings, and a control signal applied to the gate wirings And a switching unit for supplying and cutting off the liquid crystal cells provided in the intersection region of the gate lines and the data lines, wherein data signals having opposite polarities are applied to the liquid crystal cells adjacent to each other in the horizontal direction, and adjacent to each other in the vertical direction. The data signals having opposite polarities are alternately applied to the liquid crystal cell pairs consisting of two liquid crystal cells, and the data signals having the same polarity are applied to the two liquid crystal cells in the liquid crystal cell pairs in different sizes.

In addition, a method of driving a liquid crystal panel for achieving the object of the present invention as described above is applied to the liquid crystal cells adjacent to each other in the horizontal direction, the data signal of opposite polarity is composed of two liquid crystal cells adjacent to each other in the vertical direction In a two-dot inversion driving method in which data signals having opposite polarities are applied alternately to pairs of liquid crystal cells, a data signal having a predetermined voltage value in a first liquid crystal cell of two liquid crystal cells adjacent to each other in the vertical direction. Applying a; And applying a data signal having a voltage value smaller than the voltage value applied to the first liquid crystal cell to the second liquid crystal cell.

The driving apparatus and method of the liquid crystal panel according to the present invention as described above will be described in more detail with reference to the accompanying drawings.

7 is an exemplary view showing a driving device of a liquid crystal panel according to an exemplary embodiment of the present invention.

Referring to FIG. 7, the gate lines 201 are arranged in rows at regular intervals, and the data lines 203 are arranged in columns at regular intervals. Thus, the gate lines 201 and the data lines 203 are arranged in a matrix form. In this case, the unit liquid crystal cell is defined at each intersection of the gate lines 201 and the data lines 203, and includes a thin film transistor 200, a liquid crystal capacitor 202, and a storage capacitor 204.

Gate electrodes of the thin film transistor 200 are respectively connected to the gate lines 201, and source electrodes are respectively connected to the data lines 203.

The liquid crystal capacitor 202 and the storage capacitor 204 are connected in parallel between the drain electrode of the thin film transistor 200 and the common electrode voltage Vcom.

Meanwhile, scan signals are sequentially applied to the gate lines 201 from the gate driver integrated circuit 211, and data signals are applied to the data lines 203 from the data driver integrated circuit 212.

When the scan signal is applied from the gate driver integrated circuit 211 in the unit of the gate wiring 201, the thin film transistors 200 having the gate electrode connected to the gate wiring 201 are in the unit of the gate wiring 201. The data signal is turned on and is applied from the data driver integrated circuit 212 to one side of the liquid crystal capacitor 202 and the storage capacitor 204 through the data lines 203 and the turned-on thin film transistors 200. . In this case, the common electrode voltage Vcom is applied to the other side of the liquid crystal capacitor 202 and the storage capacitor 204.

Accordingly, the light transmittance of the liquid crystal cells is individually controlled by the voltage difference between the data signal applied to the liquid crystal capacitor 202 and the common electrode voltage Vcom, so that the image is displayed, and the storage capacitor 204 is the thin film. After charging the voltage difference between the data signal and the common electrode voltage Vcom during the turn-on period of the transistor 200, the charged voltage is supplied to the liquid crystal cells during the turn-off period of the thin film transistor 200 to supply the liquid crystal cell. Is maintained.

On the other hand, in the liquid crystal panel as described above, the gray level of the image does not change linearly according to the voltage level of the data signal, and the gamma characteristic that varies linearly appears. This is due to the fact that the light transmittance of the liquid crystal does not change linearly according to the voltage level of the data signal, and the gray scale of the image does not change linearly according to the light transmittance of the liquid crystal. Is displayed.

Therefore, in order to correct the error of the gray level as described above, a gamma correction voltage is applied to the data driver integrated circuit 212 from the gamma correction voltage generation unit 213, which is applied to the liquid crystal panel together with the data signal to transmit the data signal. By varying the intervals between the voltage levels, the gray level of the image changes linearly.                     

In the 2-dot inversion type liquid crystal panel driving apparatus according to the present invention, the control signal CS11 is applied to the gamma correction voltage generation unit 213 so that the voltage value of the data signal during the initial predetermined time when the data signal is applied to the liquid crystal panel. The pull-up control unit 214 is provided to raise the.

The operation of the LCD panel driving apparatus according to the present invention configured as described above will be described in more detail with reference to the waveform diagram of FIG.

8 is an exemplary view showing a signal waveform of the liquid crystal panel driving apparatus according to the two-dot inversion method according to the present invention.

Referring to FIG. 8, a polarity pulse POL11 and a data output enable signal DOE11 are first input to a data driver integrated circuit. At this time, the data output enable signal DOE11 input to the data driver integrated circuit in the 2-dot inversion method has a frequency four times that of the polarity pulse POL11.

In addition, a control signal CS11 having a frequency twice that of the polarity pulse POL11 is applied from the pull-up controller 214 to the gamma correction voltage generator 213, and thus from the gamma correction voltage generator 213. The output gamma correction voltage has a higher voltage value when the control signal CS11 is in the high potential section than in the low potential section.

The data driver integrated circuit receiving the polarity pulse POL11, the data output enable signal DOE11, and the gamma correction voltage is synchronized with the falling edge (or rising edge) of the data output enable signal DOE11 to synchronize the data signal DS11. ) Is supplied to the data lines. At this time, since the data output enable signal DOE11 has a frequency four times the polarity pulse POL11, when the polarity pulse POL11 is positive, two data signals DS11 are continuously supplied to the data lines. When the polarity pulse POL11 is negative, two data signals DS11 are successively supplied to the data lines.

Since the gamma correction voltage has a higher voltage value when the control signal CS11 is in the high potential section, the data signal DS11 is continuously supplied twice to the data lines. Since the voltage value rises during the initial predetermined time, the voltage value of the first supplied data signal DS11 is supplied higher than the voltage value of the second supplied data signal DS11.

Meanwhile, a gate output enable signal (not shown) having the same frequency as the data output enable signal DOE11 is supplied to the gate driver integrated circuit, and the gate driver integrated circuit uses the gate output enable signal to scan the signal. (Not shown) are generated and sequentially supplied to the gate wirings.

9 is an exemplary diagram showing an example of implementing the pull-up control unit 214 as a de-flip flop, and FIG. 10 is an input / output signal waveform diagram of the de-flip flop shown in FIG. 9.

And, Table 1 below shows a detailed description of the input and output terminals of the de-flip flop shown in FIG.

Terminal Names Description D1 Data Inputs CP1 Clock pulse inputs CD1 Direct Clear Inputs SD1 Direct Set Inputs Q, Q_bar Outputs

9, 10 and Table 1, in the 2-dot inversion driving method, the data output enable signal DOE11 applied to the clock pulse input terminal CP1 of the de-flop flop 300 is a polarity pulse ( 4 times the frequency of POL11).

The control signal CS11 output from the inverted output terminal Q_bar of the de-flip flop 300 is applied to the data input terminal D1 of the de-flip flop 300 again.

Meanwhile, the vertical synchronization signal Vsync of the liquid crystal panel is input to the direct clear input terminal CD1 of the de-flip flop 300, and the power supply voltage Vcc is a direct set input of the de-flip flop 300. It is input to the terminal SD1.

Therefore, when the data output enable signal DOE11 having a frequency four times the polarity pulse POL11 is applied to the clock pulse input terminal CP1 of the de-flip-flop 300, the de-flip-flop 300 At the inverting output terminal Q_bar of FIG. 2), a control signal CS11 having a frequency twice that of the polarity pulse POL11 is output in synchronization with the rising edge (or falling edge) of the data output enable signal DOE11.

The control signal CS11 is applied to the gamma correction voltage generator 213 so that the gamma correction voltage output from the gamma correction voltage generator 213 is a low potential period when the control signal CS11 is a high potential period. It has a higher voltage value than in the case.

As described above, the two-dot inversion driving method of the liquid crystal panel according to the present invention alternately supplies the positive (+) and the negative (-) data signals in the horizontal direction as shown in FIG. In the longitudinal direction, data signals of positive polarity (+), positive polarity (+), negative polarity (-) and negative polarity (-) are alternately supplied to display an image. Accordingly, power consumption can be reduced as compared to the one-dot inversion scheme in which the polarities of the data signals are differently supplied to all adjacent pixels.

On the other hand, in the conventional two-dot inversion method, when the positive (+) or the negative (-) data signal is equally applied to the nth gate line and the n + 1th gate line, the nth gate line Voltage values supplied to the pixels connected to the pixels connected to the n + 1 th gate lines are different.

This is described in detail on the assumption that the positive data signal is supplied to the pixels connected to the n-th gate wiring, and the negative data signal is supplied to the pixels connected to the n-th gate wiring. Let's do it.

First, a negative data signal is supplied to the pixels connected to the n−1 th gate line through the data line.

A positive data signal is supplied to the pixels connected to the nth gate line through the data line. In this case, the negative data signal supplied to the pixels connected to the n-th gate wiring and the positive data signal supplied to the pixels connected to the n-th gate wiring are the same data. Since the signal is supplied through the wiring, the negative data signal is supplied to the pixels connected to the n-th gate wiring, and then the positive data signal is supplied to the pixels connected to the n-th gate wiring. When is supplied, a predetermined rise time is required.

However, since the positive data signal is applied to the pixels connected to the n + 1th gate line through the second dot inversion method, the pixels connected to the nth gate line are applied to the pixels connected to the nth gate line. Unlike the case where the positive data signal is supplied, a predetermined rise time is not required.

Therefore, the voltage value supplied to the pixels connected to the nth gate line and the voltage value supplied to the pixels connected to the n + 1th gate line have a slight difference, which results in a defect in the horizontal band of the liquid crystal panel. It will cause the same poor image quality.

However, in the 2-dot inversion driving method according to the present invention, a control signal CS11 having a frequency twice the polarity pulse POL11 is applied from the pull-up controller 214 to the gamma correction voltage generator 213. Accordingly, the gamma correction voltage output from the gamma correction voltage generator 213 has a higher voltage value when the control signal CS11 is in the high potential section, compared with the low potential section.

Since the gamma correction voltage has a higher voltage value when the control signal CS11 is in the high potential section, the data signal DS11 supplied to the data lines twice in succession is initially predetermined. Since the voltage value rises over time, the voltage value of the first supplied data signal DS11 is supplied higher than the voltage value of the second supplied data signal DS11.

Accordingly, the negative data signal DS11 is supplied to the pixels connected to the n-th gate line, and then the positive data signal (+) is supplied to the pixels connected to the n-th gate line. When DS11 is supplied and a predetermined rise time is required, the data signal DS11 is supplied slightly higher so that the voltage value of the data signal DS11 is not sufficiently supplied to the pixels connected to the nth gate wiring. To compensate.                     

In addition, since the positive data signal DS11 is applied to the pixels connected to the n + 1 th gate line through the second dot inversion method, the pixel connected to the n th gate line is applied. Unlike a case in which the positive data signal DS11 is supplied to the positive electrode (+), when the predetermined rise time is not required, the voltage value of the data signal DS11 is supplied slightly lower, so that the n + 1th gate wiring is supplied. A voltage value equal to the voltage value of the data signal DS11 applied to the pixels connected to the nth gate line may be supplied to the pixels connected to the n th gate line.

As described above, the apparatus and method for driving a 2-dot inversion of a liquid crystal panel according to the present invention have an effect of reducing power consumption as compared to the 1-dot inversion driving method, and supplying to the pixels connected to the n-th gate wiring. By compensating for the same voltage value and the voltage values supplied to the pixels connected to the n + 1th gate wiring, an image quality defect such as a horizontal band defect may be prevented from occurring in the liquid crystal panel.

Claims (5)

Vertically crossing gate wiring lines and data wiring lines; A switching unit for supplying and blocking a data signal applied to the data lines by the control signal applied to the gate lines to the liquid crystal cells provided at the intersection of the gate lines and the data lines; A gate driver integrated circuit unit supplying a scan signal to the gate lines; A data driver integrated circuit unit which supplies a data signal to the data lines in a 2-dot inversion driving method; A gamma correction voltage generator supplying a gamma correction voltage to the data driver integrated circuit; And a pull-up controller which applies a control signal to the gamma correction voltage generator to increase a voltage value of the data signal during an initial predetermined time when the data signal is applied to the liquid crystal panel. The apparatus of claim 1, wherein the control signal output from the pull-up control unit has a frequency twice the polarity pulse applied to the liquid crystal panel in the 2-dot inversion driving method. 2. The method of claim 1, wherein two-dot inversion driving is performed by alternately applying data signals of opposite polarity to liquid crystal cell pairs including first and second liquid crystal cells to which data signals of the same polarity are applied adjacent to each other in a vertical direction. The data signal is applied to the first liquid crystal cell before the second liquid crystal cell, And the initial predetermined time at which the pull-up controller raises the voltage value of the data signal is a time for inputting the data signal to the first liquid crystal cell. Polarities of opposite polarity are alternately applied to liquid crystal cell pairs consisting of first and second liquid crystal cells in which data signals of opposite polarities are applied to liquid crystal cells adjacent to each other in the horizontal direction, and data signals of the same polarity are applied adjacent to each other in the vertical direction. In the two-dot inversion driving method to which the data signal is applied, Applying a data signal to the liquid crystal cell pair, but increasing a voltage value of the data signal during an initial predetermined time to apply a data signal of an elevated voltage value to the first liquid crystal cell; And Applying a data signal to the liquid crystal cell pair, but applying a data signal having a voltage value smaller than that of the voltage applied to the first liquid crystal cell to the second liquid crystal cell after the initial predetermined time; Method of driving a liquid crystal panel comprising a. delete

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