KR100913324B1 - Method for forming a silicide layer in a semiconductor device - Google Patents

Abstract

The disclosed method relates to the formation of silicide films in semiconductor devices. First, a transistor having a gate electrode, a source, and a drain region is formed on an active region of a substrate. After the crystal structure of the substrate is formed into an amorphous structure, the substrate is first heat treated. Subsequently, a metal film is uniformly formed on the substrate and the transistor structure, the substrate having the metal film is subjected to a second heat treatment to form the metal film partially as a silicide film, and the metal film not formed of the silicide film is removed. . Here, by forming the amorphous structure and performing the first heat treatment, the substrate damaged by ion implantation and etching performed when the transistor is formed may be stabilized.

Description

Method for forming a silicide layer in a semiconductor device

1 to 4 are cross-sectional views illustrating a method of forming a silicide film of a conventional semiconductor device.

5 is a cross-sectional view showing a defect of a substrate generated when forming a silicide film of a semiconductor device according to a conventional method.

6 to 10 are cross-sectional views illustrating a method of forming a silicide film of a semiconductor device according to an embodiment of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a silicide film of a semiconductor device, and more particularly, to a method of forming a silicide film of a semiconductor device capable of realizing low resistance through a salicidation process.

Recently, semiconductor devices require high integration. Accordingly, the necessity of manufacturing a semiconductor device having a fine pattern, a fast operation speed, and a low power consumption is increasing.                         

However, as the design rules of the semiconductor device become narrower, the parasitic series resistance deepens, which affects the operation speed of the semiconductor device. Therefore, recently, a method for reducing the parasitic series resistance has been developed. Accordingly, a low resistivity copper film or the like is adopted as the metal film, or a low dielectric constant material is used as the interlayer insulating film between the metal films. In addition, a silicide film is formed in the active region and the gate electrode to lower the resistance.

Examples of the formation method of the silicide layer include "A Self aligned CoSi2 interconnection and contact technology for VLSI application" by Luc van den Hove and "Improvement of CoSi2 stability" by JU Bae et al. on fine grain sized poly-Si using Nitrogen implantation thruo Co monosilicide and its effect on 0.18㎛ dual gate CMOS ".

1 to 4 show a method of forming a silicide film of a conventional semiconductor device.

Referring to FIG. 1, a gate oxide film 3, a gate electrode 5, and a spacer 6 are formed on an active region of a substrate 1. In this case, the gate electrode 5 is formed of a gate poly and is formed on the gate oxide layer 32. The spacer 6 is formed on both side walls of the gate electrode 5.

Referring to FIG. 2, ion implantation 10 is performed to form source and drain regions 7a and 7b in the active region of the substrate 1 adjacent to the gate electrode 5.                         

Referring to FIG. 3, the metal film 8 is uniformly formed on the substrate 1 having the gate electrode 5. Then, the substrate 1 having the metal film 8 is subjected to primary heat treatment. Accordingly, the metal film formed in a portion of the metal film 8 is formed as a silicide film by a salcidation reaction. In this case, the first heat treatment is performed for about 30 seconds in a temperature atmosphere of about 450 to 550 ℃.

Referring to FIG. 4, the metal film of the metal film 8 in which the salicylation reaction does not occur is removed. In the removal, a solution such as HF or the like is used. As a result, a silicide layer 9 is formed on the substrate 1 on which the gate electrode 5 and the source and drain regions 7a and 7b are formed. In other words, the metal film formed on the portion having the silicon component is formed of the silicide film 9.

Subsequently, the substrate 1 having the silicide film 9 is subjected to secondary heat treatment. The secondary heat treatment is performed for about 45 seconds in a temperature atmosphere of about 800 to 850 ° C. in order to stabilize the silicide layer 9 to have a lower resistance.

However, when the size of the active region in which the gate, source and drain regions 7a and 7b are formed is narrow to 0.25 μm or less, as shown in FIG. 5, the defect 50 is generated in the substrate. This is because the substrate applied to the ion implantation, etching, etc. is subjected to stress and reacts by the first and second heat treatments. In addition, the defect 50 causes silicon depletion, and the silicon depletion develops into a large hole shape by moving to a portion where stress is concentrated by heat treatment. Accordingly, leakage currents are generated in the source and drain regions due to the defects such as the hole shape, thereby deteriorating the characteristics of the semiconductor device.

As described above, even in the formation of the silicide film introduced as a part for lowering the resistance, the above-described defects occur, and thus, the present invention cannot be actively applied to the manufacture of semiconductor devices.

It is an object of the present invention to provide a method for reducing the occurrence of defects such as silicon depletion when forming a silicide film.

The present invention for achieving the above object comprises the steps of forming a transistor having a gate electrode, a source and a drain region on the active region of the substrate; Forming a crystal structure of the substrate into an amorphous structure by ion implantation using arsenic (As) ions; First heat treating the substrate; Uniformly forming a metal film on the substrate and the transistor structure; Secondary heat treatment of the substrate having the metal film to form the metal film partially as a silicide film; And removing the metal film not formed of the silicide film.

According to this invention, before forming a silicide film, the crystal structure of a board | substrate is formed into an amorphous structure, and heat processing is performed. This compensates for the state of the substrate damaged by ion implantation, etching, etc., which is performed when the transistor is formed. Therefore, even when the heat treatment for forming the silicide film is performed, no defect is generated in the substrate.                     

As described above, the method of the present invention can stably form the silicide film without generating defects.

Hereinafter, preferred embodiments of the present invention will be described in more detail with reference to the accompanying drawings.

6 to 10 illustrate a method of forming a silicide film of a semiconductor device according to an embodiment of the present invention.

Referring to FIG. 6, a substrate 60 divided into an active region and an inactive region is provided. The division of the inactive region is achieved by forming a trench structure or forming a field oxide film in the inactive region. In the semiconductor device having a fine pattern, it is preferable to distinguish the inactive region from the active region as the trench structure.

Subsequently, the gate oxide layer 62 and the gate poly are sequentially stacked on the active region of the substrate 60. The gate poly and the gate oxide layer are patterned by performing a photolithography process. Accordingly, the gate electrode 64 is formed on the active region of the substrate 60.

The spacer 65 is formed on the sidewall of the gate electrode 64. First, an insulating film such as a thin film, for example, a nitride film, for forming a spacer 65 is uniformly stacked on the substrate 60 having the gate electrode 64. The insulating layer is removed until the surface of the substrate 60 is exposed by etching. Then, the insulating film remains only on the sidewall of the gate electrode 64. Accordingly, the remaining insulating film forms the spacer 65.

Next, ion implantation using the gate electrode 64 and the spacer 65 as an ion implantation mask is performed. In the case where the transistor to be formed is an N type, examples of the ions in the ion implantation include pentavalent Ph ions, and in the case of P type, trivalent B ions may be mentioned.

As described above, ions are implanted into the substrate 60 adjacent to the gate electrode 64 by the ion implantation. Thus, a transistor having source and drain regions 66a and 66b is formed in the substrate 60 adjacent to the gate electrode 64. In this case, when the ion implantation is performed before the spacer 65 is formed and the ion implantation is performed again after the spacer 65 is formed, a transistor having an LDD structure may be formed. .

Referring to FIG. 7, ion implantation is performed on the substrate 60 having the resultant product to have an amorphous crystal structure. The ion implantation implants arsenic (As), which is implanted to have a dose of about 1E19 / cm 3 at an energy of 10 to 50 KeV. Accordingly, the substrate 60 has an amorphous crystal structure.

Referring to FIG. 8, the substrate 60 having the amorphous crystal structure is first heat treated. As a result, the substrate 60 is stabilized. In this case, the first heat treatment is performed for 30 to 60 seconds in a temperature atmosphere of 700 to 850 ℃, or for 25 to 35 minutes in a temperature and nitrogen gas atmosphere of 800 to 850 ℃. In particular, when carried out for 25 to 35 minutes in a temperature of 800 to 850 ℃ and nitrogen gas atmosphere it is preferable to perform in the furnace. The temperature atmosphere in the primary heat treatment is preferably determined in consideration of the characteristics of the transistor.

As such, when the amorphous crystal structure is formed and the first heat treatment is performed, the substrate 60 damaged by ion implantation and etching to form the gate electrode 64, the source and drain regions 66a and 66b, and the like. This is somewhat compensated. That is, the substrate 60 is stabilized.

 Referring to FIG. 9, a metal film 67 is stacked on the gate electrode 64, the spacer 65, and the substrate 60 with a uniform thickness. Examples of the metal film 67 include a titanium film, a titanium nitride film, and the like. Although the metal film 67 is preferably a composite film in which a titanium film and a titanium nitride film are sequentially formed, the metal film 67 may also be used alone or in the titanium film.

Then, secondary heat treatment is performed. The secondary heat treatment is performed for about 30 to 40 seconds in a temperature atmosphere of about 700 to 750 ℃. By performing the second heat treatment, the metal film 67 reacts with silicon.

Referring to FIG. 10, a metal film of a portion of the metal film 67 that does not react with silicon is removed. The removal is mainly achieved by wet etching with HF solution. As a result, a metal film, that is, a silicide film 68 reacted with the silicon, is formed on the substrate 60. In this case, an active region surface of the substrate 60 and an upper surface of the gate electrode 64 become a region in which silicon reaction is possible on the substrate 60. Thus, the silicide layer 68 is formed on the substrate 60 surface of the source and drain electrodes 66a and 66b and the gate electrode 64.

Subsequently, the substrate 60 having the silicide layer 68 is subjected to a third heat treatment. The third heat treatment is to stabilize the silicide film 68 to have a lower resistance, so that the third heat treatment is performed for about 20 to 30 seconds in a temperature atmosphere of about 800 to 850 ℃.

As described above, in order to compensate for the damage to the substrate 60 to some extent, the crystal structure of the substrate 60 is changed before the formation of the silicide layer 68 and heat treatment is performed. Therefore, even when defects such as silicon depletion occur, no movement for overcoming the silicon depletion occurs, and only the point defects exist. Therefore, a short circuit of the silicide film 68 and a defect such as a leakage current of the source and drain regions 66a and 66b do not occur.

According to the present invention, damage to the substrate is recovered by adding a heat treatment process before lamination of the metal film for forming the silicide film. Accordingly, even when the silicide film is formed on the active region of 0.25 mu m or less, defects such as silicon depletion can be alleviated. Therefore, the defect due to the defect can be reduced.

Therefore, the method of the present invention can be actively applied to the formation of the silicide film of the recent semiconductor device by providing the stable formation of the silicide film.

Although the above has been described with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified and changed within the scope of the present invention without departing from the spirit and scope of the invention described in the claims below. I can understand that you can.

Claims (5)

Forming a transistor having a gate electrode, a source and a drain region on an active region of the substrate; Forming a crystal structure of the substrate into an amorphous structure by ion implantation using arsenic (As) ions; First heat treating the substrate; Uniformly forming a metal film on the substrate and the transistor structure; Secondary heat treatment of the substrate having the metal film to form the metal film partially as a silicide film; And And removing a metal film not formed of the silicide film. delete The method of claim 1, wherein the first heat treatment is performed in a temperature atmosphere of 700 to 850 ° C. for 30 to 60 seconds. The method of claim 1, wherein the first heat treatment is performed at a temperature of 800 to 850 ° C. and a nitrogen gas atmosphere for 25 to 35 minutes. The method of claim 1, wherein the metal film is a titanium film, a titanium nitride film, or a composite film in which they are sequentially stacked.

Images