KR100905475B1 - Liquid crystal display panel - Google Patents

Abstract

A first display panel including a black matrix, a white filter, and a common electrode; A second display panel disposed on the first substrate and spaced apart from the first substrate, the second display panel including a gate wiring having a gate electrode, a data wiring having a source electrode and a drain electrode, and a semiconductor layer overlapping the gate electrode, the source electrode, and the drain electrode; A liquid crystal layer formed between the first display panel and the second display panel; A backlight disposed under the first display panel, the backlight irradiating three light sources R, G, and B, the source electrode including a plurality of source electrode branches, the drain electrode including a plurality of drain electrode branches, A liquid crystal display device in which electrode branch portions and drain electrode branch portions are alternately formed.

Large TFT, FSC, Continuous Mixing, OCB Mode

Description

Liquid crystal display panel {Liquid crystal display panel}

1 is a layout view illustrating a large thin film transistor array panel according to a first exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along the line II-II 'of FIG. 1;

3 is a diagram illustrating a drop in data voltage due to a kickback phenomenon;

4 is a layout view illustrating a large thin film transistor array panel according to a second exemplary embodiment of the present invention.

5 is a layout view illustrating a large thin film transistor array panel according to a third exemplary embodiment of the present invention.

6 is a layout view illustrating a large thin film transistor array panel according to a fourth exemplary embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

123; Gate electrode 150; Semiconductor layer

173a; Source electrode branch portions 173b; Source electrode branch connection

175a; Drain electrode branch portion 175b; Drain electrode branch connection

The present invention relates to a liquid crystal display device, in particular a liquid crystal display device comprising a large thin film transistor array panel.

Recently, due to the rapid performance improvement of thin film transistor liquid crystal displays (TFT LCDs), the gap in technology gap between companies is narrowing, and the difference in competitiveness among companies is becoming an important measure of cost reduction. Therefore, the field sequential color (FSC) method, which can reduce more than about 25% of material costs, is a breakthrough technology and is becoming more realistic as the surrounding technology matures.

In the past, a liquid crystal display using a simultaneous additive color mixing method has been fabricated. In this method, a single pixel is divided into three and each subpixel of R, G, and B is called a spatial division type.

The FSC method, that is, the continuous additive mixed color method, implements pixels by sequentially flashing R, G, and B backlights in time without dividing one pixel into three.

However, the time division type continuous additive mixed color method does not require a color filter by using a backlight of R, G, and B, and thus the light efficiency is increased, and it is easy to improve the aperture ratio and the yield since the pixels are not divided into subpixels. The number of driving circuits required for each sub pixel can be reduced to one third, and the driving time interval of the pixels is short, so that it is easy to implement a moving image.

However, the continuous additive mixed color method increases the number of backlights to three and operates in time division, which requires an additional synchronous circuit, and the three backlights in one pixel must be sequentially flashed within a predetermined time, so that high speed operation can be achieved. The disadvantage is that a high performance transistor is required.

As described above, the FSC type liquid crystal display device requires a high performance TFT. In this case, the gate-on time becomes one-third of the conventional one because it operates in a time-dividing manner, and since the OCB mode (Optical compensated bend mode) is used for high-speed response, the liquid crystal dielectric constant is very large so that the current mobility of the TFT (On) is increased. current is more than 9 times that of existing.

This problem occurs when a 15-inch FSC type liquid crystal display device is manufactured, as compared with a 15-inch simultaneous additive mixed color liquid crystal display device.

15 inch additive blending method 15 inch FSC Pixel size 297 μm × 99 μm 297 μm × 297 μm Gate on time 21.7㎲ 14.5㎲ Liquid crystal capacitance 0.5 ㎊ 1.6 ㎊ TFT size (W / L) 20 μm / 3.5 μm 120 μm / 4.5 μm

As described above, in the case of using the FSC type liquid crystal display, the TFT size should be increased by about 4.5 times due to the increase in the liquid crystal capacity and the decrease in the gate on time. For this purpose, when manufacturing a TFT having a width / length of 120 μm / 4.5 μm, a long source electrode and a drain electrode in the width direction of about 4 to 5 μm in width should be formed. In this case, there is a risk of disconnection between the source and drain electrodes, and an increase in the kick-back voltage due to the increase of the parasitic capacitance Cgd formed between the gate electrode and the drain electrode may cause a poor image quality such as flicker. There are disadvantages.

 An object of the present invention for solving the above problems is to provide a liquid crystal display device capable of preventing disconnection of a drain electrode or a source electrode in the formation of a large size TFT.

Another object of the present invention is to provide a liquid crystal display device which prevents image quality defects such as flicker due to an increase in kick-back voltage due to an increase in Cgd in the formation of a large size TFT.

According to an aspect of the present invention, a liquid crystal display device includes: a first display panel including a black matrix, a white filter, and a common electrode; A second substrate disposed above the first substrate, the second substrate including a gate wiring having a gate electrode, a data wiring having a source electrode and a drain electrode, and a semiconductor layer overlapping the gate electrode, the source electrode and the drain electrode; Display panel; A liquid crystal layer formed between the first display panel and the second display panel; A backlight disposed under the first display panel and irradiating three light sources of R, G, and B, the source electrode including a plurality of source electrode branches, and the drain electrode including a plurality of drain electrode branches Preferably, the source electrode branch portion and the drain electrode branch portion are alternately formed. In addition, when the source electrode branch connection portion between the source electrode branch portion, and the drain electrode branch connection portion between the drain electrode branch portion, the source electrode branch portion is formed to correspond to the drain electrode branch connection portion at a predetermined interval, Preferably, the drain electrode branch portion is formed to correspond to the source electrode branch connection portion at a predetermined interval.

In addition, it is preferable that the backlight sequentially switches three light sources of R, G, and B.

The semiconductor layer is preferably formed between the source electrode branch portion and the drain electrode branch portion, and between the source electrode branch connection portion and the drain electrode branch portion.

In addition, it is preferable that the said drain electrode is U-shaped, and the said drain electrode branch part is a U-shaped vertical part.

In addition, the drain electrode is preferably a fork shape, the source electrode is preferably a wave shape.

The semiconductor layer may be formed between the source electrode branch portion and the drain electrode branch portion, between the source electrode branch connection portion and the drain electrode branch portion, and between the drain electrode branch connection portion and the source electrode branch portion. Do.

In addition, the drain electrode and the source electrode is preferably wavy.

The semiconductor layer is preferably formed between the source electrode branch and the drain electrode branch.

In addition, the drain electrode and the source electrode is preferably in the shape of a fork.

In addition, the source electrode branch is preferably one more than the drain electrode branch.                     

According to an aspect of the present invention, a liquid crystal display device includes: a first display panel including a black matrix, a white filter, and a common electrode; A gate wiring disposed above the first substrate and spaced apart from the first substrate, the gate wiring including an insulating substrate, a gate line formed in a horizontal direction on the insulating substrate, and a gate electrode connected to the gate line, and a gate covering the gate wiring An insulating film, a semiconductor layer formed over the gate insulating film on the gate electrode, a data line formed vertically over the gate insulating film, a source electrode connected to the data line and extending over the semiconductor layer, and the semiconductor layer A second display panel including a data line including a drain electrode spaced apart from the source electrode by a predetermined distance from the top; A liquid crystal layer formed between the first display panel and the second display panel; A backlight disposed under the first display panel and irradiating three light sources of R, G, and B, the source electrode including a plurality of source electrode branches, and the drain electrode including a plurality of drain electrode branches Preferably, the source electrode branch portion and the drain electrode branch portion are alternately formed.

In addition, it is preferable that the backlight sequentially switches three light sources of R, G, and B.

Hereinafter, with reference to the accompanying drawings will be described the configuration of the present invention according to a preferred embodiment of the present invention.

 1 is a layout view of a first display panel of a liquid crystal display according to a first exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along the line II-II ′ of FIG. 1.                     

The liquid crystal display according to the first exemplary embodiment of the present invention includes a first display panel (not shown) including a black matrix, a white filter, and a common electrode, and an upper portion spaced apart from the first substrate by a predetermined distance. A second display panel having an electrode and a drain electrode, and a liquid crystal layer formed between the first display panel and the second display panel. The display device includes a backlight disposed under the first display panel and sequentially switching three light sources of R, G, and B.

Unlike the conventional liquid crystal display, only the white filter is formed on the first display panel without the color filters R, G, and B, and the backlight itself sequentially irradiates three light sources of R, G, and B. Therefore, the pixel area is wider because the pixel area is not distinguished by three color filters of R, G, and B.

1 and 2, gate wirings 121 and 123 are formed on a transparent insulating substrate 110 such as glass. The gate lines 121 and 123 include a gate line 121 formed in the horizontal direction on the insulating substrate 110 and a gate electrode 123 connected to the gate line 121. The gate wirings 121 and 123 are covered with the gate insulating layer 140, and the semiconductor layer 150 made of amorphous silicon is formed on the gate insulating layer 140. An ohmic contact layer 160 made of amorphous silicon doped with N-type impurities such as phosphorus is formed on the semiconductor layer 150 at regular intervals. The data lines 171, 173, and 175 are formed on the contact layer 160. The data lines 171, 173, and 175 include a data line 171, a source electrode 173, and a drain electrode 175.                     

As shown in FIG. 2, the source electrode 173 includes a plurality of source electrode branch portions 173a and a source electrode branch connection portion 173b connecting the source electrode branch portions. The drain electrode 175 includes a plurality of drain electrode branch portions 175a and a drain electrode branch connection portion 175b connecting the drain electrode branch portions. The drain electrode 175 has a fork shape having a plurality of branch portions, and the source electrode 173 has a wave shape having a plurality of branch portions. That is, the fork shape means that the branch connection part is a straight line shape, and the wavy shape means that the branch connection part is polygonal or circular.

Preferably, the source electrode branch portion 173a is one more than the drain electrode branch portion 175a. 1 and 2 illustrate five source electrode branch portions 173a and four drain electrode branch portions 175a.

The source electrode branch portions 173a and the drain electrode branch portions 175a are alternately formed to be spaced apart from each other by a predetermined interval. That is, as illustrated in FIG. 1, the drain electrode branch 175a and the source electrode branch 173a are alternately formed at regular intervals on the contact layer 160 like the contact layer 160.

The source electrode branch portion 173a is formed to be spaced apart from the drain electrode branch connecting portion 175b by a predetermined interval, and the drain electrode branch portion 175a is formed to be spaced apart from the source electrode branch connecting portion 173b. Formed.

The semiconductor layer 150 is formed between the source electrode branch 173a and the drain electrode branch 175a. The semiconductor layer 150 is formed between the source electrode branch connection part 173b and the drain electrode branch part 175a corresponding thereto. Accordingly, voltages applied through the plurality of source electrode branch portions 173a and the source electrode branch connection portion 173b are transferred to the plurality of drain electrode branch portions 175a via the semiconductor layer 150.

This arrangement is to reduce the parasitic capacitance Cgd formed between the gate electrode 123 and the drain electrode 175. That is, a capacitance is formed between the gate electrode 123 and the plurality of drain electrodes 175. The capacitance increases in proportion to the area where the gate electrode 123 and the drain electrode 175 overlap each other.

As described above, in the first preferred embodiment of the present invention, a plurality of source electrode branch portions 173a and a plurality of drain electrode branch portions 175a are formed per pixel area. Thus, the source electrode 173 and the drain electrode 175 are formed to include the plurality of source electrode branch portions 173a and the plurality of drain electrode branch portions 175a, and the source electrode branch portions 173a and the drain electrode branches By allowing the portion 175a to overlap the gate electrode 123, an area in which the drain electrode 175 overlaps with the gate electrode 123 may be reduced.

Therefore, as the overlapping area of the drain electrode 175 and the gate electrode 123 is reduced, the Cgd becomes smaller, thereby reducing the kick-back voltage of the thin film transistor, thereby reducing the occurrence of poor image quality. Hereinafter, the Cgd and the kick-back voltage will be described in detail.

The voltage applied to the pixel region through the data line 171 is a kick-back phenomenon. As shown in FIG. 3, the kick-back phenomenon occurs when the data voltage Vd applied to the pixel region through the data line, that is, the drain electrode, slowly decreases over time. It is a sudden voltage drop. In FIG. 3, ΔVp represents a voltage drop caused by the kick-back phenomenon.

This kick-back phenomenon is caused by the parasitic capacitance Cgd formed between the gate electrode 123 and the plurality of drain electrode branch portions 175a. Therefore, only a voltage corresponding to the difference between the initial data voltage and ΔVp is actually applied to the pixel region.

As described above, since the kick-back phenomenon is caused by Cgd, the voltage drop can be adjusted by Cgd, which is determined in proportion to the overlapping area between the gate electrode 123 and the plurality of drain electrode branches 175a. By adjusting Cgd, you can lower the voltage drop.

Since the voltage drop value ΔVp caused by the kick-back phenomenon causes afterimage or flicker, it is desirable to minimize the voltage drop.

 Thus, it can be confirmed that when the overlap region is smaller, for example, when the Cgd is 0.110 mV in the conventional liquid crystal display device having a thickness of 120 m / 4.5 m, 0.068 mV is shown in the first embodiment of the present invention.

A liquid crystal display according to a second embodiment of the present invention will be described.

4 is a layout view of a second display panel of the liquid crystal display according to the second exemplary embodiment of the present invention. Here, the same reference numerals as in the above-described drawings indicate the same members having the same function.

In this case, the drain electrode 175 is U-shaped, and the drain electrode branch portion 175a is a U-shaped vertical portion. The source electrode branch portion 173a has a curved shape and surrounds the drain electrode branch portion 175a.

The semiconductor layer 150 is formed between the source electrode branch portion 173a and the drain electrode branch portion 175a, and the semiconductor layer 150 is formed between the source electrode branch connection portion 173b and the drain electrode branch portion 175a. Formed. Therefore, the voltage applied through the two source electrode branch portions 173a and the source electrode branch connection portion 173b is transferred to the drain electrode branch portion 175a via the semiconductor layer 150.

This second embodiment is to reduce the overlap area between the gate electrode 123 and the drain electrode 175 to reduce the kick-back phenomenon.

 As the overlap region becomes smaller, it can be confirmed that, for example, when the Cgd is 0.110 mV in the conventional large-size thin film transistor array panel having a thickness of 120 m / 4.5 m, 0.069 mV is shown in the second embodiment of the present invention.

A liquid crystal display according to a third embodiment of the present invention will be described.

5 is a layout view of a second display panel of the liquid crystal display according to the third exemplary embodiment of the present invention. Here, the same reference numerals as in the above-described drawings indicate the same members having the same function.

The source electrode branch portion 173a is preferably one more than the drain electrode branch portion 175a. In FIG. 5, four source electrode branch portions 173a and three drain electrode branch portions 175a are illustrated.

In this case, the drain electrode 175 is wavy, and the source electrode 173 is wavy, and the gap between the source electrode branch portion 173a and the drain electrode connection portion 175b, the source electrode branch portion 173a and the drain The intervals between the electrode branch portions 175a and the intervals between the drain electrode branch portions 175a and the source electrode branch connection portions 173b are formed to be the same.

The semiconductor layer 150 is formed between the source electrode branch portion 173a and the drain electrode branch portion 175a, and the semiconductor layer 150 is formed between the source electrode branch connection portion 173b and the drain electrode branch portion 175a. The semiconductor layer 150 is formed between the drain electrode branch connection portion 175b and the source electrode branch portion 173a. Accordingly, the voltages applied through the plurality of source electrode branch portions 173a and the source electrode branch connection portions 173b pass through the semiconductor layer 150, and thus, the plurality of drain electrode branch portions 175a and the drain electrode branch connection portions 175b. Is passed to.

This third embodiment is to reduce the overlap area between the gate electrode 123 and the drain electrode 175 to reduce the kick-back phenomenon.

 As the overlap region is reduced in this manner, for example, when Cgd is 0.110 mW in a conventional large-size thin film transistor array panel having a thickness of 120 m / 4.5 m, it can be confirmed that 0.087 mW is shown in the third embodiment of the present invention.

A liquid crystal display according to a fourth embodiment of the present invention will be described.

5 is a layout view of a second display panel of the liquid crystal display according to the fourth exemplary embodiment of the present invention. Here, the same reference numerals as in the above-described drawings indicate the same members having the same function.                     

The source electrode branch portion 173a is preferably one more than the drain electrode branch portion 175a. In FIG. 5, five source electrode branch portions 173a and four drain electrode branch portions 175a are illustrated.

In this case, the drain electrode 175 is in a fork shape, and the source electrode 173 is also in a fork shape, and is formed such that the distance between the source electrode branch portion 173a and the drain electrode branch portion 175a is the same. The semiconductor layer 150 is formed between the source electrode branch 173a and the drain electrode branch 175a.

Accordingly, voltages applied through the plurality of source electrode branch portions 173a are transferred to the plurality of drain electrode branch portions 175a via the semiconductor layer 150.

This fourth embodiment is to reduce the overlap area between the gate electrode 123 and the drain electrode 175 to reduce the kick-back phenomenon.

 As the overlap region becomes smaller, it can be confirmed, for example, that when Cgd is 0.110 mV in a conventional large-size thin film transistor array panel having a thickness of 120 m / 4.5 m, 0.097 mV is shown in the fourth embodiment of the present invention.

Although the present invention has been described with reference to several embodiments, these are merely illustrative of the present invention and the present invention is not limited to these examples. Those skilled in the art will recognize that various modifications may be made to the present invention, although not specifically disclosed herein, and that such modified embodiments are also within the spirit and scope of the present invention.

 According to the present invention as described above, disconnection of the drain electrode or the source electrode is formed by forming the drain electrode and the source electrode so that the overlap region between the gate electrode and the drain electrode is reduced in the formation of the large-sized TFT required to realize the FSC type liquid crystal display device. It has the effect that it can prevent.

In addition, by forming the drain electrode and the source electrode such that the overlap region between the gate electrode and the drain electrode is reduced in the formation of the large TFT required to realize the FSC type liquid crystal display device, the Cgd component is reduced and thus the kick-back voltage is reduced. This can reduce the incidence of poor image quality such as flicker.

Claims (13)

A first display panel including a black matrix, a white filter, and a common electrode; A second substrate disposed above the first display panel and spaced apart from the first display panel and including a gate wiring having a gate electrode, a data wiring having a source electrode and a drain electrode, and a semiconductor layer overlapping the gate electrode, the source electrode and the drain electrode; Display panel; A liquid crystal layer formed between the first display panel and the second display panel; The backlight disposed under the first display panel and irradiates three light sources of R, G, and B toward the first display panel. Wherein the source electrode includes a plurality of source electrode branch portions, the drain electrode includes a plurality of drain electrode branch portions, and the source electrode branch portion and the drain electrode branch portion are alternately formed with each other. . In claim 1, And the backlight sequentially switches three light sources of R, G, and B. In claim 2, When the source electrode branch connecting portion is connected between the source electrode branch portion and the drain electrode branch connecting portion is the drain electrode branch connecting portion, the source electrode branch portion is formed to correspond to the drain electrode branch connecting portion at a predetermined interval. The drain electrode branch portion is formed to correspond to the source electrode branch connection portion spaced apart by a predetermined interval. In claim 3, And the semiconductor layer is formed between the source electrode branch portion and the drain electrode branch portion, and between the source electrode branch connection portion and the drain electrode branch portion. In claim 4, And the drain electrode is in a U-shape, and the drain electrode branch is a U-shaped vertical part. In claim 4, The drain electrode has a fork shape, and the source electrode has a wave shape. In claim 3, And the semiconductor layer is formed between the source electrode branch portion and the drain electrode branch portion, between the source electrode branch connection portion and the drain electrode branch portion, and between the drain electrode branch connection portion and the source electrode branch portion. In claim 7, The drain electrode and the source electrode are wavy liquid crystal display device. In claim 3, And the semiconductor layer is formed between the source electrode branch and the drain electrode branch. In claim 9, The drain electrode and the source electrode is a fork-shaped liquid crystal display device. The word of claim 4, 7, or 9, wherein The source electrode branch portion is one more liquid crystal display than the drain electrode branch portion. A first display panel including a black matrix, a white filter, and a common electrode; A gate wiring disposed above the first display panel at a predetermined interval and including an insulating substrate, a gate line formed in a horizontal direction on the insulating substrate, and a gate electrode connected to the gate line, and a gate covering the gate wiring An insulating film, a semiconductor layer formed over the gate insulating film on the gate electrode, a data line formed vertically over the gate insulating film, a source electrode connected to the data line and extending over the semiconductor layer, and the semiconductor layer A second display panel including a data line including a drain electrode spaced apart from the source electrode by a predetermined distance from the top; A liquid crystal layer formed between the first display panel and the second display panel; The backlight disposed under the first display panel and irradiates three light sources of R, G, and B toward the first display panel. Wherein the source electrode includes a plurality of source electrode branch portions, the drain electrode includes a plurality of drain electrode branch portions, and the source electrode branch portion and the drain electrode branch portion are alternately formed with each other. . In claim 12, And the backlight sequentially switches three light sources of R, G, and B.

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