KR100802452B1 - Light-emitting device, method for manufacturing same, and led lamp - Google Patents

Light-emitting device, method for manufacturing same, and led lamp Download PDF

Info

Publication number
KR100802452B1
KR100802452B1 KR1020057011483A KR20057011483A KR100802452B1 KR 100802452 B1 KR100802452 B1 KR 100802452B1 KR 1020057011483 A KR1020057011483 A KR 1020057011483A KR 20057011483 A KR20057011483 A KR 20057011483A KR 100802452 B1 KR100802452 B1 KR 100802452B1
Authority
KR
South Korea
Prior art keywords
light emitting
substrate
layer
surface
light
Prior art date
Application number
KR1020057011483A
Other languages
Korean (ko)
Other versions
KR20050091736A (en
Inventor
타카키 야수다
Original Assignee
쇼와 덴코 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
Priority to JP2002369092A priority Critical patent/JP4201079B2/en
Priority to JPJP-P-2002-00369092 priority
Application filed by 쇼와 덴코 가부시키가이샤 filed Critical 쇼와 덴코 가부시키가이샤
Publication of KR20050091736A publication Critical patent/KR20050091736A/en
Application granted granted Critical
Publication of KR100802452B1 publication Critical patent/KR100802452B1/en
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=32677134&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=KR100802452(B1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.

Links

Images

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22Roughened surfaces, e.g. at the interface between epitaxial layers
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/0242Crystalline insulating materials
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/02428Structure
    • H01L21/0243Surface structure
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639Preparation of substrate for selective deposition

Abstract

In a semiconductor light emitting device having a substrate 1, a semiconductor layer 3, and a light emitting layer 5, a concave-convex structure 2 having a side surface inclined at 30 ° to 60 ° on the surface on which the semiconductor layer of the substrate is laminated is provided. It is provided with the light emitting element which improved the light extraction effect.

Description

LIGHT-EMITTING DEVICE, METHOD FOR MANUFACTURING SAME, AND LED LAMP}

The present invention relates to a light emitting diode (LED) having improved light extraction efficiency, a method of manufacturing the same, and an LED lamp using the light emitting device.

A light emitting device having increased energy consumption efficiency (external quantum efficiency) has been required to promote energy saving. In a GaN-based light emitting diode laminated on a sapphire substrate, the external quantum efficiency of a conventional light emitting diode (LED) around 382 nm was 24% in Japanese Patent Laid-Open No. 2002-164296. The external quantum efficiency is decomposed into three elements as a product of "internal quantum efficiency x voltage efficiency x light extraction efficiency", but two elements other than the measurable voltage efficiency (about 90 to 95%) cannot be measured. Increasingly, improvement of internal quantum efficiency by crystal quality and structure optimization has been mainly studied. On the other hand, as an example of improving the light extraction efficiency, the LED chip is covered with a resin having a refractive index close to the semiconductor, the emitted light is efficiently transmitted to the resin, and the resin surface is processed into a spherical surface to suppress total reflection between the resin and the air interface. The method has been done in the past. In addition, as an example of realizing double the light extraction efficiency by grinding the substrate in a mesa type, Cree is commercially available as an X-Bright series.

On the other hand, as a method of performing low potential of semiconductor crystal, the method of forming an unevenness | corrugation on the surface of a semiconductor crystal substrate and growing it is known. For example, in the group III nitride semiconductor, it is shown that the dislocation density can be reduced by forming stripe grooves on the surface of the sapphire substrate and epitaxially growing the group III nitride semiconductor crystal at a high temperature on the low temperature growth GaN buffer layer. . It is said that the inclination angle of the groove is preferably 60 ° or more for reducing the dislocation density (see, for example, Japanese Laid-Open Patent Publication No. 2002-164296, K. Tadatomo, et al., Japanese Journal of Applied Physics, 2001). , Vol. 40, p. L583-L585). However, these documents do not mention the light extraction efficiency.

In general, since the refractive index of the light emitting layer is larger than the refractive index of the external medium, the light emitting element (LED) cannot emit light having an incident angle larger than the total reflection angle from the light emitting layer to the outside.

The present invention provides a light emitting device which makes it possible to take out light rays totally reflected from the light emitting layer to the outside by introducing unevenness having inclined sides at the interface between two layers having different refractive indices, thereby increasing the light extraction efficiency; It is an object of the present invention to provide a manufacturing method and an LED lamp using the light emitting device.

First, a description will be given of the theodolite reaching the present invention.

In order to estimate the above-mentioned undetectable light extraction efficiency and internal quantum efficiency, the present inventor estimated the light extraction efficiency from LED by optical simulation. As a model of the simplified LED, a structure in which a GaN layer having a width of 300 μm and a thickness of 6.1 μm was laminated on a sapphire substrate having a width of 300 μm and a thickness of 100 μm. A point light source which isotropically emits light at a point in the GaN layer having a thickness of 0.1 µm from the GaN surface at the center of 300 µm in width and width is disposed. The refractive index was assumed to be n = 1.8 for sapphire and n = 2.7 for 380 nm of emission wavelength or n = 2.4 for 380 nm of emission wavelength, respectively, and the outside thereof was filled with a silicone resin of n = 1.4. The refractive index for each GaN wavelength was measured by measuring a commercially available GaN bulk substrate. A large number of light beams were generated in a random direction from the point light source (Monte Carlo method), and the light beams were branched according to the ratio calculated by the light beams and the light beams refracting according to Fresnel's equation at each interface having a different refractive index. The number of light generation was 500,000, and the branch limit was 10 times. On the back surface of the substrate, a light condensing surface was virtually set from the interface of each of the semiconductor layer surface and the side surface and the resin to the resin side, and the light extraction efficiency from each surface was calculated.

Table 1 shows the substrate surface, the semiconductor layer surface, and the side surface of each case where the uneven structure is not formed on the substrate (1, 2) and the uneven structure shown in FIG. 1 is formed on the surface of the substrate (3). The result of having calculated the light extraction efficiency by simulation is shown.

Table 1

Calculation of Light Extraction Efficiency Refractive index Substrate surface Semiconductor layer surface  Side (GaN side, Sapphire side) Sum ①LED light emitting wavelength 400nm with GaN / sapphire sealed with silicon resin Resin n = 1.4, GaN n = 2.4 sapphire substrate n = 1.8 7.1% 7.4% 10.1% × 4 = 40.4% (7.4%, 2.7%) 54.9% ② Homogeneous emission wavelength 382nm Resin n = 1.4, GaN n = 2.4 sapphire substrate n = 1.8 5.1% 5.4% 7.2% × 4 = 28.8% (5.4%, 1.8%) 39.3% ③LED emission wavelength 382nm with concavo-convex structure (Fig. 1) with side slant angle of 45 ° at GaN / sapphire interface Resin n = 1.4, GaN n = 2.4 sapphire substrate n = 1.8 25.7% 5.3% 15.3% (0.5%, 14.8%) of sides perpendicular to the stripe groove × 2 15.4% (0.5%, 14.9%) of sides parallel to the stripe groove 92.4%

According to this result, when the uneven structure was not formed in the substrate, the total light extraction efficiency was about 55% at the emission wavelength of 400 nm and about 40% at 382 nm.

This result is applied to the LED described in the Japanese Journal of Applied Physics. This document describes an LED of a group III nitride semiconductor using a sapphire substrate with an external quantum efficiency of 24% at a light emission wavelength of 382 nm and 30% at 400 nm. 24% of this external quantum efficiency

24% = internal quantum efficiency 60% x voltage efficiency 95% x light extraction efficiency 40%

Assume that 30%,

30% = internal quantum efficiency 60% x voltage efficiency 90% x light extraction efficiency 55%

It is assumed that all internal quantum efficiencies irrespective of the emission wavelength can be uniformly described as 60%, and the results of the simulation are considered to be approximately valid.

According to this simulation, the light extraction efficiency is about 55% at a wavelength of 400 nm and about 40% at a wavelength of 382 nm, indicating that there is room for improvement of 1.8 times and 2.5 times, respectively. In addition, there is room for improvement of about 1.6 times in internal quantum efficiency. Among these, this invention is concerned with light extraction efficiency.

According to the detailed analysis of the simulation results, when sealed with a resin having a refractive index of n = 1.4, the light rays transmitted from the GaN layer to the sapphire substrate are extracted to the outside through 100% resin, and the light beam group trapped in the GaN layer is It was found that how to take out the sapphire substrate or the resin is important for improving the light extraction efficiency.

In order to efficiently transmit light rays from the GaN layer to the sapphire substrate or resin, the interface between the GaN layer and the substrate may be inclined so that the angle at which the light rays enter the interface does not exceed the total reflection angle. The optimal tilt angle is 45 degrees. Table 1 shows the calculation results when a stripe-shaped concave-convex structure 2 having an inclination angle of 45 ° shown in Fig. 1 is introduced at the interface between the GaN layer 3 and the sapphire substrate 1. Although the light extraction efficiency from the semiconductor layer surface to the outside through the resin does not change much, it can be seen that the light extraction efficiency from the sapphire back surface or the side surface to the outside is improved. As a result, in the case of the light emission wavelength 382 nm (GaN refractive index 2.7) as a total, the improvement of the light extraction efficiency more than twice compared with (2) was anticipated. Moreover, about the ratio of the upper surface, the bottom surface, and the inclined surface of the uneven structure, the structure of only the inclined surface without the upper surface and the bottom surface is preferable because the effect of improving the light extraction efficiency is the highest.

The present invention has been made based on the results of the above simulation.

The present invention provides a light emitting device having a substrate, a semiconductor layer, and a light emitting layer, wherein the refractive index of the substrate and the semiconductor layer stacked thereon are different, and the unevenness having the inclined side surface is formed on the surface of the semiconductor layer of the substrate. The angle θ with respect to the substrate surface on the inclined side is set to 30 ° <θ <60 °.

In the light emitting device having the substrate, the semiconductor layer, and the light emitting layer, the present invention is formed by forming the unevenness having the inclined side surface on the stacked interface of the semiconductor layers with different refractive indices.

In the above light emitting device, the angle θ with respect to the substrate on the inclined side surface of the unevenness is 30 ° <θ <60 °.

In the above light emitting device, the unevenness includes any one of a V-shaped groove in a stripe shape, a side inclined protrusion in a stripe shape, and a side inclined pit.

In the light emitting device, the substrate includes sapphire (Al 2 O 3 ), and the semiconductor layer includes Al x Ga y In 1-xy N (0 ≦ X ≦ 1, 0 ≦ y ≦ 1).

In addition, in the method for manufacturing a light emitting device having a substrate, a semiconductor layer, and a light emitting layer, the present invention provides unevenness to the surface of the side on which the semiconductor layer of the substrate is laminated by any one of high temperature treatment, selective etching, and grinding. It includes the manufacturing method of the light emitting element described above.

In addition, in the method of manufacturing a light emitting device having a substrate, a semiconductor layer, and a light emitting layer, the present invention provides a semiconductor substrate by forming a mask for selective growth on the surface of the substrate and forming projections of the semiconductor having inclined sides on the substrate. The manufacturing method of the above-mentioned light emitting element which consists of forming the unevenness | corrugation which has inclined side surface in the laminated interface of a layer is included.

In addition, the present invention provides a method of manufacturing a light emitting device having a substrate, a semiconductor layer, and a light emitting layer, wherein any one of high temperature treatment, selective etching, and grinding is used to form irregularities having inclined sides on the surface of the semiconductor layer. The manufacturing method of the above-mentioned light emitting element which consists of forming the unevenness | corrugation which has inclined side surface in the laminated interface of a semiconductor layer is included.

In addition, the present invention provides a method of manufacturing a light emitting device having a substrate, a semiconductor layer, and a light emitting layer, wherein a mask for selective growth is formed on the surface of the semiconductor layer, and the protrusions of the semiconductor having the inclined side surfaces are formed on the semiconductor layer. It includes a method for producing a light emitting element described above.

The present invention also includes an LED lamp using the light emitting element described above.

As described above, the present invention has been made possible to improve the light extraction effect by forming the concave-convex structure of which the side surface is inclined on the surface of the substrate of the semiconductor light emitting element or the stacked interface between the semiconductors.

Fig. 1 is a schematic view of a sapphire substrate in which a GaN layer used for optical simulation is laminated, in which a concavo-convex structure having a side surface having an inclination angle of 45 ° is formed in a stripe shape on the substrate surface.

2 is a schematic diagram showing an example of the structure of a semiconductor light emitting device according to the present invention.

Fig. 3 (a) is a schematic diagram in which a V-shaped groove is formed as an uneven structure formed on a substrate or the like in the present invention.

Fig. 3 (b) is a schematic diagram of a concave-convex structure formed on a substrate or the like according to the present invention, which is hexagonal in shape and has a trapezoidal pit in cross section.

Fig. 3 (c) is a schematic diagram of a concave-convex structure formed on a substrate or the like in the present invention, in which triangular protrusions are formed in a stripe shape.

4 is a schematic diagram of an LED lamp using the light emitting device according to the present invention.

In the light emitting device of the present invention, uneven surfaces of which the side surfaces are inclined are formed on the surface of the substrate or the lamination interface between the semiconductor layers. The reflection of light in the interface between the substrate and the semiconductor layer laminated thereon or in the lamination interface between the semiconductor layers occurs when the refractive indices of both are different in the lamination interface. The present invention allows as much light as possible to be taken out of the LED when the refractive indices of both are different.

Although the detailed description of the mechanism by which the light extraction efficiency is improved by forming the irregularities as described above is omitted, qualitatively, when the lamination interface is flat, the light reflected at the interface is repeated in the same state even if the reflection is repeated. Although it rarely comes out, if there is an unevenness at the interface, even if it is reflected once, the light incident on the interface may be less than the total reflection angle, and when these are repeated, it is considered that more light is finally emitted to the outside.

In the light emitting device of the present invention, one surface of the substrate (the side on which the semiconductor layer is laminated, the same below) forms irregularities of which side surfaces are inclined, and two of the light emitting elements of the present invention are provided at the interface on which the semiconductor layers are laminated. It is formed. As shown in FIG. 2, a semiconductor layer 3 such as a buffer layer, an n-type semiconductor layer 4, a light emitting layer 5, a p-type semiconductor layer 6, or the like is formed on the substrate 1 in a multilayer manner. In one embodiment, the unevenness 2 is formed on the surface of the substrate 1, but the surface on which the unevenness is formed is not limited to the surface of the substrate, and any surface may be used as long as it is an interface between two semiconductor layers having different refractive indices. It is preferable to select either large interface. The stacking interface of the semiconductor layer also includes an interface between the semiconductor layer and the light emitting layer.

In the present invention, representative examples of the uneven structure formed on the substrate and the like are schematically shown in Figs. Fig. 3 (a) shows a V-shaped groove formed on the surface of the substrate in a stripe shape, Fig. 3 (b) shows a hexagonal vertebral shape and a trapezoidal pit on the surface of the substrate, and Fig. 3 (c) shows a substrate. A triangular projection of a semiconductor is formed on the surface in a stripe shape. Angle (theta) shown in a figure is an angle of the inclined side surface of the unevenness | corrugation with respect to a board | substrate surface. 45 degrees is most preferable for the angle (theta) of the inclined side surface of the unevenness | corrugation formed in a board | substrate, However, if it is a range of 30 degrees <(theta) <60 degrees, it is fully effective.

Although it does not restrict | limit especially about the angle of the inclined side surface of the unevenness | corrugation formed in the interface of semiconductors, In the case of a board | substrate, the range of 30 degrees <(theta) <60 degrees is similarly preferable.

The unevenness formed in the substrate or the like can be matched or intentionally shifted in the plane direction of the substrate or the semiconductor layer. Uneven | corrugated size and depth can be selected arbitrarily. However, in consideration of planarizing the surface of the group III nitride semiconductor crystal grown on the interface having irregularities, the diameter of the recess is preferably 3 µm or less and the depth of the recess is 2 µm or less. As shown in Non-Patent Document 1, planarization can be easily realized by appropriately selecting growth conditions of the semiconductor layer.

The method of forming the irregularities on the substrate or the like of the present invention includes the formation of pits by high temperature treatment, the formation of stripe grooves and pits by selective etching, or the formation of V-shaped grooves using an abrasive material. Here, the V-shaped grooves include those having a flat bottom portion and those with a somewhat rounded side surface. Although they are in the shape of recesses, they can also be masked on a substrate or the like to selectively grow a semiconductor, for example, to form projections having a triangular cross section in a stripe shape.

The angle θ of the inclined surface of the uneven surface formed by the above-described method falls in the range of 30 ° to 60 ° in most cases in the grinding method, and the pits due to the high temperature treatment are approximately determined by the crystal plane and become 58 ° and 43 °. . In addition, when a predetermined mask is made of SiN and AlN or GaN is grown thereon, the inclination angle of the triangular protrusion formed is 58 ° or 43 °.

In the present invention, sapphire, GaN, AlN, SiC, glass, Si, GaAs, GaP and the like can be used as the substrate. Among them, it is particularly preferable that the substrate is sapphire (Al 2 O 3 ) and the semiconductor layer is a group III nitride semiconductor.

As the surface orientation of the sapphire substrate, m surface, a surface, c surface, or the like can be used. Among them, c surface ((0001) surface) is preferable, and the vertical axis of the substrate surface is inclined in a specific direction from the <0001> direction. It is desirable to have. Moreover, since the board | substrate used for this invention can maintain the state of the surface of a board | substrate in a predetermined state, if it pre-processes, such as organic cleaning and an etching, before using for a 1st process.

In the production of the light emitting device of the present invention, a conventionally known method can be used for the growth of the n-type layer, the p-type layer, the light-emitting layer, the formation of the electrode, and the resin sealing. As the growth method of the semiconductor, an organometallic chemical vapor growth method (MOCVD method) or a vapor phase epitaxy method (VPE method) can be used as the vapor phase growth method. Among them, the MOCVD method is preferable because unnecessary uneven structure can be flattened.

As shown in Fig. 4, the light emitting device of the present invention can be preferably used as a shell type LED lamp after bonding on a sub-mount 34 and connecting to a lead frame and sealing with resin.

Hereinafter, although this invention is demonstrated concretely based on an Example, this invention is not limited to the following Example.

Example 1

In Example 1, a sapphire substrate having a surface of (0001) was used. Pure water was applied to the sand paper to which the diamond-based abrasive material was applied, and friction was formed while moving in the <1-100> direction of the sapphire substrate, thereby forming an uneven structure on the line in the approximately <1-100> direction. The cross-sectional shape of the concave portion observed by SEM had a triangular shape (V-shaped groove shape) having a width of 1 μm and a depth of 0.5 μm. The angle θ formed between the rising slope of the V-shaped groove and the substrate plane was in the range of approximately 30 ° to 60 ° around 45 °. As a result of observing with a 600 times optical microscope, the ratio of the area of the flat part and the area of the wound part was 2: 1 on average.

The sapphire substrate with the V-shaped grooves thus formed was sufficiently washed and put into a MOCVD apparatus. On the sapphire substrate, as a first step, a gas containing a gas in which a vapor of trimethylaluminum (TMAl) and a vapor of trimethylgallium (TMGa) are mixed in a molar ratio of 1: 2 and ammonia (NH 3 ) is added. The process which distribute | circulates the gas to contain was implemented. The V / III ratio under the conditions used in the first step is about 85. Subsequently, as a second step, TMGa and ammonia were circulated to grow gallium nitride, and a GaN layer made of gallium nitride crystals was produced on a sapphire substrate processed into an uneven state.

The 1st process and the 2nd process which produce the sample containing the said GaN layer were performed in the following procedures using MOCVD method.

First, before the introduction of the sapphire substrate whose surface is processed into irregularities, the deposits attached to the inside of the reactor in the previous growth performed by the same apparatus are heated and nitrided in a gas containing ammonia and hydrogen so that they are no longer decomposed. did. Waiting for the reaction furnace to cool down to room temperature, the sapphire substrate mounted on the carbon susceptor for heating in the glove box by which nitrogen gas was substituted was introduce | transduced into the quartz reaction furnace installed in the RF coil of an induction heating type heater. After the sample was introduced, nitrogen gas was passed through to purge the inside of the reactor. After flowing nitrogen gas over 10 minutes, the induction heating type heater was operated to raise the substrate temperature to 1170 ° C over 10 minutes. While the substrate temperature was maintained at 1170 ° C, the substrate surface was left for 9 minutes while flowing hydrogen gas and nitrogen gas, and thermal cleaning of the substrate surface was performed.

During the thermal cleaning, the hydrogen carrier gas is circulated and bubbling through the piping of the vessel (bubble) containing trimethylgallium (TMGa), which is a raw material connected to the reactor, and the vessel (bubble) containing trimethyl aluminum (TMAl). Started. The temperature of each bubbler was adjusted uniformly using the thermostat for adjusting temperature. The vapors of TMGa and TMAl generated by bubbling were distributed to the piping to the decontamination apparatus together with the carrier gas until the growth process began, and were discharged out of the system through the decontamination apparatus. After the completion of the thermal cleaning, the valve of the nitrogen carrier gas was closed, and only hydrogen was supplied to the gas in the reactor.

After switching of the carrier gas, the temperature of the substrate was lowered to 1150 ° C. After confirming that the temperature was stable at 1150 ° C, the valve of the ammonia pipe was opened, and distribution of ammonia into the furnace was started. Subsequently, the first step of switching the valves of the pipes of TMGa and TMAl at the same time, supplying a gas containing the vapor of TMGa and TMAl into the reactor and attaching the group III nitride semiconductor on the sapphire substrate was disclosed. The mixing ratio of TMGa and TMAl to be supplied was adjusted to be 2: 1 at a molar ratio in the flow regulator installed in the bubbling pipe, and the amount of ammonia was adjusted so that the V / III ratio was 85.

After 6 minutes of treatment, the valves of the pipes of TMGa and TMAl were simultaneously switched to stop the supply of gas containing TMGa and TMAl into the reactor. Then, supply of ammonia was also stopped and it was maintained for 3 minutes as it is.

After annealing for 3 minutes, the valve of the piping of ammonia gas was switched, and supply of ammonia gas in the furnace was restarted. The ammonia was passed through for 4 minutes as it was. In the meantime, the flow volume of the flow regulator of the TMGa piping was adjusted. After 4 minutes, the TMGa valve was switched to start supply of TMGa into the furnace to start GaN growth. The GaN layer was grown over about 3 hours.

Subsequently, in the following steps, the n-type layer, the light emitting layer, and the p-type layer were laminated in this order to produce an epitaxial wafer for LEDs.

First, by continuing the supply of TMGa while, starts the supply of the SiH 4, it was carried out 15 minutes to about 1 hour and the n-type GaN layer is grown on a low-doped Si. The supply amount of SiH 4 was adjusted so that the electron concentration of the low Si-doped GaN layer was 1 × 10 17 cm −3 . The film thickness of the low Si dope GaN layer was 2 m.

Further, a high Si-doped n-type GaN layer was grown on the low Si-doped GaN layer. After growing the GaN layer of the low-doped Si, and stopping the supply of TMGa and SiH 4 into the furnace of over a period of one minute. That was while changing the flow rate of SiH 4. The amount to circulate was examined in advance, and the electron concentration of the high Si-doped GaN layer was adjusted to be 1 × 10 19 cm −3 . Ammonia was continuously supplied into the furnace at the same flow rate.

After stopping for 1 minute, supply of TMGa and SiH 4 was restarted, and growth was carried out over 1 hour. By this operation, a high Si-doped n-type GaN layer having a film thickness of 1.8 mu m was formed.

After growing the high Si-doped GaN layer, the valves of TMGa and SiH 4 were switched to stop the supply of these raw materials into the furnace. While ammonia was passed through, the valve was switched to change the carrier gas from hydrogen to nitrogen. Thereafter, the temperature of the substrate was lowered from 1160 ° C to 830 ° C.

While waiting for the temperature change in the furnace, the supply amount of SiH 4 was changed. The amount to circulate was examined in advance, and the electron concentration of the Si-doped InGaN cladding layer was adjusted to be 1 × 10 17 cm -3 . Ammonia was continuously supplied into the furnace at the same flow rate. Moreover, distribution of the carrier gas to the bubbler of trimethyl indium (TMIn) and triethylgallium (TEGa) was previously disclosed. The SiH 4 gas and the vapors of TMIn and TEGa generated by bubbling were distributed in the piping to the decontamination apparatus together with the carrier gas and released out of the system through the decontamination apparatus until the growth process of the clad layer started.

Thereafter, while the state in the furnace was stabilized, the valves of TMIn, TEGa, and SiH 4 were simultaneously switched to start the supply of these raw materials into the furnace. Supply was continued over about 10 minutes, and the n type clad layer which consists of In 0.03 Ga 0.97 N of Si dope which has a film thickness of 100 kPa was formed.

After that, the valves of TMIn, TEGa and SiH 4 were switched to stop the supply of these raw materials.

Next, a light emitting layer having a multi-quantum well structure composed of a barrier layer made of GaN and a well layer made of In 0.06 Ga 0.94 N was produced. In the production of the multi-quantum well structure, a GaN barrier layer was first formed on an n-type cladding layer made of Si-doped In 0.03 Ga 0.97 N, and an In 0.06 Ga 0.94 N well layer was formed on the GaN barrier layer. . After the structure was repeatedly laminated five times, a sixth GaN barrier layer was formed on the fifth In 0.06 Ga 0.94 N well layer, and both sides of the multi-quantum well structure were composed of a GaN barrier layer.

That is, after the growth of the n-type cladding layer is terminated for 30 seconds, the substrate temperature, the pressure in the furnace, the flow rate and type of the carrier gas remain the same, and the TEGa valve is switched to supply the TEGa into the furnace. Done. After the TEGa was supplied for 7 minutes, the valve was switched again to stop the TEGa supply, thereby terminating the growth of the GaN barrier layer. As a result, a GaN barrier layer having a film thickness of 70 GPa was formed.

During the growth of the GaN barrier layer, the flow rate of TMIn flowing in the piping to the removal equipment was adjusted to double as the molar flow rate as compared with the growth of the clad layer.

After the growth of the GaN barrier layer, the supply of the group III raw material was stopped for 30 seconds, and then the substrate temperature, the pressure in the furnace, the flow rate and type of the carrier gas remained the same, and the TEGa and TMIn valves were switched. Supply to the furnace was performed. After supplying TEGa and TMIn for 2 minutes, the valve was switched again to stop the supply of TEGa and TMIn to terminate growth of the In 0.06 Ga 0.94 N well layer. As a result, an In 0.06 Ga 0.94 N well layer having a film thickness of 20 μs was formed.

After stopping the growth of the In 0.06 Ga 0.94 N well layer, the supply of the Group III raw material was stopped for 30 seconds, and then the substrate temperature, the pressure in the furnace, the flow rate and type of the carrier gas were maintained, and the TEGa was supplied into the furnace. The GaN barrier layer was grown again.

This procedure was repeated five times to produce five GaN barrier layers and five In 0.06 Ga 0.94 N well layers. Also, a GaN barrier layer was formed on the last In 0.06 Ga 0.94 N well layer.

On the multi-quantum well structure which terminates in this GaN barrier layer, the non-doped Al 0.2 Ga 0.8 N diffusion prevention layer was produced.

Distribution of the carrier gas to the bubbler of trimethylaluminum (TMAl) was previously started. The vapor of TMAl generated by bubbling was passed through the piping to the decontamination apparatus together with the carrier gas and released out of the system through the decontamination apparatus until the growth process of the diffusion barrier layer was started.

Waiting for the pressure in the furnace to stabilize, the valves of TEGa and TMAl were switched to start the supply of these raw materials into the furnace. After that, after growing for about 3 minutes, the supply of TEGa and TMAl was stopped, and the growth of the non-doped Al 0.2 Ga 0.8 N diffusion barrier layer was stopped. As a result, a non-doped Al 0.2 Ga 0.8 N diffusion barrier layer having a film thickness of 30 μs was formed.

On this non-doped Al 0.2 Ga 0.8 N diffusion prevention layer, the p type cladding layer which consists of Mg dope GaN was produced.

After supply of TEGa and TMAl was stopped and growth of the non-doped Al 0.2 Ga 0.8 N diffusion prevention layer was completed, the temperature of the substrate was raised to 1100 ° C. over 2 minutes. In addition, the carrier gas was changed to hydrogen. Also it placed starting the flow of carrier gas in a bubbler of the pre-bis-cyclopentadienyl magnesium (Cp 2 Mg). The Cp 2 Mg vapor generated by bubbling was passed through the piping to the decontamination apparatus together with the carrier gas and released out of the system through the decontamination apparatus until the growth process of the Mg-doped GaN layer was started.

Waiting for the pressure in the furnace to stabilize by changing the temperature and pressure, the valves of TMGa and Cp 2 Mg were switched to start the supply of these raw materials into the furnace. The amount of Cp 2 Mg circulated was examined in advance, and the hole concentration of the p-type cladding layer made of GaN of Mg dope was adjusted to be 8 × 10 17 cm −3 . After that, growth was performed for about 6 minutes, and then the supply of TMGa and Cp 2 Mg was stopped to stop the growth of the Mg-doped GaN layer. As a result, an Mg-doped GaN layer having a film thickness of 0.15 mu m was formed.

After the growth of the Mg-doped GaN layer was finished, energization to the induction heating type heater was stopped, and the temperature of the substrate was lowered to room temperature over 20 minutes. During the temperature drop from the growth temperature to 300 ° C., the carrier gas in the reaction furnace was composed only of nitrogen, and 1% of NH 3 was passed through as a capacity. Then to stop the flow of NH 3 at the time of confirming that the substrate temperature in the 300 ℃, the atmospheric gas was nitrogen alone. It was confirmed that the substrate temperature was lowered to room temperature, and the wafer was taken out to the atmosphere.

By the above procedures, an epitaxial wafer having an epitaxial layer structure for a semiconductor light emitting element was produced. Here, the Mg-doped GaN layer exhibited p-type even without performing annealing treatment for activating the p-type carrier.

Subsequently, a light emitting diode, which is a kind of semiconductor light emitting element, was manufactured using an epitaxial wafer in which an epitaxial layer structure was laminated on the sapphire substrate. About the produced wafer, the p-electrode bonding pad which has the structure which laminated | stacked titanium, aluminum, and gold in order from the surface side by the well-known photolithography on the surface of Mg dope GaN layer and translucent p which consists only of Au bonded to it An electrode was formed and the p-side electrode was produced.

After that, dry etching was performed on the wafer to expose a portion forming the n-side electrode of the high Si-doped GaN layer, thereby producing an n-electrode consisting of four layers of Ni, Al, Ti, and Au on the exposed portion.

Thus, the LED lamp of the structure shown in FIG. 4 was produced with respect to the wafer in which the p side and n side electrodes were formed. The back surface of the sapphire substrate 32 was ground to a thickness of 100 µm to obtain a mirror surface. Thereafter, the wafer is cut into 350-μm square chips, bonded to the sub-mount 34 in the mount cap 35 so that the semiconductor layer 33 and the electrode face down, and on the sub-mount 34 It was connected to the lead frame from the electrode terminal to form a flip chip type light emitting element. Further, the light emitting element was sealed with a resin 31 so as to have a substantially hemispherical shape with a silicone resin, and a shell type LED lamp shown in Fig. 4 was produced.

As a result of the forward current flowing between the p-side and n-side electrodes of the LED lamp produced as described above, the light emission wavelength at the current 20 mA was 380 nm, the output value was 14.0 mW, and the forward voltage was 3.4 V.

In addition, when the surface of the chip when the LED chip was energized before sealing the resin was observed with an optical microscope, yellow light emission was observed on one surface of the deep level of GaN, but in the sapphire <1-100> direction. It was observed that a portion of the linear light emission intensity was strong.

Comparative example

In this comparative example, the process was almost the same as that of Example 1, except that only the sapphire surface was in a flat state to produce other LEDs.

A shell type LED lamp was fabricated in the same manner as in Example 1 using an epitaxial wafer for LEDs grown in the same manner as in Example 1 using a sapphire substrate having a flat surface. This LED lamp had a light emission wavelength of 380 nm and an output value of 7.8 mW at 20 mA energization. The LED lamp of Example 1 was confirmed to have 1.8 times the output of the LED lamp of this comparative example.

Example 2

In the present Example 2, the sapphire substrate in which the AlN film of 1 micrometer thickness was made into the (0001) surface was used. The substrate was subjected to a high temperature treatment at 1400 ° C. under a reducing atmosphere to form pit and hexagonal irregularities on the AlN surface. The diameter of a pit was about 0.5-2 micrometers, and the larger thing reached the sapphire substrate, and the hexagonal trapezoid was some thing. The ratio of the area occupied by pits or irregularities and the area of the flat portion was about 1: 0.2 to 1: 4. The slope of the hexagonal weight was composed of two types of (11-22) and (1-102) planes of AlN, and the angle (θ) between the hexagonal slope and the substrate plane was 58 ° and 43 °, respectively. .

The sapphire substrate on which the pit-forming AlN film formed as described above was formed was sufficiently washed and introduced into the MOCVD apparatus, thereby producing an epitaxial wafer for LEDs in the same manner as in Example 1.

A shell type LED lamp was produced in the same manner as in Example 1 using the epitaxial wafer for LEDs grown by the above method. This LED lamp had a light emission wavelength of 380 nm and an output value of 12.6 mW at 20 mA. Compared with the comparative example, the output was 1.6 times higher.

As a result of observing the LED surface at the time of energization with an optical microscope, yellow light emission, which is regarded as light emission between deep levels of GaN, was observed on one surface, but among them, a bright spot having a strong emission intensity was observed in a hexagonal shape. .

Example 3

In Example 3, a sapphire substrate having a surface of (0001) was used. A mask for selective growth by a stripe-type SiN film having a line width of 2 μm and a space width of 2 μm was formed on the substrate in parallel with the <1-100> direction of sapphire, and after sufficient cleaning, it was put into a MOCVD apparatus. As a first step, a gas containing trimethylaluminum (TMAl) vapor was flowed at a high temperature, and TMAl and ammonia were flowed as a second step to grow triangular stripe-shaped aluminum nitride. In addition, the LED structure was fabricated after planarization in the gallium nitride layer.

Preparation of the sample containing the said AlN layer was performed in the following procedures using MOCVD method. First, a sapphire substrate was introduced into a quartz reactor installed in an RF coil of an induction heater. The sapphire substrate was mounted on a carbon susceptor for heating in a glove box substituted with nitrogen gas. After the sample was introduced, nitrogen gas was passed through to purge the inside of the reactor.

After nitrogen gas was passed through for 10 minutes, the induction heating heater was operated to raise the substrate temperature to 600 ° C. over 10 minutes. It was left to stand for 9 minutes while flowing hydrogen gas while maintaining the substrate temperature at 600 ° C. In the meantime, the hydrogen carrier gas was distributed to the piping of the container (bubble) containing trimethyl gallium (TMGa) which is a raw material connected to the reactor, and the container (bubble) containing trimethyl aluminum (TMAl), and bubbling was started. . The temperature of each bubbler was adjusted uniformly using the thermostat for adjusting temperature. The TMGa and TMAl vapors generated by bubbling were passed through the piping to the decontamination apparatus together with the carrier gas until the growth process was started, and released out of the system through the decontamination apparatus. Thereafter, the valve of the nitrogen carrier gas was closed to start the supply of hydrogen gas into the reactor.

The temperature of the board | substrate was heated up to 1150 degreeC after switching of carrier gas. After confirming that the temperature was stable at 1150 占 폚, the valve of the TMAl piping was switched to supply a gas containing TMAl vapor into the reactor. At this time, it is thought that a small amount of nitrogen was supplied to the substrate at the same time as TMAl by decomposition of deposits attached to the wall surface and the top plate of the reactor. After 9 minutes of treatment, the valves of the TMAl piping were simultaneously switched, the gas containing the TMAl vapor was stopped in the reaction furnace, and held for 3 minutes as it is.

After annealing for 3 minutes, the valve of the piping of ammonia gas was switched, and supply of ammonia gas into the furnace was started. The ammonia was passed through for 4 minutes as it was. In the meantime, the flow volume of the flow regulator of TMAl piping was adjusted. After 4 minutes, the TMAl valve was switched to supply TMAl into the furnace, and AlN growth was started.

The AlN layer was grown over about 3 hours. In the experiment taken out at this stage, triangular AlN having a peak on the sapphire surface expressed in a stripe shape was grown. At this stage, the SiN mask was embedded in AlN. This slope was a (1-102) plane of AlN, and the angle formed with the substrate plane was 43 degrees. Thereafter, the valves of the TMAl piping were switched, the supply of raw materials to the reaction furnace was terminated, and growth was stopped.

After the growth of the AlN layer was finished, the GaN layer was subsequently grown. After growing for 3 hours, the growth surface of the GaN layer was flattened, and the n-type layer, the light emitting layer, and the p-type layer were sequentially stacked to produce an epitaxial wafer for LEDs.

A shell type LED lamp was produced in the same manner as in Example 1 using the epitaxial wafer for LEDs grown in the above method. This LED lamp had a light emission wavelength of 380 nm and an output value of 14.8 mW at 20 mA. It became 1.9 times the output compared with the comparative example.

In addition, as a result of observing the LED surface (sapphire surface) at the time of energization with an optical microscope, yellow light emission, which is regarded as light emission between the deep levels of GaN, was observed on one surface. Weak and thin line of cancer was observed.

When the light emitting device of the present invention is used, the light extraction efficiency is increased by about 2 times, and therefore, the light emission output and the total light conversion efficiency of the LED can be improved by up to 2 times. This not only contributes to energy saving but also suppresses the heat generation of the element due to reabsorption, thereby promoting the stable operation of the LED and the improvement of the lifetime.

Claims (10)

  1. In a light emitting device having a sapphire substrate 1, a semiconductor layer 3 having Al x Ga y In 1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) and a light emitting layer 5, the sapphire substrate and this The refractive indexes of the semiconductor layers stacked on the substrates are different from each other, and the unevenness 2 having the inclined side is formed on the surface of the sapphire substrate on which the semiconductor layer is laminated, and the angle? The light emitting element characterized by setting it to ° <θ <60 °.
  2. delete
  3. delete
  4. The light emitting element according to claim 1, wherein the unevenness (2) is any one of a V-shaped groove in a stripe, a side inclined protrusion in a stripe, and a side inclined pit.
  5. delete
  6. In the method of manufacturing a light emitting device having a sapphire substrate 1, a semiconductor layer 3 having Al x Ga y In 1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) and a light emitting layer 5, a high temperature The manufacturing method of the light-emitting element of Claim 1 which forms an unevenness | corrugation in the surface of the side which laminated | stacks the said semiconductor layer of a sapphire substrate by any one of a process, selective etching, and grinding.
  7. delete
  8. delete
  9. delete
  10. An LED lamp comprising the light emitting element according to claim 1.
KR1020057011483A 2002-12-20 2003-12-19 Light-emitting device, method for manufacturing same, and led lamp KR100802452B1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2002369092A JP4201079B2 (en) 2002-12-20 2002-12-20 Light emitting element, manufacturing method thereof, and led lamp
JPJP-P-2002-00369092 2002-12-20

Publications (2)

Publication Number Publication Date
KR20050091736A KR20050091736A (en) 2005-09-15
KR100802452B1 true KR100802452B1 (en) 2008-02-13

Family

ID=32677134

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020057011483A KR100802452B1 (en) 2002-12-20 2003-12-19 Light-emitting device, method for manufacturing same, and led lamp

Country Status (7)

Country Link
JP (1) JP4201079B2 (en)
KR (1) KR100802452B1 (en)
CN (1) CN100361322C (en)
AU (1) AU2003292584A1 (en)
DE (1) DE10393949T5 (en)
TW (1) TWI241032B (en)
WO (1) WO2004057682A1 (en)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100649494B1 (en) 2004-08-17 2006-11-24 삼성전기주식회사 Fabrication method of light emitting diode incorporating laser surface treatment of substrate and light emitting diode fabricated thereby
JP2006066442A (en) * 2004-08-24 2006-03-09 Kyocera Corp Single crystal sapphire substrate for semiconductor device and its manufacturing method, and semiconductor light emitting device
CN100461471C (en) * 2004-11-11 2009-02-11 晶元光电股份有限公司 High light luminous element and method for making same
US20070145386A1 (en) 2004-12-08 2007-06-28 Samsung Electro-Mechanics Co., Ltd. Semiconductor light emitting device and method of manufacturing the same
KR100624449B1 (en) * 2004-12-08 2006-09-18 삼성전기주식회사 Semiconductor emitting device with approved and manufacturing method for the same
JP5082278B2 (en) 2005-05-16 2012-11-28 ソニー株式会社 Light emitting diode manufacturing method, integrated light emitting diode manufacturing method, and nitride III-V compound semiconductor growth method
KR20070081184A (en) 2006-02-10 2007-08-16 삼성전기주식회사 Nitride-based semiconductor light emitting device and method of manufacturing the same
KR20080104148A (en) * 2006-02-17 2008-12-01 더 리전츠 오브 더 유니버시티 오브 캘리포니아 Method for growth of semipolar (al,in,ga,b)n optoelectronic devices
TWI288491B (en) * 2006-03-02 2007-10-11 Nat Univ Chung Hsing High extraction efficiency of solid-state light emitting device
KR100786777B1 (en) * 2006-03-28 2007-12-18 전북대학교산학협력단 Method of manufacturing semiconductor
DE102007004302A1 (en) * 2006-09-29 2008-04-03 Osram Opto Semiconductors Gmbh Semiconductor chip for light emitting diode, has support with two support surfaces, and semiconductor layer sequence has active area for generation of radiation
JP2010510661A (en) * 2006-11-15 2010-04-02 ザ リージェンツ オブ ザ ユニバーシティ オブ カリフォルニアThe Regents of The University of California Light extraction diode (LED) with high light extraction efficiency by multiple extractors
JP5176334B2 (en) * 2007-02-01 2013-04-03 日亜化学工業株式会社 Semiconductor light emitting device
KR101364168B1 (en) * 2007-03-20 2014-02-18 서울바이오시스 주식회사 Method of fabricating substrates for light emitting device
JP4804444B2 (en) * 2007-10-31 2011-11-02 泰谷光電科技股▲ふん▼有限公司 Structure of light emitting diode and manufacturing method thereof
CN101488545B (en) * 2008-01-18 2011-10-05 泰谷光电科技股份有限公司 Surface roughening method for LED substrate
CN101533881B (en) * 2008-03-11 2012-05-02 广镓光电股份有限公司 Semi-conductor photogenic component
CN101621097B (en) * 2008-07-04 2011-12-28 泰谷光电科技股份有限公司 Photoelectronic device and manufacturing method thereof
CN101661981B (en) * 2008-08-29 2014-10-22 广镓光电股份有限公司 Base plate for making luminous element and luminous element made by same
CN102024885A (en) * 2009-09-10 2011-04-20 鸿富锦精密工业(深圳)有限公司 Nitride semiconductor light-emitting component
JP5603085B2 (en) * 2010-01-06 2014-10-08 株式会社ディスコ Manufacturing method of optical device wafer
JP2010147505A (en) * 2010-03-16 2010-07-01 Showa Denko Kk Method of manufacturing light-emitting device, and light-emitting device
JP2010135855A (en) * 2010-03-16 2010-06-17 Showa Denko Kk Method for manufacturing light-emitting element, and the light-emitting element
US8217488B2 (en) * 2010-07-19 2012-07-10 Walsin Lihwa Corporation GaN light emitting diode and method for increasing light extraction on GaN light emitting diode via sapphire shaping
CN101937967B (en) * 2010-09-14 2012-07-04 映瑞光电科技(上海)有限公司 Light-emitting diode, light-emitting device and manufacturing method thereof
CN102130271A (en) * 2010-09-28 2011-07-20 映瑞光电科技(上海)有限公司 LED (light-emitting diode) chip packaging structure and white light LED light-emitting device
CN102130249B (en) * 2010-09-28 2013-05-01 映瑞光电科技(上海)有限公司 Super-luminance light-emitting diode and manufacturing method thereof
JP5246235B2 (en) * 2010-09-30 2013-07-24 豊田合成株式会社 Group III nitride semiconductor light emitting device manufacturing method
JP5246236B2 (en) * 2010-09-30 2013-07-24 豊田合成株式会社 Group III nitride semiconductor light emitting device manufacturing method
WO2012058524A1 (en) * 2010-10-29 2012-05-03 The Regents Of The University Of California Ammonothermal growth of group-iii nitride crystals on seeds with at least two surfaces making an acute, right or obtuse angle with each other
CN102324460A (en) * 2011-10-24 2012-01-18 佛山市国星光电股份有限公司 LED (Light Emitting Diode) packaging device based on graphical packaging substrate
JP5811009B2 (en) 2012-03-30 2015-11-11 豊田合成株式会社 Group III nitride semiconductor manufacturing method and group III nitride semiconductor
CN103545170A (en) * 2012-07-13 2014-01-29 华夏光股份有限公司 Semiconductor device and production method thereof
JP2014034481A (en) * 2012-08-07 2014-02-24 Hitachi Metals Ltd Sapphire substrate for growing gallium nitride crystal, manufacturing method of gallium nitride crystal, and gallium nitride crystal
EP2908353A4 (en) * 2012-10-12 2015-10-28 Asahi Kasei E Materials Corp Optical substrate, semiconductor light-emitting element, and manufacturing method for same
KR20140085918A (en) * 2012-12-28 2014-07-08 서울바이오시스 주식회사 Light emitting device and method of fabricating the same
JP6020357B2 (en) 2013-05-31 2016-11-02 豊田合成株式会社 Group III nitride semiconductor manufacturing method and group III nitride semiconductor
WO2015012403A1 (en) * 2013-07-26 2015-01-29 株式会社トクヤマ Pretreatment method for base substrate, and method for manufacturing laminate using pretreated base substrate
TWI640104B (en) * 2014-05-30 2018-11-01 日商日亞化學工業股份有限公司 Nitride semiconductor element and method for manufacturing the same
JP6227134B2 (en) * 2014-06-03 2017-11-08 シャープ株式会社 Nitride semiconductor light emitting device
CN104752586A (en) * 2015-03-27 2015-07-01 华南理工大学 LED graphic optimized packaging substrate, LED packaging member and manufacture method thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001168387A (en) * 1999-09-29 2001-06-22 Toyoda Gosei Co Ltd Iii nitride compound semiconductor element
JP2002280611A (en) * 2001-03-21 2002-09-27 Mitsubishi Cable Ind Ltd Semiconductor light-emitting element

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3439063B2 (en) * 1997-03-24 2003-08-25 三洋電機株式会社 Semiconductor light emitting device and light emitting lamp
JP4032538B2 (en) * 1998-11-26 2008-01-16 ソニー株式会社 Semiconductor thin film and semiconductor device manufacturing method
JP3556916B2 (en) 2000-09-18 2004-08-25 三菱電線工業株式会社 Manufacturing method of semiconductor substrate
JP3595276B2 (en) * 2001-03-21 2004-12-02 三菱電線工業株式会社 UV light emitting element
JP4055503B2 (en) * 2001-07-24 2008-03-05 日亜化学工業株式会社 Semiconductor light emitting device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001168387A (en) * 1999-09-29 2001-06-22 Toyoda Gosei Co Ltd Iii nitride compound semiconductor element
JP2002280611A (en) * 2001-03-21 2002-09-27 Mitsubishi Cable Ind Ltd Semiconductor light-emitting element

Also Published As

Publication number Publication date
TW200418207A (en) 2004-09-16
DE10393949T5 (en) 2011-12-01
JP2004200523A (en) 2004-07-15
CN1742381A (en) 2006-03-01
KR20050091736A (en) 2005-09-15
AU2003292584A1 (en) 2004-07-14
JP4201079B2 (en) 2008-12-24
TWI241032B (en) 2005-10-01
WO2004057682A1 (en) 2004-07-08
CN100361322C (en) 2008-01-09

Similar Documents

Publication Publication Date Title
Nakamura et al. History of gallium–nitride-based light-emitting diodes for illumination
JP5815144B2 (en) Nitride semiconductor light emitting diode device
US8004004B2 (en) Semiconductor light emitting element, method for manufacturing the same, and light emitting device
US9048385B2 (en) Nitride semiconductor light emitting diode
US7663158B2 (en) Nitride compound semiconductor light emitting device and method for producing the same
KR101317469B1 (en) Non-polar (Al,B,In,Ga)N Quantum Well and Heterostructure Materials and Devices
EP0599224B2 (en) Light-emitting gallium nitride-based compound semiconductor device
US8592800B2 (en) Optical devices featuring nonpolar textured semiconductor layers
KR101227724B1 (en) Light emitting element and method of manufacturing the same
TWI413279B (en) Group iii nitride semiconductor light emitting device, process for producing the same, and lamp
US6537839B2 (en) Nitride semiconductor light emitting device and manufacturing method thereof
US7612363B2 (en) N-type group III nitride semiconductor stacked layer structure
KR101237198B1 (en) Light emitting diode and manufacturing method thereof, integrated light emitting diode and manufacturing method thereof, nitride-based ⅲ-v compound semiconductor deposition method, light source cell unit, light emitting diode backlight, light emitting diode display, and electronic device
US8946764B2 (en) Gallium nitride-based semiconductor element, optical device using the same, and image display apparatus using optical device
US8546830B2 (en) Method of growing semiconductor heterostructures based on gallium nitride
JP5521981B2 (en) Manufacturing method of semiconductor light emitting device
KR101067823B1 (en) Ultraviolet light emitting device and method for fabricating same
US7576372B2 (en) Method for making free-standing AlGaN wafer, wafer produced thereby, and associated methods and devices using the wafer
KR100978330B1 (en) Semiconductor light emitting device and illuminating device using it
TWI309893B (en) Nitride semiconductor device comprising bonded substrate and fabrication method of the same
TW536841B (en) Semiconductor light emitting element
US8154035B2 (en) Nitride semiconductor light emitting element
KR101066135B1 (en) ? nitride compound semiconductor laminated structure
US7084421B2 (en) Light-emitting device using group III nitride group compound semiconductor
JP4223540B2 (en) Semiconductor light emitting device, group III nitride semiconductor substrate, and manufacturing method thereof

Legal Events

Date Code Title Description
AMND Amendment
A201 Request for examination
AMND Amendment
E902 Notification of reason for refusal
E601 Decision to refuse application
J201 Request for trial against refusal decision
AMND Amendment
E902 Notification of reason for refusal
B701 Decision to grant
GRNT Written decision to grant
G170 Publication of correction
FPAY Annual fee payment

Payment date: 20130118

Year of fee payment: 6

FPAY Annual fee payment

Payment date: 20140117

Year of fee payment: 7

FPAY Annual fee payment

Payment date: 20150119

Year of fee payment: 8

FPAY Annual fee payment

Payment date: 20160105

Year of fee payment: 9

FPAY Annual fee payment

Payment date: 20170103

Year of fee payment: 10

FPAY Annual fee payment

Payment date: 20180119

Year of fee payment: 11