TW200418207A - Light-emitting device, method of fabricating the same, and LED lamp - Google Patents

Light-emitting device, method of fabricating the same, and LED lamp Download PDF

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TW200418207A
TW200418207A TW92136289A TW92136289A TW200418207A TW 200418207 A TW200418207 A TW 200418207A TW 92136289 A TW92136289 A TW 92136289A TW 92136289 A TW92136289 A TW 92136289A TW 200418207 A TW200418207 A TW 200418207A
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light
substrate
layer
semiconductor layer
semiconductor
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TWI241032B (en
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Takaki Yasuda
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Showa Denko Kk
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22Roughened surfaces, e.g. at the interface between epitaxial layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/0242Crystalline insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/02428Structure
    • H01L21/0243Surface structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639Preparation of substrate for selective deposition

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Led Devices (AREA)

Abstract

A light-emitting device, method of fabricating the same, and LED lamp are provided. That is, the light-emitting device has an improved output efficiency of light. In the semiconductor light-emitting device, an inclined and indented lateral surface is formed on the substrate surface or layer-stacked interfaces among the semiconductors. The 30 DEG to 60 DEG inclined angle is better. In addition to using polishing, high-temperature reducing and selective etching methods to make trenches and holes, the triangle protrusion can be also made by selectively growing semiconductor.

Description

200418207 (1) 玖、發明說明 【發明所屬之技術領域】 本發明係關於一種提高光取出效率之發光二極體 (LED )及其製造方法。特別是在能夠提高光取出效率之 層積界面之構造,具有特徵。 【先前技術】 在進行省能源之方面,要求提高能量消耗效率(外部 量子效率)之發光元件。在層積於藍寶石基板上之GaN 系發光二極體,向來3 82nrn附近之發光二極體(LED )之 外部量子效率係在專利文獻i,成爲24 %。外部量子效率 係成爲「內部量子效率X電壓效率X光取出效率」之乘積 而分解成爲3個要素,除了可實測之電壓效率(大約9〇 〜95 % )以外之2個要素係成爲不可實測,在仍然無法判 斷這些水準之狀態下,主要是檢討由於結晶晶質或構造最 適當化之所造成之內部量子效率之提升。另一方面,作爲 光取出效率之提高例,係自從前以來,進行藉由折射率接 近半導體之樹脂而覆蓋LED晶片來使得發光之光效率良 好地透過樹脂並且藉由將樹脂表面加工成爲球面而抑制樹 脂和空氣界面之全反射之方法。此外,作爲藉由將基板硏 削成爲逆台座型而實現2倍左右之光取出效率增加之例 子,係在市面上,美國 Cree (克里)公司以X - Bright (發光)系列而進行販賣。 -4 - (2) 200418207 另一方面,作爲實施半導體結晶之低差排化之 係知道在半導體結晶基板之表面附加凹凸而進行成 法。例如顯示··可以在第111族氮化物半導體,於 基板之表面,形成線條狀溝,能夠藉由使得低溫 GaN緩衝層及其上面之高溫之第ηι族氮化物半 晶’來進行磊晶成長而減低差排密度。由於該差排 降低,因此,溝傾斜角度係可以成爲60 °以上。但 光取出效率而言,並無觸及到(例如參考專利文獻 專利文獻1 ) 〇 [專利文獻1] 日本特開2002 — 164296號公報 [非專利文獻1 ] 多田友先生等(K. Tadatomo、et al.)、日本 理雜誌(Japanese Journal of Applied Physics ) 年、第 40 卷、p.L583〜L585。 【發明內容】 [發明所欲解決之課題] 一般而言,發光元件(LED )係發光層之折射 其外部媒質之折射率,因此,入射角大於全反射角 係無法由發光層來取出至外部。本發明之目的係能 將具有傾斜於不同折射率之2層界面之側面之凹凸 入,而將不進行全反射之光線,取出至外部,來提 兀件之光取出效率。 方法, 長之方 藍寶石 成長之 導體結 密度之 是,就 1、非 應用物 、2001 率大於 之光線 夠藉由 予以導 高發光 -5- (3) (3)200418207 [用以解決課題之手段] 首先’就完成本發明之經緯之模擬而進行說明。 爲了估§十不可實測之光取出效率和內部量子效率,因 此’本發明人係藉由光學模擬而估計來自LED之光取出 效率。作爲單純化之LED模型係採取在300 // m角、厚度 100//m之藍寶石基板來層積300//m角、厚度6.1#m之 GaN層之構造。在300//111角之中心、由GaN表面開始進 入至〇·1 m之GaN層中之點,配置呈等方性地進行發光 之點光源。折射率係分別使得藍寶石藉由η二1.8之矽酮 樹脂、GaN藉由η=2.7(發光波長380nm之狀態)之矽 酮樹脂或 η = 2·4 (發光波長 400nm之狀態)之砂酮樹 脂、這些之外部藉由II = 1.4之矽酮樹脂而滿足折射率。 GaN每個波長之折射率係實測市面販賣之GaN散裝基板 而求出。由點光源開始,沿著隨機之方向來產生許多光線 (蒙特卡羅法),光線係在不同折射率之各個界面,配合 按照菲湼耳公式來計算於折射之光線和反射之光線之比例 而進行分岔。光線產生數係50萬條,分岔限度係成爲1〇 次。在基板背面、半導體層表面、由各個側面和樹脂之界 面開始些微之樹脂側,呈假設地設定集光面,算出來自各 個面之光取出效率。 表1係顯示分別就在基板不設置凹凸構造之狀態 (①、②)和在基板之表面設置第1圖所示之凹凸構造之 狀態(③)之各個來藉由模擬而計算來自基板面、半導體 層面和側面之光取出效率之結果。 »6- 200418207 【I撇一 合計 54.9% 39.3% ί___ 92.4% 側面(GaN側面、藍 寶石側面) 10.1 % X 4 = 40.4 % (7.4%、2.7%) 7.2 % χ 4 = 28.8 % (5.4%、1.8%) 垂直於線條溝之側 面:15.3% (0.5%、 14.8 % ) X 2 平行於線條溝之側 面:15.4 % (0.5 %、 14·9%)χ2 半導體 層表面 7.4% 5.4% ί__ 5.3% 基板背面 7.1% 5.1% 1 1 25.7% 折射率 寸 1 (N II -T 丄蹈 II 稍 sg w 蕕副 r- 1 (Ν II c ο ί ^ II 1 ι5 II箱 Sg ft _ r- I (Ν II c 〇 ί II m gg * 癍 _ 光取出效率之計算 〇 米 Q ^ S m ―) i w 象w i Λ 〇 擻_ 3 ㊀ \ 峭 ②同上、發光波長382nm 嵌a < If *N g 晚。in ^ » I g g 鲈1 _ 1 \ I ^ ^ 1 E S 11¾ ° m Μ M W Si II ^ 0 鎞 餾 (5) 200418207 在藉由該結果時’在基板不設置凹凸構造之狀態’ 發光波長400nm之狀態下’光取出效率之合計係大約 %,於3 82nm之狀態下,成爲大約40% ° 將該結果適用在非專利文獻1所記載之LED。在該 獻,記載:就使用藍寶石基板之第111族氮化物半導體 LED而言,在發光波長3 82nm,外部量子效率係24 % 在400nm,成爲30%。在假設該外部量子效率之24% 爲24% =內部量子效率60% X電壓效率95% X光取出 率40%而假設30%成爲30% =內部量子效率60% X電 效率9 0 % X光取出效率5 5 %時,無關於發光波長,內 量子效率係可以皆成爲 6 0 %而統一地進行說明,模擬 結果係認爲大槪妥當。 如果藉由該模擬的話,則光取出效率係在波 4 0 0nm,成爲大約 5 5 %,在波長 3 8 2nm,成爲大約 %,因此,分別顯示有 1.8倍、2.5倍之提升餘地。 外,內部量子效率係有大約1.6倍之提升餘地。本發明 關於這些當中之光取出效率。 如果藉由模擬結果之詳細解析的話,則得知:在藉 折射率n = 1.4之樹脂而進行密封之狀態下,由GaN層 始來透過於藍寶石基板之光線係通過100%樹脂而取出 外部,是否能夠使得關閉於GaN層之光線群怎樣地取 至藍寳石基板或樹脂係在提高光取出效率之方面,變得 要。 爲了由 GaN層開始而使得光線效率良好地透過於 於 55 文 之 成 效 壓 部 之 長 40 此 係 由 開 至 出 重 藍 -8 ~ (6) (6)200418207 寶石基板或樹脂,因此,可以傾斜GaN層和基板間之界 面而使得光線入射至界面之角度,不超過全反射角。該最 適當之傾斜角係45 °。在表1之③,顯示在GaN層和藍 寶石基板間之界面來導入第1圖所示之傾斜角45 °之線條 狀凹凸構造之狀態下之計算結果。得知:由半導體層面開 始通過樹脂而出去至外部之光取出效率係不太改變,但 是,由藍寶石背面或側面開始而出去至外部之光取出效率 係提高。結果,總共估計在發光波長3 82nm ( GaN之折射 率2.7 )之狀態下,比起②還提高2倍以上之光取出效 率。此外,就凹凸構造之上面、底面、傾斜面之比率而 言,最好是沒有上面和底面而僅有傾斜面之構造係光取出 效率之提升效果變得最高。 本發明係根據前述模擬結果而完成的,由以下之各項 發明而構成。 (1) 一種發光元件,其特徵爲:在具有基板、半導 體層和發光層之發光元件,基板和層積於此之半導體層之 折射率係不同,在層積該基板之半導體層之面,形成具有 傾斜側面之凹凸,使得該傾斜側面相對於基板面之角度0 成爲 30° < 0 < 60°。 (2) —種發光元件,其特徵爲:在具有基板、半導 體層和發光層之發光元件,層積之半導體層間之折射率係 不同,在該半導體層之層積界面,形成具有傾斜側面之凹 凸。 (3 )前述(2 )所記載之發光元件,係凹凸之傾斜側 -9 - (7) 200418207 面相對於基板之角度0成爲3 0 ° < 0 < (4) 冃u述(1)〜(3)中任-件,係凹凸成爲線條狀 V字型溝、 和側面傾斜坑洞之其中某一種。 (5) 前述(1)〜(4)中任- 件,係基板成爲藍寶石(ai2o3 AlxGayIni_x_yN ( 1、1) (6 )前述(1 )所記載之半導體 特徵爲:在具有基板、半導體層和發 造方法,藉由高溫處理、選擇性蝕刻 方法而在層積基板半導體層之側之表 (7)前述(1)所記載之半導體 特徵爲:在具有基板、半導體層和發 造方法,藉由在基板之表面,形成選 基板上,設置側面呈傾斜之半導體突 層積界面,形成具有傾斜側面之凹凸 (8 )前述(2 )所記載之半導體 特徵爲:在具有基板、半導體層和發 造方法,藉由利用高溫處理、選擇性 一種方法而在半導體層之表面,設丨 凸’以便在半導體層之層積界面,形 凸。 (9 )前述(2 )所記載之發光元 徵爲:在具有基板、半導體層和發光 60。° 項所記載之發光元 線條狀側面傾斜突起 -項所記載之發光元 )’半導體層成爲 〇 元件之製造方法,其 光層之發光元件之製 和硏削之其中某一種 面,設置凹凸。 元件之製造方法,其 光層之發光元件之製 擇成長用罩幕,在該 起,而在半導體層之 〇 元件之製造方法,其 光層之發光元件之製 蝕刻和硏削之其中某 |具有傾斜側面之凹 成具有傾斜側面之凹 件之製造方法,其特 層之發光元件之製造 •10- (8) (8)200418207 方法’於半導體層之表面,形成選擇成長用罩幕,在該半 導體層上,設置側面呈傾斜之半導體突起。 (10 ) —種LED燈源,係使用前述(1 )〜(5 )中 任一項所記載之發光元件。 【實施方式】 [發明之實施形態] 本發明之發光元件係在基板之表面或半導體層間之層 積界面’形成側面呈傾斜之凹凸。基板和層積於此之半導 體層間之界面或者是半導體層間之層積界面的反射係在層 積界面’發生兩者之折射率呈不同之狀態。本發明係將在 該兩者之折射率呈不同之狀態所能夠儘量變多之光,取出 至LE.D之外部。 藉由設置前述凹凸而提高光取出效率之機構之詳細說 明係被省略,.但是,認爲在呈定性地使得層積界面成爲平 坦時,在界面所反射之光係即使是重複地進行反射,也成 爲同樣狀態之重複,因此,出去至外部者係變少,但是, 在界面成爲凹凸時,即使是一度進行反射,也有接著入射 至界面之光成爲全反射角以下之狀態產生,如果重複地進 行這些的話,則最後出去至外部之光係變多。 本發明之發光元件、其中一種係在基板之表面(層積 半導體層之側,以下相同。)設置側面呈傾斜之凹凸,其 中二種係在層積半導體層間之界面來設置前述凹凸。led 係正如第2圖所示,在基板上,呈多層地形成緩衝層等之 -11 - 200418207 Ο) 半導體層、n型半導體層、發光層、p型半導體層等,但 是,如果設置凹凸之面成爲不同折射率之2個半導體層之 界面的話,則可以是任何一種,最好是選擇效果大之其中 某一種界面。在半導體層之層積界面,也包含半導體層和 發光層之界面。 在本發明,於第3圖之(a)〜(c),呈示意地顯示 形成於基板等之凹凸構造之代表者。第3圖之(a )係在 基板表面呈線條狀地形成V字型溝,第3圖之(b)係在 基板表面以六角錘型來形成剖面呈台形狀之坑洞,第3圖 之(c )係在基板表面呈線條狀地形成由半導體所構成之 三角形突起。圖所示之0係凹凸之傾斜側面相對於基板面 之角度。形成於基板之凹凸傾斜側面之角度Θ係最好是 45 °,但是,如果是30 ° < Θ < 60 °之範圍的話,則具有 充分之效果。 就形成於半導體間之界面之凹凸傾斜側面之角度而言, 並無特別限制,但是,最好是相同於基板狀態之30 ° < Θ < 6 0 °之範圍。 形成於基板等之凹凸係也可以一致或者是故意地偏離 於基板或半導體層之面方位。凹凸尺寸、深度係任意地進 行選擇。但是,在考慮使得成長於具有凹凸之界面上之第 III族氮化物半導體結晶之表面進行平坦化時,最好是凹 部之直徑成爲3#m以下、凹部之深度成爲2//m以下。 平坦化係正如非專利文獻1所示,如果適當地選擇半導體 層之成長條件的話,則可以容易實現。 -12 - (10) (10)200418207 在本發明之基板等而形成凹凸之方法係有藉由高溫處 理所造成之坑洞形成、藉由選擇性蝕刻所造成之線條狀凹 溝或坑洞之形成、或者是使用硏削材之V字型溝之形成 等。在此’於V字型溝,也包含底部成爲平坦之形狀者 或者是側面也多少帶有圓形者。這些係凹部形狀,但是, 也可以在基板等,進行罩幕化,呈選擇性地成長半導體, 例如呈線條狀地形成剖面成爲三角形之突起。 藉由前述方法所形成之凹凸傾斜面之角度0係在硏削 法,許多狀態進入至3 0 °〜6 0 °之範圍,藉由高溫處理所 造成之坑洞係幾乎藉由結晶面而進行決定,成爲5 8。和 43 ° °此外’藉由SiN而進行既定之罩幕,在其上面而成 長A1N或GaN時,所形成之三角形突起之傾斜角係成爲 5 8。和 43。。 在本發明,作爲基板係能夠以藍寶石、GaN、A1N、 SiC爲首而使用玻璃、Si、GaAs、GaP等。在這些當中, 特別是前述基板係藍寶石(ai2o3 ),半導體層係最好是 第ΠΙ族氮化物半導體。 作爲藍寶石基板之面方位係可以使用m面、a面、c 面等,但是,即使是在其中,也‘最好是c面((0001 ) 面),並且,基板表面之垂直軸係最好是由< 0001〉方向 開始傾斜於特定之方向。此外,本發明所使用之基板係在 使用於第1製程前而進行有機洗淨或蝕刻之前處理時,最 好是可以使得基板表面之狀態來保持於一定狀態之緣故。 在本發明之發光元件之製造,η型層、p型層、發光 -13- (11) (11)200418207 層之成長或電極之形成、樹脂密封等係可以使用向來習知 之方法。半導體之成長方法係可以使用有機金屬化學氣相 成長法(MOCVD法)或氣相磊晶法(VPE法),來作爲 氣相成長法。其中,最好是MOCVD法係能夠對於不需要 之凹凸構造來進行平坦化之緣故。 [實施例] 以下,根據實施例而具體地說明本發明。 (實施例1 ) 在本實施例1,使用表面成爲(0001)面之藍寶石基 板。藉由在塗敷鑽石系硏削材之砂紙,塗敷純水,動作於 藍寶石基板之<1 一 100>方向,同時,進行擦拭,而在大 槪< 1 — 100 >方向,於線上,形成凹凸構造。藉由S]em 所觀察之凹部剖面形狀係成爲幅寬1 μ m、深度0·5 A m之 三角形(V字型溝之形狀)。V字型溝之隆起斜面和基板 平面所形成之角度0係在以45 °作爲中心而大槪30。〜 6〇 °之範圍。藉由600倍之光學顯微鏡所觀察之部位、平 坦部分之面積和損傷之部分之面積比例係平均成爲2 : 1 ° 充分地洗淨像這樣製作之附有V字型溝之藍寶石基 板,投入至MOCVD裝置。接著,在該藍寶石基板上,作 爲第1製程係施加流通在包含以三甲基鋁(TMAi )之蒸 氣和三甲基鎵(TMGa)之蒸氣作爲模型並且以1 : 2所混 -14 - (12) 200418207 合氣體的氣體以及包含氨(NH3)的氣體之處理。在 第1製程所使用之條件下之V/111比係大約85 % 著,作爲第2製程係流通TM G a和氨,成長氮化鎵, 工成爲凹凸狀之藍寶石基板上,製作由氮化鎵結晶所 之GaN層。 製作包含前述GaN層之試料之第1製程及第2 係使用MOCVD法而進行以下順序。 首先,在導入表面加工成爲凹凸狀之藍寶石基板 使得在藉由相同裝置所進行之前次成長而附著於反應 部之附著物,於包含氨和氫之氣體中,進行加熱及氮 不容易進行這個以上之分解。等待反應爐降溫至室 止,在氮氣所取代之球形箱中,使得載置於加熱用碳 受器上之藍寶石基板,導入至設置於感應加熱式加熱 RF線圈中之石英製反應爐中。在導入試料後,流通 而潔淨反應爐內。在經過10分鐘而流通氮氣後,啓 應加熱式加熱器,經過 10分鐘而使得基板溫度升 11 70 °C。在基板溫度仍然保持於1170 °C之狀態下, 氫氣和氮氣,同時,放置9分鐘,進行基板表面之 淨。 在進行熱潔淨之間,在連接於反應爐且放入成爲 之三甲基鎵(TMGa )的容器(起泡器)以及放入三 鋁(TMA1 )的容器(起泡器)之配管,流通氫載 體’開始進行起泡。各個起泡器之溫度係使用用以調 度之恒溫槽而呈一定地進行調整。藉由起泡所產 藉由 。接 在加 構成 製程 刖 J 爐內 化, 溫爲 製感 器之 氮氣 動感 溫至 流通 熱潔 原料 甲基 體氣 整溫 生之 • 15 - (13) (13)200418207 TMGa及TMA1之蒸氣係一直到開始進行成長製程爲止, 和載體氣體一起流通至除害裝置之配管,通過除害裝置, 放出至系統外。在熱潔淨之結束後,關閉氮載體氣體之 閥,使得對於反應爐內之氣體供應,僅成爲氫。 在載體氣體之切換後,使得基板溫度降溫至1 1 5 0 °C。在 115 0 °C確認溫度變得穩定後,打開氨配管之閥, 開始進行氨對於爐內之流通。接著,同時切換.TMGa及 TMA1之配管之閥,將包含TMGa及TMA1之蒸氣之氣體 來供應至反應爐內,開始進行在藍寶石基板上附著第III 族氮化物半導體的第1製程。所供應之TMGa及TMA1之 混合比係藉由設置在起泡之配管上之流量調節器而調節成 爲莫爾數比2 :],氨量係調節V / 111比成爲8 5。 在6分鐘之處理後,同時切換TMGa及TMA1之配管 之閥,停止將包含TMGa及TMA1之蒸氣之氣體來供應至 反應爐內。接著,也停止氨之供應,就這樣仍然保持3分 鐘。 在3分鐘之退火後,切換氨氣之配管之閥,在爐內, 再度開始氨氣之供應。就這樣仍然流通4分鐘之氨。其 間,調節TMGa之配管之流量調節器之流量。在4分鐘 後,切換TMGa之閥,開始進行TMGa對於爐內之供應, 開始進行GaN之成長。經過大約3小時而進行前述GaN 層之成長。 然後,接著,在以下之製程,依照η型層、發光層和 Ρ型層之順序而進層積,製作LED用磊晶晶圓。 -16- (14) (14)200418207 首先,在仍然持續地進行TMGa供應之狀態下,開始 進行SiH4之供應,進行大約1小時15分鐘左右之低Si 摻雜之η型G a N層之成長。S i Η 4之供應量係調整低S i摻 雜之GaN層之電子濃度成爲1 X 1017cm_3。低Si摻雜之 GaN層之膜厚係成爲2#m。 此外,在該低Si摻雜之GaN層上,成長高Si摻雜之 η型GaN層。在成長低Si摻雜之GaN層後,經過1分鐘 而停止TMGa和SiH4對於爐內之供應。其間,改變SiH4 之流通量。流通之量係在事前,進行檢討,調整高S i摻 雜之GaN層之電子濃度成爲lx 1 〇19cnT3。氨係以仍然這 樣之流量而繼續供應至爐內。 在停止1分鐘後,再度進行TMGa和SiH4之供應, 經過1小時而進行成長。藉由該操作而形成成爲1.8 // m 膜厚之高Si摻雜之η型GaN層。 在成長高Si摻雜之GaN層後,切換TMGa和,5丨114之 閥,停止這些原料供應至爐內。氨係仍然進行流通,同 時,切換閥而使得載體氣體由氫切換至氮。然後,使得基 板之溫度由1160°C開始降低至830°C。 在等待爐內溫度之變更之間,改變S iH4之供應量。 流通之量係在事前,進行檢討,調整Si摻雜之InGaN包 層之電子濃度成爲1 X l〇37cnT3。氨係以仍然這樣之流量 而繼續供應至爐內。此外,預先開始進行三甲基銦 (TMIn )和三乙基鎵(TEGa )對於起泡器之載體氣體之 流通。SiH4氣體以及藉由起泡所產生之TMIn和TEGa之 -17 - (15) 200418207 蒸氣係一直到開始進行包層之成長製程爲止, 一起流通至除害裝置之配管,通過除害裝置, 外。 然後,等待爐內之狀態變得穩定,同時七又 TEGa和SiH4之閥,開始進行這些原料對於爐 經過大約1 〇分鐘而持續地供應,形成成爲膜 Si摻雜之In0.03Ga0.97N所構成之η型包層^ 然後,切換TMIii、TEGa和SiH4之閥, 料之供應。 接著,製作由 GaN所構成之障壁層J In0.G6GaQ.94N所組成之井層而構成之多重量子 光層。在多重量子井構造之製作時,在由 In0.03Ga0.97N所構成之η型包層上,首先形尽 層,在該GaN障壁層上,形成Ino.c^Gao.wN 複層積5次之該構造後,於第5個Ino.^Gaoi 形成第6個G a N障壁層,成爲由G a N障壁層 量子井構造兩側之構造。 也就是說,在η型包層之成長結束後,於 鐘而停止後,基板溫度或爐內壓力、載體氣體 類係維持仍然,切換TEGa之閥,進行TEGa 供應。在經過7分鐘而進行TEGa之供應後, 而停止TEGa之供應,結束GaN障壁層之成長 成成爲7 0入膜厚之GaN障壁層。 在進行G a N障壁層之成長期間,使得流 和載體氣體 放出至系統 丨換 Τ Μ I η、 內之供應。 厚 1 0 0 Α之 停止這些原 Μ及藉著由 井構造之發 s i摻雜之 匕G a N障壁 井層。在重 ιΝ井層上, 來構成多重 ‘經過3 0秒 之流量或種 對於爐內之 再度切換閥 。藉此而形 動至除外設 -18 - (16) 200418207 備之配管之Τ ΜI η之流量,比起在包層 莫爾流量,來成爲2倍。 在G a Ν障壁層之成長結束後,在棄 第111族原料之供應後,基板溫度或爐 之流量或種類係維持仍然,切換TEG a 行TEG a和TMIn對於爐內之供應。在 TEGa和TMIn之供應後,再度切換^ TMIn之供應,結束in^wGaowN井層 成成爲20人膜厚之in〇 〇6Ga〇.94N井層。 在I η 〇. 〇 6 G a 〇. 9 4 N井層之成長結束g 而停止第ill族原料之供應後,基板溫 體氣體之流量或種類係維持仍然,開始 內之供應,再度進行GaN障壁層之成長 重複進行5次之此種順序,製作」 和 5 層之 In0.06Ga0.94N 井層。也 In0.06Ga0.94N井層上,形成GaN障壁層 在該GaN障壁層所結束之多重量 無摻雜之AU.2Gao.sN擴散防止層。 預先開始進行三甲基鋁(TMA1 ) 氣體之流通。藉由起泡所產生之TMA1 進行擴散防止層之成長製程爲止,和載 除害裝置之配管,通過除害裝置,放出 等待爐內之壓力變得穩定,切換 閥,開始進行這些原料對於爐內之供應 之成長時,還調節 g過3 0秒鐘而停止 內壓力、載體氣體 和TMIn之閥,進 經過2分鐘而進行 圈而停止 TEGa和 之成長。藉此而形 t,在經過3 0秒鐘 度或爐內壓力、載 進行TEGa對於爐 〇 5層之GaN障壁層 =外,在最後之 〇 子井構造上,製作 對於起泡器之載體 蒸氣係一直到開始 體氣體一起流通至 至系統外。 TEGa 和 TMA1 之 。然後,在經過大 • 19 - (17) (17)200418207 約3分鐘而進行成長後,停止TEG a和TMA1之供應,停 止無摻雜之Al〇.2Ga().8N擴散防止層之成長。藉此而形成 成爲30人膜厚之無摻雜之Alo.2Gao.8N擴散防止層。 在該無摻雜之AlQ.2GaQ.sN擴散防止層上,製作由Mg 摻雜之GaN所構成之p型包層。 停止TEGa和TMA1之供應,在無摻雜之AlG.2GaG.8N 擴散防止層之成長結束後,經過2分鐘,使得基板之溫度 上升至 1100 °C。此外,將載體氣體改變成爲氫。此外, 預先開始進行雙環戊二烯基鎂(CP2Mg)對於起泡器之載 體氣體之流通。藉由起泡所產生之CP2Mg蒸氣係一直到 開始進行Mg摻雜之GaN層之成長製程爲止,和載體氣體 一起流通至除害裝置之配管,通過除害裝置,放出至系統 外。 改變溫度和壓力而等待爐內之壓力變得穩定,切換 TMGa和Cp2Mg之閥,開始進行這些原料對於爐內之供 應。流通Cp 2 Mg之量係在事前,進行檢討,調整由Mg摻 雜之GaN所構成之p型包層之正孔濃度成爲8xl017 cnT3。然後,在經過大約 6分鐘而進行成長後,停止 TMGa和Cp2Mg之供應,停止Mg摻雜之GaN層之成長。 藉此而形成成爲膜厚0.15 // m之Mg摻雜之GaN層。 在結束M g摻雜之G a N層之成長後,停止對於感應加 熱式加熱器之通電,經過20分鐘而使得基板之溫度降溫 至室溫爲止。在由成長溫度開始至300t爲止之降溫中, 僅由氮來構成反應爐內之載體氣體,流通作爲流量之1 % -20- (18) (18)200418207 之NH3。然後,在確認基板溫度成爲300 °c之時間點,停 止NH3之流通,使得氣氛氣體僅成爲氮。確認基板之溫 度降溫至室溫爲止,將晶圓取出至大氣中。 藉由以上順序而製作具有半導體發光元件用之磊晶層 構造之舞晶晶圓。在此’ Mg摻雜之GaN層係即使是不進 行用以活化P型載體之退火處理’也顯示P型。 接著,使用在前述藍寶石基板上而層積磊晶層構造之 磊晶晶圓,製作成爲一種半導體發光元件之發光二極體。 就製作之晶圓而言’藉由習知之光微影法而在Mg摻雜之 GaN層表面上,形成具有由表面側開始依序地層積鈦、鋁 和金之構造的P電極接合銲墊以及接合於此之僅由Αιι所 構成的透光性P電極’製作P側電極。 此外,然後,在晶圓,進行乾式蝕刻’露出形成高 Si摻雜之GaN層之η側電極之部分’在·露出之部分,製 作由Ni、Al、Ti和Au之4層所構成之η電極。 就像這樣而形成Ρ側及η側電極之晶圓而言’硏削藍 寶石基板之背面至厚度1 〇 〇 # m爲止,進行硏削而成爲鏡 狀面。然後,將該晶圓切斷成爲3 5 0 // m角之正方形晶 片,接合於副固定上而使得電極成爲下面,由副固定上之 電極端子開始,結線於1C導線架,成爲覆晶型發光元 件。此外,藉由樹脂來密封發光元件,而在矽酮樹脂,幾 乎成爲半球形狀,製作第4圖所示之砲彈型LED燈源。 在像前述這樣所製作之LED燈源之P側及n側之電 極間來流動順方向電流時,電流 20mA之發光波長係 -21 - (19) (19)200418207 3 8 0 n m,輸出値係1 4 · 0 m W,順方向電壓係3.4 V。 此外’在藉由光學顯微鏡而觀察通電至樹脂密封前之 LED晶片時之晶片表面之處,在某一面,觀測到認爲是 GaN之深準位間發光的黃色發光,但是,其中,觀測到: 在藍寶石< 1 - 1 00 >方向,存在線狀之強發光強度之部 分0 (比較例) 在本比較例,在藉由幾乎相同於實施例1之製程,但 是’進行藍寶石表面仍然成爲平坦僅呈不同之LED之製 作。 使用表面呈平坦之藍寶石基板,使用藉由相同於實施 例1之同樣方法而進行成長之LED用磊晶晶圓,相同於 實施例1,製作砲彈型LED燈源。該LED燈源係成爲 20mA通電、發光波長380nm、輸出値7.8mW。確認:實 施例1之LED燈源係相對於該比較例之LED燈源,成爲 1 · 8倍之輸出。 (實施例2 ) 在本實施例2,使用附有表面成爲(0001 )面之厚度 1 β πι之A1N膜之藍寶石基板。藉由在還原氣氛下,對於 該基板來進行1400°C之高溫處理,而在A1N表面,形成 六角錘之坑洞和不定形之凹凸。坑洞之直徑係0.5〜2 # m 左右’大者係其底面到達至藍寶石基板,也成爲六角錘台 -22- (20) (20)200418207 形°坑 '洞或不定形之凹凸所佔有之面積和平坦部分之面積 之比例係大槪成爲1 : 〇. 2〜1 : 4左右。六角錘之斜面係 藉由A1N之(11— 22)面和(1— ι〇2)面之2種所構成 六角錘斜面和基板平面所形成之角度Θ係分別成爲5 8 °、 43° ° 充分地洗淨像這樣所製作之附有坑洞形成A1N膜之 藍寶石基板,投入至MOCVD裝置,相同於實施例1而製 作LED用磊晶晶圓。 使用藉由前述方法而進行成長之LED用磊,晶晶圓, 相同於實施例1,製作砲彈型LED燈源。該LED燈源係 成爲20mA通電、發光波長380nm、輸出値.12.6mW。比 起比較例而成爲1.6倍之輸出增加。 此外,在藉由光學顯微鏡而觀察前述通電時之LED 表面之處,在某一面,觀測到認爲是G aN之深準位間發 光的黃色發光,但是,其中,觀測到:呈六角形狀地存在 強發光強度之亮度部分。 (實施例3 ) 在本實施例3,使用表面成爲(0001 )面之藍寶石基 板。在該基板,平行於藍寶石之<1 一 1〇〇>方向,來形成 藉由線幅寬2 μ m、空間幅寬2 // m之線條狀SiN膜所構 成之選擇成長用罩幕,在充分地洗淨後,投入至MOCVD 裝置。接著,作爲第1製程係在高溫下,流通包含三甲基 鋁(TMA1 )蒸氣之氣體,作爲第2製程係流通TMA1和 -23- (21) (21)200418207 氨而成長剖面成爲三角形形狀之線條狀氮化鋁。此外,然 後,在氮化鎵層而進行平坦化後,製作L E D構造。 包含前述A1N層之試料之製作係使用M〇cvD法而藉 由以下之順序來進行。首先,將藍寶石基板來導入至設置 於感應加熱式加熱器之RF線圈中之石英製反應爐中。藍 寶石基板係在氮氣所取代之球形箱中,載置於加熱用碳製 感受器上。在導入試料後,流通氮氣而潔淨反應爐內。 在經過1 0分鐘而流通氮氣後,啓動感應加熱式加熱 器,經過10分鐘而使得基板溫度升溫至60(TC。在使得 基板溫度仍然保持於6 0 0 °C之狀態下,流通氮氣,同時, 放置9分鐘。其間,在連接於反應爐且放入成爲原料之三 甲基鎵(TMGa )的容器(起泡器)以及放入三甲基鋁 (TMA1 )的容器(起泡器)之配管,流通氬載體氣體, 開始進行起泡。各個起泡器之溫度係使用用以調整溫度之 恒溫槽而呈一定地進行調整。藉由起泡所產生之T M G a及 TMA1之蒸氣係一直到開始進行成長製程爲止,和載體氣 體一起流通至除害裝置之配管,通過除害裝置,放出至系 統外。然後,關閉氮載體氣體之閥,開始進行對於反應爐 內之氫氣供應。 在載體氣體之切換後,使得基板溫度升溫至115〇 °C。在115(TC確認溫度變得穩定後,切換TMA1配管之 閥,將包含TMA1蒸氣之氣體來供應至反應爐內。此時’ 認爲藉由附著於反應爐之壁面或天板上之附著物之分解而 使得T M A1同時和少量之氮,來供應至基板。在9分鐘之 -24- (22) (22)200418207 處理後,同時切換TMA1之配管之閥,停止將包含TMA1 蒸氣之氣體來供應至反應爐內,就這樣仍然保持3分鐘。 在3分鐘之退火後,切換氨氣之配管之閥,在爐內, 開始進行氨氣之供應。就這樣仍然流通4分鐘之氨。其 間,調節TMA1之配管之流量調節器之流量。在4分鐘 後,切換TMA1之閥,開始進行TMA1對於爐內之供應, 開始進行A1N之成長經過大約3小時而進行A1N層之成 長。在該階段所取出之實驗,在呈線條狀地表現之藍寶石 面上,具有頂點,成長剖面呈三角形之A1N。在該階段, SiN罩幕係藉由A1N而進行埋入。該斜面係A1N之(1 — 102 )面,和基板平面所形成之角度係43 °。然後,切換 TMA1之配管之閥,結束原料對於反應爐之供應而停止成 長。 在結束 A1N層之成長後,接著,進行 GaN層之成 長。藉由3小時之成長而使得GaN層之成長表面,成爲 平坦化,依序地層積η型層、發光層和p型層而製作LED 用嘉晶晶圓 ° 使用藉由前述方法而進行成長之LED用磊晶晶圓, 相同於實施例1,製作砲彈型LED燈源。該LED燈源係 成爲20mA通電、發光波長380nm、輸出値14.8mW。比 起比較例而成爲1 · 9倍之輸出。 此外,在藉由光學顯微鏡而觀察前述通電時之LED 表面(藍寶石面)之處,在某一面,觀測到認爲是G a N 之深準位間發光的黃色發光,但是,其中,觀測到線條狀 -25- (23) 200418207 之強發光強度之粗亮線部分和弱發光強度之細暗線部分。 [發明之效果]200418207 (1) 发明. Description of the invention [Technical field to which the invention belongs] The present invention relates to a light emitting diode (LED) for improving light extraction efficiency and a manufacturing method thereof. In particular, the structure of a laminated interface capable of improving light extraction efficiency has a feature. [Prior art] In terms of energy saving, a light-emitting element that requires higher energy consumption efficiency (external quantum efficiency) is required. The external quantum efficiency of a GaN-based light-emitting diode laminated on a sapphire substrate has been around 3 82nrn. The external quantum efficiency is 24% in Patent Document i. The external quantum efficiency becomes the product of the "internal quantum efficiency X voltage efficiency X light extraction efficiency" and is decomposed into three factors. Except for the measurable voltage efficiency (about 90 ~ 95%), two factors become unmeasured. While still unable to judge these levels, it is mainly to review the increase in internal quantum efficiency caused by the most appropriate crystalline crystal structure or structure. On the other hand, as an example of improvement in light extraction efficiency, since the LED chip is covered with a resin having a refractive index close to that of a semiconductor, the light emitted through the resin is efficiently transmitted through the resin, and the resin surface is processed into a spherical surface. Method for suppressing total reflection at resin and air interface. In addition, as an example of increasing the light extraction efficiency by a factor of about two by cutting the substrate into an inverted pedestal type, the Cree company in the United States sells it in the X-Bright series. -4-(2) 200418207 On the other hand, it is known that a semiconductor crystal substrate is formed by adding unevenness to the surface of the semiconductor crystal substrate as a method of performing low-diffusion exhaustion of the semiconductor crystal. For example, it is shown that a line-shaped groove can be formed on the surface of a Group 111 nitride semiconductor on the substrate, and epitaxial growth can be performed by making a low-temperature GaN buffer layer and a high-temperature Group η nitride semi-crystal thereon. And reduce the difference in row density. Since the difference is reduced, the groove inclination angle can be 60 ° or more. However, the light extraction efficiency has not been touched (for example, refer to Patent Document 1) [Patent Document 1] Japanese Patent Laid-Open No. 2002-164296 [Non-Patent Document 1] Mr. Tadatomo, et al. (K. Tadatomo, et al.), Japanese Journal of Applied Physics, Vol. 40, p. L583 ~ L585. [Summary of the Invention] [Problems to be Solved by the Invention] Generally, a light-emitting element (LED) is a light-emitting layer that refracts the refractive index of an external medium. Therefore, an incident angle greater than a total reflection angle cannot be taken out by the light-emitting layer. . The object of the present invention is to allow concaves and convexes on the sides having a two-layer interface with different refractive indices to be drawn out to the outside without total reflection to improve the light extraction efficiency of the element. The method, the density of the conductor junction of the long square sapphire growth is 1, for non-applied objects, and the light with a rate greater than 2001 is sufficient to guide the light to emit light -5- (3) (3) 200418207 [means to solve the problem ] First, the description of the simulation of the warp and weft of the present invention is completed. In order to estimate §10 unmeasured light extraction efficiency and internal quantum efficiency, the inventors estimated the light extraction efficiency from the LED by optical simulation. As a simplistic LED model, a sapphire substrate with a thickness of 300 // m and a thickness of 100 // m was used to laminate a GaN layer with a thickness of 300 // m and a thickness of 6.1 # m. At the center of the 300 // 111 angle, from the point where the GaN surface starts to enter the GaN layer of 0.1 m, a point light source is arranged to emit light isotropically. Refractive index system allows sapphire to use η = 1.8 silicone resin, GaN to η = 2.7 (light emitting wavelength 380nm state) silicone resin or η = 2 · 4 (light emitting wavelength 400nm state) silicon resin The outside of these meets the refractive index with a silicone resin with II = 1.4. The refractive index of each wavelength of GaN is obtained by measuring commercially available GaN bulk substrates. Starting from a point light source, many rays are generated along a random direction (Monte Carlo method). The rays are at various interfaces of different refractive indices. With the Fresnel formula to calculate the ratio of refracted rays and reflected rays, Forking. The number of light generated is 500,000, and the bifurcation limit is 10 times. A light-collecting surface is assumed to be set on the back surface of the substrate, the surface of the semiconductor layer, and the resin side slightly from each side surface and the resin interface, and the light extraction efficiency from each surface is calculated. Table 1 shows the states (①, ②) where the uneven structure is not provided on the substrate and the state (③) where the uneven structure shown in Fig. 1 is provided on the surface of the substrate. Result of light extraction efficiency at semiconductor level and side. »6- 200418207 [I combined 54.9% 39.3% ί ___ 92.4% side (GaN side, sapphire side) 10.1% X 4 = 40.4% (7.4%, 2.7%) 7.2% χ 4 = 28.8% (5.4%, 1.8 %) Sides perpendicular to the line grooves: 15.3% (0.5%, 14.8%) X 2 Sides parallel to the line grooves: 15.4% (0.5%, 14.9%) x 2 Surface of the semiconductor layer 7.4% 5.4% ί__ 5.3% substrate 7.1% on the back 5.1% 1 1 25.7% Refractive index inch 1 (N II -T 丄 dance II slightly sg w 莸 vice r- 1 (Ν II c ο ^ ^ ^ ^ 5 1 II box Sg ft _ r- I (Ν II c 〇ί II m gg * 癍 _ Calculation of light extraction efficiency 〇 m Q ^ S m ―) iw like wi Λ 〇 擞 3 ㊀ \ ② Same as above, emission wavelength 382nm embedded a < If * N g is late. in ^ »I gg perch 1 _ 1 \ I ^ ^ 1 ES 11¾ ° m MW Si II ^ 0 retort (5) 200418207 When using this result, the state of the substrate with no uneven structure is set at the emission wavelength of 400nm The total light extraction efficiency in the state is about%, and it is about 40% in the state of 3 82 nm. This result is applied to the LED described in Non-Patent Document 1. In this publication, it is stated that, for a Group 111 nitride semiconductor LED using a sapphire substrate, at an emission wavelength of 3 82nm, the external quantum efficiency is 24% at 400nm, which is 30%. It is assumed that 24% of the external quantum efficiency is 24% = internal quantum efficiency 60% X voltage efficiency 95% X light extraction rate 40% and assuming 30% becomes 30% = internal quantum efficiency 60% X electrical efficiency 90% X light When the extraction efficiency is 55%, regardless of the emission wavelength, the internal quantum efficiency can be uniformly described as 60%, and the simulation results are considered to be appropriate. With this simulation, the light extraction efficiency is about 55% at a wavelength of 400 nm, and about% at a wavelength of 38 2 nm. Therefore, there is room for improvement of 1.8 times and 2.5 times, respectively. In addition, the internal quantum efficiency is about 1.6 times higher. The present invention relates to light extraction efficiency among these. If we analyze the simulation results in detail, we know that in the state sealed by the resin with refractive index n = 1.4, the light transmitted from the GaN layer through the sapphire substrate is taken out through 100% resin. Whether or not the light group turned off in the GaN layer can be taken to the sapphire substrate or the resin system is required to improve the light extraction efficiency. In order to start from the GaN layer and make the light transmit through the length of the effect of 55, the length of the press section is 40. This is from open to heavy blue -8 ~ (6) (6) 200418207 gem substrate or resin, so it can be tilted The interface between the GaN layer and the substrate such that the angle at which light enters the interface does not exceed the total reflection angle. The most appropriate tilt angle is 45 °. Table 3 (3) shows the calculation results in the state where the line-shaped uneven structure with an inclination angle of 45 ° shown in Fig. 1 was introduced at the interface between the GaN layer and the sapphire substrate. It is learned that the light extraction efficiency from the semiconductor level to the outside through the resin does not change much, but the light extraction efficiency from the back or side of the sapphire to the outside improves. As a result, it is estimated that in the state of a light emission wavelength of 3 82 nm (refractive index of GaN 2.7), the light extraction efficiency is more than doubled compared to ②. In addition, in terms of the ratio of the upper surface, the lower surface, and the inclined surface of the uneven structure, it is preferable that the structure having only the inclined surface without the upper surface and the bottom surface improves the light extraction efficiency. The present invention has been completed based on the simulation results, and is composed of the following inventions. (1) A light-emitting element characterized in that, in a light-emitting element having a substrate, a semiconductor layer, and a light-emitting layer, the refractive index of the substrate and the semiconductor layer laminated thereon are different, and the surface of the semiconductor layer on which the substrate is laminated, The unevenness with the inclined side surface is formed so that the angle 0 of the inclined side surface with respect to the substrate surface becomes 30 ° < 0 < 60 °. (2) A light-emitting element characterized in that, in a light-emitting element having a substrate, a semiconductor layer, and a light-emitting layer, a refractive index system is different between laminated semiconductor layers, and an inclined side surface is formed at a laminated interface of the semiconductor layer. Bump. (3) The light-emitting element according to (2) above, which is the inclined side of the unevenness. -9-(7) 200418207 The angle 0 of the surface with respect to the substrate is 30 ° < 0 < (4) Any one of (1) to (3) above, which is one of a V-shaped groove with a concave-convex line and an inclined pothole on the side. (5) Any of the above (1) to (4), the substrate is made of sapphire (ai2o3 AlxGayIni_x_yN (1, 1) (6) The semiconductor feature described in (1) above is: The semiconductor method described in (1) above (7) in the table (7) on the side of the semiconductor layer of the laminated substrate by a high-temperature treatment and a selective etching method includes: having a substrate, a semiconductor layer, and a production method; On the surface of the substrate, a selective substrate is formed on the surface of the substrate, and a semiconductor protrusion lamination interface with an inclined side surface is formed to form an uneven surface with an inclined side surface (8) The semiconductor feature described in the above (2) is: Method, by using a method of high temperature treatment and selective method, a convex surface is provided on the surface of the semiconductor layer so as to be convex at the laminated interface of the semiconductor layer. (9) The luminescence element described in the above (2) is: It has a substrate, a semiconductor layer, and a light-emitting element having a light-emitting side in 60 ° as described in the linear side-inclined protrusions-the light-emitting element described in the item) 'The semiconductor layer becomes a manufacturing method of the element, and the light-emitting layer has a light-emitting element. The system of one cut and WH wherein A surface provided irregularities. The manufacturing method of the device, the growth mask for the selection of the light-emitting device of the light layer, and the manufacturing method of the device for the semiconductor layer, the manufacturing and etching of the light-emitting device of the light layer, one of the | Manufacturing method of concave part with inclined side face into concave part with inclined side face, manufacturing of special layer light-emitting element • 10- (8) (8) 200418207 Method 'On the surface of the semiconductor layer, form a mask for selective growth. The semiconductor layer is provided with a semiconductor protrusion having an inclined side surface. (10) An LED light source using the light-emitting element according to any one of (1) to (5) above. [Embodiment] [Embodiment of the invention] The light-emitting element of the present invention is formed with concave and convex on the side of the substrate or a layered interface between semiconductor layers. The reflection between the substrate and the interface between the semiconductor layers laminated thereon or the layered interface between the semiconductor layers occurs at the layered interface 'where the refractive indices of the two are different. The present invention is to take out as much light as possible when the refractive indexes of the two are different, and take it out of the LE.D. The detailed description of the mechanism for improving the light extraction efficiency by providing the aforementioned unevenness is omitted. However, when the laminated interface is qualitatively made flat, the light reflected at the interface is repeatedly reflected, It also repeats the same state. Therefore, fewer people go out to the outside. However, when the interface is concave and convex, even if it is reflected once, there is a state where the light incident on the interface is below the total reflection angle. If repeatedly If you do this, there will be more light systems going out to the outside. One of the light-emitting elements of the present invention is provided on the surface of the substrate (the side of the laminated semiconductor layer; the same applies hereinafter). The asperities are inclined at the sides, and two of them are provided at the interface between the laminated semiconductor layers. The led system is as shown in Fig. 2. On the substrate, a buffer layer is formed in multiple layers. (11-200418207). Semiconductor layers, n-type semiconductor layers, light-emitting layers, p-type semiconductor layers, etc. If the surface becomes the interface between two semiconductor layers with different refractive indices, it can be any one, and it is best to choose one of the interfaces with a large effect. The laminated interface of the semiconductor layer also includes the interface of the semiconductor layer and the light emitting layer. In the present invention, (a) to (c) of Fig. 3 are representative of the uneven structure formed on a substrate or the like. (A) of FIG. 3 is a V-shaped groove formed linearly on the surface of the substrate, and (b) of FIG. 3 is a hexagonal hammer-shaped cavity formed on the surface of the substrate with a hexagonal cross section. (C) Triangular protrusions made of semiconductors are formed in a linear pattern on the surface of the substrate. The angle of the oblique side surface of the 0-type unevenness shown in the figure with respect to the substrate surface. The angle Θ formed on the inclined surface of the uneven surface of the substrate is preferably 45 °, but if it is 30 ° < Θ < A range of 60 ° has a sufficient effect. There is no particular limitation on the angle of the concave and convex inclined sides formed at the interface between the semiconductors, but it is preferably 30 °, which is the same as the substrate state. < Θ < Range of 60 °. The unevenness formed on the substrate or the like may be uniform or deliberately deviate from the surface orientation of the substrate or the semiconductor layer. The unevenness size and depth are arbitrarily selected. However, in consideration of flattening the surface of a Group III nitride semiconductor crystal grown on an interface having irregularities, it is preferable that the diameter of the recessed portion is 3 #m or less and the depth of the recessed portion is 2 // m or less. As shown in Non-Patent Document 1, the planarization system can be easily realized if the growth conditions of the semiconductor layer are appropriately selected. -12-(10) (10) 200418207 The method for forming unevenness on the substrate or the like of the present invention is the formation of pits caused by high-temperature processing and the linear grooves or pits caused by selective etching. Formation, or formation of V-shaped grooves using a chamfered material. Here, "V-shaped grooves" also include those whose bottoms are flat or those whose sides are somewhat rounded. These are recessed shapes, but they can also be masked on a substrate or the like to selectively grow semiconductors, for example, linearly forming protrusions with a triangular cross section. The angle 0 of the concave-convex inclined surface formed by the aforementioned method is in the cutting method, and many states enter the range of 30 ° ~ 60 °. The pits caused by high temperature processing are almost performed by the crystal plane. Decided to be 5 of 8. And 43 ° ° Furthermore, a predetermined mask is formed by SiN. When A1N or GaN is grown on it, the angle of inclination of the triangular protrusion formed is 5 8. And 43. . In the present invention, glass, Si, GaAs, GaP, etc. can be used as the substrate system including sapphire, GaN, A1N, and SiC. Among these, particularly the aforementioned substrate-based sapphire (ai2o3), the semiconductor layer system is preferably a group III nitride semiconductor. As the plane orientation of the sapphire substrate, m-plane, a-plane, c-plane, etc. can be used, but even among them, the c-plane ((0001) plane) is preferred, and the vertical axis of the substrate surface is best. By < 0001> Direction Begins to tilt in a specific direction. In addition, when the substrate used in the present invention is processed before the organic cleaning or etching before the first process, it is preferable that the state of the substrate surface can be maintained in a certain state. In the production of the light-emitting element of the present invention, conventionally known methods can be used for the growth of the n-type layer, the p-type layer, and the formation of layers, electrode formation, and resin sealing. As a semiconductor growth method, an organic metal chemical vapor phase growth method (MOCVD method) or a vapor phase epitaxy method (VPE method) can be used as a vapor phase growth method. Among them, it is preferable that the MOCVD method is capable of planarizing an uneven structure that is not required. [Examples] Hereinafter, the present invention will be specifically described based on examples. (Embodiment 1) In Embodiment 1, a sapphire substrate having a (0001) surface is used. Applying pure water on sandpaper coated with diamond-based masonry materials, and moving on the sapphire substrate < 1-100 > direction, while wiping, while < 1 — 100 > Direction, forming an uneven structure on the line. The cross-sectional shape of the recesses observed by S] em is a triangle (V-shaped groove shape) with a width of 1 μm and a depth of 0.5 A m. The angle formed by the raised slope of the V-shaped groove and the plane of the substrate is 0, which is about 30 ° with 45 ° as the center. ~ 60 ° range. The ratio of the area observed by a 600-times optical microscope, the area of the flat portion, and the area of the damaged portion averaged 2: 1 °. The sapphire substrate with V-shaped grooves produced in this way was sufficiently washed and put in MOCVD device. Next, on this sapphire substrate, a vapor containing trimethylaluminum (TMAi) and trimethylgallium (TMGa) as a model was applied as a first process system and mixed with 1: 2-14-( 12) 200418207 Treatment of mixed gas and ammonia-containing gas (NH3). Under the conditions used in the first process, the V / 111 ratio is about 85%. As the second process, TM G a and ammonia are circulated to grow gallium nitride. The sapphire substrate is made into a concave-convex shape. GaN layer of gallium crystals. The first process and the second process for producing a sample including the GaN layer are performed in the following order using a MOCVD method. First, the introduction of a sapphire substrate whose surface has been processed into a concavo-convex shape makes it difficult to carry out heating and nitrogen in a gas containing ammonia and hydrogen in an adherent attached to the reaction part before the previous growth by the same device. Of decomposition. Wait for the temperature of the reaction furnace to cool down. In a spherical box replaced by nitrogen, the sapphire substrate placed on the heating carbon receiver is introduced into a quartz reaction furnace installed in an induction heating RF coil. After the sample was introduced, the inside of the reactor was cleaned by circulation. After 10 minutes of nitrogen flow, the heating heater was activated, and the substrate temperature increased by 11 70 ° C after 10 minutes. While the substrate temperature was still maintained at 1170 ° C, the substrate surface was cleaned by leaving it for 9 minutes at the same time with hydrogen and nitrogen. Between thermal cleaning, piping is circulated between the container (bubble generator) connected to the reactor and containing trimethylgallium (TMGa) and the container (bubble generator) containing trialuminum (TMA1). The hydrogen carrier 'started to foam. The temperature of each bubbler is adjusted to a certain degree using a thermostatic bath for adjustment. Produced by bubbling with. It is connected to the J process furnace of the addition process, and the temperature of the nitrogen is from the temperature of the sensor to the temperature of the flowing hot and clean raw material methyl body gas. The temperature is 15-15. (13) (13) 200418207 The vapor system of TMGa and TMA1 has been Until the start of the growth process, it is circulated with the carrier gas to the piping of the detoxification device, and discharged through the detoxification device to the outside of the system. After the thermal cleaning is completed, the valve of the nitrogen carrier gas is closed, so that only hydrogen is supplied to the gas supply in the reaction furnace. After the carrier gas is switched, the substrate temperature is reduced to 115 ° C. After confirming that the temperature has stabilized at 115 0 ° C, open the valve of the ammonia piping to start the circulation of ammonia into the furnace. Next, the piping valves of .TMGa and TMA1 were switched at the same time, and the gas containing the vapors of TMGa and TMA1 was supplied to the reaction furnace, and the first process of attaching the Group III nitride semiconductor to the sapphire substrate was started. The mixing ratio of the supplied TMGa and TMA1 was adjusted to a Mohr number ratio of 2:] by a flow regulator provided on the bubbled pipe, and the ammonia amount was adjusted to a V / 111 ratio of 8 5. After 6 minutes of processing, the valves of the piping of TMGa and TMA1 were switched at the same time, and the supply of gas containing the vapors of TMGa and TMA1 to the reactor was stopped. Then, the supply of ammonia was also stopped, and it remained for 3 minutes. After annealing for 3 minutes, the valve of the piping of ammonia gas was switched, and the supply of ammonia gas was started again in the furnace. In this way, ammonia was still circulating for 4 minutes. Meanwhile, the flow rate of the flow regulator of the TMGa piping was adjusted. After 4 minutes, the valve of TMGa was switched, the supply of TMGa to the furnace was started, and the growth of GaN began. The growth of the GaN layer is performed after about 3 hours. Then, in the following process, lamination is performed in the order of the n-type layer, the light-emitting layer, and the p-type layer to produce an epitaxial wafer for LEDs. -16- (14) (14) 200418207 First, while still supplying TMGa, the supply of SiH4 is started, and the growth of the low Si-doped n-type G a N layer for about 1 hour and 15 minutes is started. . The supply amount of S i Η 4 is adjusted so that the electron concentration of the low S i doped GaN layer becomes 1 X 1017 cm_3. The film thickness of the low Si-doped GaN layer is 2 # m. In addition, on the low Si-doped GaN layer, a high Si-doped n-type GaN layer is grown. After the low Si-doped GaN layer was grown, the supply of TMGa and SiH4 to the furnace was stopped after 1 minute. In the meantime, the flow of SiH4 was changed. The amount of circulation was reviewed beforehand, and the electron concentration of the high Si-doped GaN layer was adjusted to 1x1019cnT3. Ammonia continues to be supplied to the furnace at the same flow rate. After stopping for 1 minute, the supply of TMGa and SiH4 was resumed, and growth was performed after 1 hour. By this operation, a high Si-doped n-type GaN layer with a film thickness of 1.8 // m is formed. After growing a high Si-doped GaN layer, the valves of TMGa and 5114 are switched to stop the supply of these materials into the furnace. The ammonia system is still circulating, and at the same time, the valve is switched to switch the carrier gas from hydrogen to nitrogen. Then, the temperature of the substrate was reduced from 1160 ° C to 830 ° C. While waiting for the temperature in the furnace to change, change the supply of SiH4. The amount of circulation was reviewed beforehand, and the electron concentration of the Si-doped InGaN cladding was adjusted to 1 X 1037cnT3. Ammonia continues to be supplied to the furnace at such a flow rate. In addition, the circulation of trimethylindium (TMIn) and triethylgallium (TEGa) to the carrier gas of the bubbler was started in advance. The SiH4 gas and the TMIn and TEGa -17-(15) 200418207 vapor generated by the bubbling flow until the cladding growth process begins, and circulate to the piping of the detoxification device, and pass through the detoxification device. Then, wait for the state of the furnace to become stable, and at the same time, the valves of TEGa and SiH4 start to supply these materials to the furnace continuously for about 10 minutes to form a film of Si-doped In0.03Ga0.97N Η-type cladding ^ Then, the valves of TMIii, TEGa and SiH4 are switched, and the supply of materials is switched. Next, a multiple quantum light layer composed of a well layer composed of a barrier layer J In0.G6GaQ.94N composed of GaN was fabricated. In the fabrication of the multiple quantum well structure, the η-type cladding layer composed of In0.03Ga0.97N is first formed, and the Ino.c ^ Gao.wN multilayer is formed 5 times on the GaN barrier layer. After this structure, a sixth GaN barrier layer is formed on the fifth Ino. ^ Gaoi, which becomes a structure on both sides of the quantum well structure by the GaN barrier layer. That is to say, after the growth of the n-type cladding is completed and after the clock is stopped, the substrate temperature or the furnace pressure and the carrier gas system are maintained, and the TEGa valve is switched to supply TEGa. After the supply of TEGa was performed after 7 minutes, the supply of TEGa was stopped, and the growth of the GaN barrier layer was ended to become a GaN barrier layer with a thickness of 70%. During the growth of the G a N barrier layer, the flow and the carrier gas are released to the system, and the supply in T M I η is changed. A thickness of 100 A stops these original M and B dominated well layers by s i doped by the structure of the well. On the heavy well layer, it constitutes multiple ‘after 30 seconds of flow or a kind of re-switching valve in the furnace. This means that the flow rate of T Μ η in the piping of the -18-(16) 200418207 equipment is doubled compared to the Moire flow in the cladding. After the growth of the GaN barrier layer is over, after discarding the supply of Group 111 raw materials, the substrate temperature or the furnace flow rate or type is still maintained, and the TEG a line is switched to the supply of TEG a and TMIn to the furnace. After the supply of TEGa and TMIn, the supply of TMIn was switched again and the in ^ wGaowN well formation was completed to form a 20-person film thickness of in. 06Ga.94N well. After the growth of I η 〇. 〇6 〇 〇 9 4 N well formation was stopped and the supply of Group ill materials was stopped, the flow or type of the substrate warm gas was maintained, and the supply was started, and GaN was performed again. The growth of the barrier layer was repeated in this order five times, and "5" layers of In0.06Ga0.94N wells were produced. Also on the In0.06Ga0.94N well layer, a GaN barrier layer is formed. The weight of the end of the GaN barrier layer is an undoped AU.2Gao.sN diffusion prevention layer. The circulation of trimethylaluminum (TMA1) gas was started in advance. The TMA1 generated by the foaming is used for the growth prevention process of the diffusion prevention layer, and the piping carrying the detoxification device is released through the detoxification device to wait for the pressure in the furnace to become stable. During the growth of the supply, the valve of internal pressure, carrier gas, and TMIn was also stopped after 30 seconds of g was adjusted, and the growth of TEGa was stopped after a lap of 2 minutes. In this way, after 30 seconds or the pressure in the furnace, the load of TEGa for the GaN barrier layer of the 05 layer of the furnace = outside, and on the last 0 sub-well structure, a carrier vapor for the bubbler is produced. Until the beginning of the body gas flow outside the system. TEGa and TMA1. Then, after about 3 minutes of growth from 19-(17) (17) 200418207, the supply of TEG a and TMA1 was stopped, and the growth of the undoped Al0.2Ga (). 8N diffusion prevention layer was stopped. This formed an undoped Alo.2Gao.8N diffusion prevention layer with a thickness of 30 people. On the undoped AlQ.2GaQ.sN diffusion prevention layer, a p-type cladding layer composed of Mg-doped GaN is fabricated. The supply of TEGa and TMA1 was stopped. After the growth of the undoped AlG.2GaG.8N diffusion prevention layer was completed, the substrate temperature rose to 1100 ° C after 2 minutes. In addition, the carrier gas is changed to hydrogen. In addition, the circulation of dicyclopentadienyl magnesium (CP2Mg) to the carrier gas of the bubbler was started in advance. The CP2Mg vapor generated by the bubbling is carried out until the growth process of the Mg-doped GaN layer is started, and circulates with the carrier gas to the piping of the detoxification device, and is discharged to the outside of the system through the detoxification device. Change the temperature and pressure while waiting for the pressure in the furnace to stabilize, switch the valves of TMGa and Cp2Mg, and start the supply of these materials to the furnace. The amount of circulating Cp 2 Mg was reviewed beforehand, and the positive hole concentration of the p-type cladding layer composed of Mg-doped GaN was adjusted to 8xl017 cnT3. Then, after about 6 minutes of growth, the supply of TMGa and Cp2Mg was stopped, and the growth of the Mg-doped GaN layer was stopped. Thus, a Mg-doped GaN layer with a film thickness of 0.15 // m is formed. After the growth of the Mg-doped G a N layer is completed, the energization of the induction heating heater is stopped, and the temperature of the substrate is lowered to room temperature after 20 minutes. During the temperature decrease from the growth temperature to 300t, the carrier gas in the reaction furnace is composed of only nitrogen, and NH3 flowing as 1% of the flow rate is -20- (18) (18) 200418207. Then, at the time when the substrate temperature was confirmed to be 300 ° C, the flow of NH3 was stopped so that the atmosphere gas became only nitrogen. After confirming that the temperature of the substrate has cooled down to room temperature, take out the wafer to the atmosphere. A dance wafer having an epitaxial layer structure for a semiconductor light-emitting device is manufactured by the above procedure. Here, the 'Mg-doped GaN layer system shows P-type even without annealing treatment for activating the P-type carrier'. Next, an epitaxial wafer having an epitaxial layer structure laminated on the aforementioned sapphire substrate is used to produce a light emitting diode of a semiconductor light emitting element. For the fabricated wafer, a P-electrode bonding pad having a structure in which titanium, aluminum, and gold are sequentially laminated from the surface side is formed on the surface of the Mg-doped GaN layer by a conventional light lithography method. And a light-transmitting P electrode composed of only Aι bonded to the P-side electrode is fabricated. Then, on the wafer, dry etching is performed to "expose the portion where the n-side electrode forming the high Si-doped GaN layer is exposed" at the exposed portion to produce η composed of four layers of Ni, Al, Ti, and Au. electrode. In the case where the P-side and η-side electrodes are formed in this way, the back surface of the sapphire substrate is “cleaved” to a thickness of 100 μm, and the wafer is cut into a mirror surface. Then, the wafer is cut into a square wafer with an angle of 3 50 // m. The wafer is bonded to the secondary fixing so that the electrode becomes the bottom. Starting from the electrode terminal on the secondary fixing, the wire is connected to the 1C lead frame and becomes a flip-chip type. Light emitting element. In addition, the light-emitting element is sealed with a resin, and the silicone resin has a hemispherical shape, and a cannonball-type LED light source shown in FIG. 4 is manufactured. When a forward current flows between the P-side and n-side electrodes of the LED lamp source manufactured as described above, the light emission wavelength of the current 20 mA is -21-(19) (19) 200418207 3 8 0 nm, and the output system is 1 4 · 0 m W, the forward voltage is 3.4 V. In addition, when the wafer surface at the time of energization to the LED wafer before resin sealing was observed with an optical microscope, a yellow light emission that was considered to be a GaN deep level light emission was observed on one side, but among them, : In Sapphire < 1-1 00 > Direction, there is a portion of linear strong luminous intensity 0 (comparative example) In this comparative example, the process is almost the same as that of Example 1, but the surface of the sapphire is still flat only Production of different LEDs. Using a sapphire substrate having a flat surface and an epitaxial wafer for LED grown by the same method as in Example 1, the same as in Example 1 was used to make a cannonball type LED lamp source. This LED light source has a current of 20mA, a wavelength of 380nm, and an output of 値 7.8mW. Confirmation: The LED lamp source of Example 1 has an output of 1 · 8 times that of the LED lamp source of the comparative example. (Embodiment 2) In this embodiment 2, a sapphire substrate with an A1N film having a thickness of 1 β π whose surface is a (0001) plane is used. The substrate was subjected to a high-temperature treatment at 1400 ° C in a reducing atmosphere, and a hexagonal hammer pit and an irregular asperity were formed on the A1N surface. The diameter of the pit is about 0.5 ~ 2 # m. The larger one has its bottom surface reaching the sapphire substrate, and it also becomes a hexagonal pedestal. 22- (20) (20) 200418207 Shaped pits or irregular pits The ratio of the area to the area of the flat portion is approximately 1: 0.2 to 1: 4. The angle of the hexagonal hammer inclined plane is the angle formed by the hexagonal hammer inclined plane and the substrate plane formed by the two types of A1N (11-22) plane and (1- 02) plane. The angle Θ is 5 8 °, 43 ° ° The sapphire substrate with the pit-forming A1N film prepared in this way was sufficiently cleaned and put into a MOCVD apparatus, and an epitaxial wafer for LED was produced in the same manner as in Example 1. Using the LED wafer and crystal wafer grown by the aforementioned method, the same as in Example 1 was used to make a cannonball type LED lamp source. This LED light source is energized at 20 mA, emits light at a wavelength of 380 nm, and outputs 値 12.6 mW. Compared with the comparative example, the output increased by 1.6 times. In addition, when the surface of the LED at the time of energization was observed with an optical microscope, a yellow light emission that was considered to be a light emission at a deep level of G aN was observed on one surface, but among them, a hexagonal shape was observed There is a bright portion of strong luminous intensity. (Embodiment 3) In Embodiment 3, a sapphire substrate having a surface of (0001) plane was used. In this substrate, parallel to the sapphire < 1-100 > direction to form a selective growth mask composed of a line-shaped SiN film with a line width of 2 μm and a space width of 2 // m. After being sufficiently cleaned, Invested in MOCVD equipment. Next, as the first process system, a gas containing trimethylaluminum (TMA1) vapor was circulated at a high temperature, and as the second process system, TMA1 and -23- (21) (21) 200418207 ammonia were circulated to grow into a triangular shape. Linear aluminum nitride. In addition, after the GaN layer was planarized, an LED structure was fabricated. Production of the sample including the aforementioned A1N layer was performed by the following procedure using the MocvD method. First, a sapphire substrate was introduced into a quartz-made reaction furnace provided in an RF coil of an induction heating heater. The sapphire substrate was placed in a spherical box replaced by nitrogen and placed on a carbon susceptor for heating. After the sample was introduced, nitrogen was circulated to clean the inside of the reaction furnace. After 10 minutes of nitrogen flow, the induction heating heater was started, and the substrate temperature was raised to 60 ° C. after 10 minutes. While the substrate temperature was still maintained at 60 ° C, nitrogen was flowed, and And let stand for 9 minutes. In the meantime, in a container (bubble) connected to a reaction furnace and placing trimethylgallium (TMGa) as a raw material, and a container (bubble) containing trimethylaluminum (TMA1) The argon carrier gas flows through the piping to start foaming. The temperature of each bubbler is adjusted to a certain degree by using a constant temperature bath to adjust the temperature. The vapors of TMG a and TMA1 generated by the foaming are all the way to Until the start of the growth process, the carrier gas flows to the piping of the detoxification device, and is discharged to the system through the detoxification device. Then, the valve of the nitrogen carrier gas is closed, and the supply of hydrogen to the reactor is started. After switching, the temperature of the substrate was raised to 115 ° C. After confirming that the temperature became stable at 115 ° C, the valve of the TMA1 piping was switched, and a gas containing TMA1 vapor was supplied to the reaction furnace. ”At this time ', it is considered that TM A1 and a small amount of nitrogen are simultaneously supplied to the substrate by the decomposition of the attachments attached to the wall surface of the reaction furnace or the top plate. -24- (22) (22) ) 200418207 After processing, switch the valve of TMA1 piping at the same time, stop supplying gas containing TMA1 vapor to the reaction furnace, and it will remain for 3 minutes. After annealing for 3 minutes, switch the valve of ammonia piping. In the furnace, the supply of ammonia gas is started. The ammonia is still circulating for 4 minutes. During this time, the flow rate of the flow regulator of the TMA1 pipe is adjusted. After 4 minutes, the valve of TMA1 is switched to start the supply of TMA1 to the furnace. The growth of A1N layer was started after about 3 hours. The experiment taken out at this stage had A1N with vertices on the sapphire surface represented in a line shape, and the growth section was triangular A1N. At this stage, The SiN mask is embedded by A1N. The slope is the (1-102) plane of A1N and the angle formed by the plane of the substrate is 43 °. Then, the valve of the piping of TMA1 is switched, and the raw material is closed to the reactor. Supply and stop growing. After the growth of the A1N layer is completed, the GaN layer is then grown. The growth surface of the GaN layer is flattened by 3 hours of growth, and the n-type layer, light-emitting layer, and Using p-type layer to make Jiajing wafers for LED ° Using epitaxial wafers for LEDs grown by the aforementioned method, the same as in Example 1 was used to make a cannonball type LED lamp source. The LED lamp source was 20mA, The emission wavelength is 380nm, and the output is 4.814.8mW. Compared with the comparative example, the output is 1.9 times. In addition, when the LED surface (sapphire surface) at the time of energization is observed by an optical microscope, on one surface, It is considered to be yellow emission that emits light between the deep levels of G a N, but among them, a line-shaped thick bright line portion of strong luminous intensity and a thin dark line portion of weak luminous intensity were observed -25- (23) 200418207. [Effect of the invention]

在使用本發明之發光元件時,光取出效率係增加最大 2倍左右,因此,LED之發光輸出、光電轉換效率係皆可 以提高最大2倍左右。這個係不僅是有助於省能源,並 且,抑制由於再吸收所造成之元件發熱,也促成LED之 穩定動作、壽命之提升。 【圖式簡單說明】 第1圖係層積光學模擬所使用之GaN層之藍寶石基 板並且呈線條狀地設置在基板表面具有傾斜角45 °側面的 凹凸構造之狀態之示意圖。 第2圖係顯示本發明之半導體發光元件構造之某一例 子之示意圖。When the light-emitting element of the present invention is used, the light extraction efficiency is increased by about two times at the maximum. Therefore, the light output of the LED and the photoelectric conversion efficiency can be increased by about two times at the maximum. This system not only helps to save energy, but also suppresses the heating of components due to reabsorption. It also promotes the stable operation of LEDs and the improvement of life. [Brief description of the figure] Figure 1 is a schematic view showing a state where a sapphire substrate having a GaN layer used for optical simulation is laminated and a concave-convex structure having a side surface inclined at an angle of 45 ° is linearly arranged on the substrate surface. Fig. 2 is a schematic diagram showing an example of the structure of a semiconductor light emitting element of the present invention.

第3圖係設置在本發明之基板等之凹凸構造之代表例 之示意圖。 第4圖係藉由樹脂而密封覆晶型發光元件之砲彈型 LED燈源之示意圖。 [圖號說明] Θ 對基板面之凹凸傾斜側之角度 1 基板 2 線條狀凹凸 -26- 200418207 (24) 3 半導體層 4 η型半導體層 5 發光層 6 Ρ型半導體層 3 1 樹脂 32 基板 33 - 半導體層 34 副固定 3 5 固定杯 -27-Fig. 3 is a schematic diagram of a representative example of an uneven structure provided on a substrate or the like of the present invention. FIG. 4 is a schematic diagram of a shell-type LED light source in which a flip-chip type light-emitting element is sealed by a resin. [Explanation of drawing number] Θ Angle to the inclined surface of the substrate surface unevenness 1 substrate 2 linear unevenness 26-200418207 (24) 3 semiconductor layer 4 n-type semiconductor layer 5 light-emitting layer 6 p-type semiconductor layer 3 1 resin 32 substrate 33 -Semiconductor layer 34 pairs fixed 3 5 fixed cup -27-

Claims (1)

200418207 Π) 拾、申請專利範圍 1·一種發光元件,其特徵爲:在具有基板、半導體層 和發光層之發光元件,基板和層積於此之半導體層之折射 $係不同’在層積該基板之半導體層之面,形成具有傾斜 彻1面之凹凸’使得該傾斜側面相對於基板面之角度e ,成 爲 30。< 0 < 60。。 2.—種發光元件,其特徵爲:在具有基板、半導體層 和發光層之發光元件,層積之半導體層間之折射率係不 同’在該半導體層之層積界面,形成具有傾斜側面之凹 凸。 3·如申請專利範圍第2項所記載之發光元件,其中, 凹凸之傾斜側面相對於基板之角度Θ係成爲3 0。< Θ < 60〇 〇 4 ·如申請專利範圍第χ至3項中任一項所記載之發光 兀件,其中’凹凸係線條狀V字型溝、線條狀側面傾斜 突起和側面傾斜坑洞之其中某一.種。 5 ·如申請專利範圍第χ至4項中任一項所記載之發光 兀件’其中’基板係藍寶石(Ai2〇3 ),半導體層係 AlxGayIn;i_x_yN ( 1、〇$ 1)。 6 · —種申請專利範圍第1項所記載之半導體元件之製 造方法’其特徵爲:在具有基板、半導體層和發光層之發 光元件之製造方法,藉由高溫處理、選擇性蝕刻和硏削之 其中某一種方法而在層積基板半導體層之側之表面,設置 凹凸。200418207 Π) Patent application scope 1. A light-emitting element, characterized in that in a light-emitting element having a substrate, a semiconductor layer and a light-emitting layer, the refractive index of the substrate and the semiconductor layer laminated thereon is different. The surface of the semiconductor layer of the substrate is formed with unevenness inclined on one surface so that the angle e of the inclined side surface with respect to the substrate surface becomes 30. < 0 < 60. . 2. A light-emitting element, characterized in that the refractive index between the laminated semiconductor layers is different in a light-emitting element having a substrate, a semiconductor layer, and a light-emitting layer. . 3. The light-emitting device according to item 2 of the scope of patent application, wherein the angle θ of the inclined side surface of the unevenness with respect to the substrate is 30. < Θ < 60〇〇4. The light-emitting element according to any one of items χ to 3 in the scope of the patent application, wherein the 'concave-convex line-shaped V-shaped groove, the line-shaped side inclined protrusion and the side inclined pit One of the species. 5. The light-emitting element described in any one of the items χ to 4 of the application scope, wherein the substrate is sapphire (Ai203), and the semiconductor layer is AlxGayIn; i_x_yN (1, 0 $ 1). 6 · A method of manufacturing a semiconductor device described in item 1 of the scope of patent application, which is characterized in that: in a method of manufacturing a light-emitting device having a substrate, a semiconductor layer, and a light-emitting layer, high-temperature processing, selective etching, and milling are used. In one method, unevenness is provided on the surface on the side of the semiconductor layer of the laminated substrate. (2) (2)200418207 7 · —種申請專利範圍第i項所記載之發光元件之製造 ’其特徵爲:在具有基板、半導體層和發光層之發光 之製造方法,藉由在基板之表面,形成選擇成長用罩 胃’在該基板上,設置側面呈傾斜之半導體突起,而在半 導體層之層積界面,形成具有傾斜側面之凹凸。 8 · —種申請專利範圍第2項所記載之半導體元件之製 ^方法,其特徵爲:在具有基板、半導體層和發光層之發 光元件之製造方法,藉由利用高溫處理、選擇性蝕刻和硏 肖U 2其中某一種方法而.在半導體層之表面,設置具有傾斜 側面之凹凸,以便在半導體層之層積界面,形成具有傾斜 側面之凹凸。 9 · 一種申請專利範圍第2項所記載之發光元件之製造 方法’其特徵爲:在具有基板、半導體層和發光層之發光 元件之製造方法,於半導體層之表面,形成選擇成長用罩 幕’在該半導體層上,設置側面呈傾斜之半導體突起。 1〇·—種LED燈源,其特徵爲:使用申請專利範圍第 1至5項中任一項所記載之發光元件。(2) (2) 200418207 7 · —Production of a light-emitting element described in item i of the patent application 'characterized in that the method includes a substrate, a semiconductor layer, and a light-emitting layer manufacturing method, and A cover stomach for selective growth is formed. On the substrate, a semiconductor protrusion with an inclined side surface is provided, and an unevenness with an inclined side surface is formed at a lamination interface of the semiconductor layer. 8-A method for manufacturing a semiconductor device according to item 2 of the scope of patent application, characterized in that: in a method for manufacturing a light-emitting device having a substrate, a semiconductor layer, and a light-emitting layer, high-temperature processing, selective etching, and According to one of the methods of U 2, the surface of the semiconductor layer is provided with an uneven surface having an inclined side surface so as to form an uneven surface having an inclined side surface at the laminated interface of the semiconductor layer. 9 · A method of manufacturing a light-emitting element described in item 2 of the scope of patent application, characterized in that a method for manufacturing a light-emitting element having a substrate, a semiconductor layer, and a light-emitting layer is formed on the surface of the semiconductor layer with a mask for selective growth 'Semiconductor protrusions are provided on the semiconductor layer with inclined sides. 1 0. An LED light source characterized by using the light-emitting element described in any one of claims 1 to 5 of the scope of patent application.
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