KR100734049B1 - Manufacturing method of cavity typed printed circuit board - Google Patents

Abstract

The disclosed method of manufacturing a cavity-type printed circuit board includes preparing an insulating substrate; Coating copper foil on upper and lower surfaces of the insulating substrate; Forming a first through hole in the insulating substrate; Performing primary copper plating on the upper and lower surfaces of the insulating substrate and the inner circumferential surface of the through hole to electrically connect the upper and lower surfaces of the insulating substrate; Patterning upper and lower surfaces of the insulating substrate to form an inner circuit on the upper and lower surfaces of the insulating substrate; Preparing a first prepreg layer having a cavity processed so that a position corresponding to a portion where a semiconductor chip is to be mounted later is penetrated through the circuit formed on a lower surface of the insulating substrate; Preparing a copper foil laminated plate formed by laminating an insulating layer and copper foil, and cavity processing so that the copper foil laminated plate is formed through in advance so as to correspond to an open portion of the first prepreg layer on which a semiconductor chip will be mounted later; Inserting and laminating the first prepreg layer having a cavity between the bottom surface of the insulating substrate having inner layer circuits formed on the top and bottom surfaces of the insulating substrate and the cavity-treated copper foil laminate; Inserting and stacking a second prepreg layer between the upper surface and the lower surface of the insulating substrate having inner layer circuits formed on the upper and lower surfaces of the insulating substrate and the copper foil; A second prepreg layer laminated on the insulating substrate, an upper side of the insulating substrate and the copper foil, and a first prepreg layer laminated on the lower side of the insulating substrate and a second through hole vertically penetrating the entire copper foil laminate. Forming; Applying a copper plating resist so that a position corresponding to a portion of the circuit formed on the lower surface of the insulating substrate to correspond to the portion where the semiconductor chip is to be mounted later is not the second copper plating; Performing secondary copper plating on the inner circumferential surface of the second through hole, the lower surface of the copper foil laminated plate, and the upper surface of the copper foil formed on the upper surface of the second prepreg layer; And after performing the second copper plating, forming a lower layer circuit by patterning the copper foil laminate and the copper plated portion thereunder, and patterning the copper foil formed on the upper surface of the second prepreg layer and the copper plated portion thereof. Forming an upper layer circuit to form an outer layer circuit; And peeling the copper plating resist.

Description

Manufacturing method of cavity type printed circuit board

1 is a flow chart showing a manufacturing method of a cavity-type printed circuit board according to an aspect of the present invention;

2A is a cross-sectional view of a substrate on which an inner layer circuit is formed in the step of FIG. 1;

FIG. 2B is a cross-sectional view of a substrate coated with PSR (Photo Solder Resist) on an inner layer circuit in the step of FIG. 1;

2C is a cross-sectional view of the first prepreg layer subjected to cavity processing in the step of FIG. 1,

FIG. 2D is a cross-sectional view of a substrate in which a second prepreg layer and a copper foil are stacked on an upper portion of a substrate on which an inner layer circuit is formed in FIG. 1, and a copper foil laminate and a first prepreg layer having a cavity process are stacked thereon;

FIG. 2E is a cross-sectional view in which PSR is applied to the outer circuit in the step of FIG. 1;

FIG. 2F is a cross-sectional view of a printed circuit board (PCB) having a cavity processed with respect to the insulating layer in the step of FIG. 1;

3 is a flow chart showing a manufacturing method of a cavity-type printed circuit board according to another aspect of the present invention;

4A is a cross-sectional view of a substrate on which an inner layer circuit is formed in the step of FIG.

4B is a cross-sectional view of the substrate coated with PSR for the inner circuit in the step of FIG. 3;

4C is a cross-sectional view of the first prepreg layer subjected to cavity processing in the step of FIG. 3;

Figure 4d is a cross-sectional view of the copper foil laminated plate subjected to the cavity processing in the step of Figure 3,

4E is a cross-sectional view of a substrate in which a second prepreg layer and a copper foil are laminated on an upper portion of a substrate on which an inner layer circuit is formed in FIG. 3, and a first prepreg layer and a copper foil laminate plate on which a cavity is processed are laminated;

4F is a cross-sectional view of a PCB that has completed the process shown in FIG. 3.

<Explanation of symbols for the main parts of the drawings>

Printed circuit board 10 ... Insulated board

20 ... 1 through hole 30 ... copper foil

35 first copper plating 38 inner layer circuit

40 ... inner layer PSR 50 ... first prepreg layer

150,250 ... insulation layer 160,200,260 ... copper

170,270 copper foil laminated plate 175 2nd through hole

180 ... 2nd Copper Plating 190 ... 2nd Prepreg Layer

210.Outer layer PSR

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a cavity-type printed circuit board. More particularly, the present invention relates to a method of manufacturing a cavity-type printed circuit board. The present invention relates to a method of manufacturing a cavity-type printed circuit board that can reduce the thickness of the substrate and reduce the mounting area thereof.

Generally, they are classified into single-sided boards, double-sided boards, and multilayer boards according to the number of faces of the wiring circuit. Single-sided printed circuit boards are mainly used in products with relatively complicated circuit configurations such as radios, telephones, and simple measuring instruments. In addition, double-sided printed circuit boards are mainly used in relatively complex products such as color TV, VTR, facsimile. In addition, multilayer printed circuit boards are employed in high-precision devices such as 32-bit or more computers, electronic switchboards, and high-performance communication devices.

However, existing single-sided boards, double-sided boards and multi-layered boards are generally employed to drill through holes and insert components therein to mount components. Such conventional printed circuit boards require too many through holes and have a large mounting area.

In order to solve such a problem, a method of making a printed circuit board through the surface mounting method has been introduced, but the surface mounting method has not solved the problem of increasing the mounting area.

The present invention was created in order to solve the above problems, and it is possible to reduce the board mounting area even when mounting a component, that is, a semiconductor chip on the printed circuit board, and to improve the board thickness of the entire printed circuit board. An object of the present invention is to provide a method of manufacturing a cavity-type printed circuit board.

Other objects and advantages of the invention will be described below and will be appreciated by the embodiments of the invention. Further objects and advantages of the invention can be realized by means and combinations indicated in the claims.

Method of manufacturing a cavity-type printed circuit board of the present invention for achieving the above object comprises the steps of preparing an insulating substrate; Coating copper foil on upper and lower surfaces of the insulating substrate; Forming a first through hole in the insulating substrate; Performing primary copper plating on the upper and lower surfaces of the insulating substrate and the inner circumferential surface of the through hole to electrically connect the upper and lower surfaces of the insulating substrate; Patterning upper and lower surfaces of the insulating substrate to form an inner circuit on the upper and lower surfaces of the insulating substrate; Preparing a first prepreg layer having a cavity processed so that a position corresponding to a portion where a semiconductor chip is to be mounted later is penetrated through the circuit formed on a lower surface of the insulating substrate; Preparing a copper foil laminated plate formed by laminating an insulating layer and copper foil, and cavity processing so that the copper foil laminated plate is formed through in advance so as to correspond to an open portion of the first prepreg layer on which a semiconductor chip will be mounted later; Inserting and laminating the first prepreg layer having a cavity between the bottom surface of the insulating substrate having inner layer circuits formed on the top and bottom surfaces of the insulating substrate and the cavity-treated copper foil laminate; Inserting and stacking a second prepreg layer between the upper surface and the lower surface of the insulating substrate having inner layer circuits formed on the upper and lower surfaces of the insulating substrate and the copper foil; A second prepreg layer laminated on the insulating substrate, an upper side of the insulating substrate and the copper foil, and a first prepreg layer laminated on the lower side of the insulating substrate and a second through hole vertically penetrating the entire copper foil laminate. Forming; Applying a copper plating resist so that a position corresponding to a portion of the circuit formed on the lower surface of the insulating substrate to correspond to the portion where the semiconductor chip is to be mounted later is not the second copper plating; Performing secondary copper plating on the inner circumferential surface of the second through hole, the lower surface of the copper foil laminated plate, and the upper surface of the copper foil formed on the upper surface of the second prepreg layer; And after performing the second copper plating, forming a lower layer circuit by patterning the copper foil laminate and the copper plated portion thereunder, and patterning the copper foil formed on the upper surface of the second prepreg layer and the copper plated portion thereof. Forming an upper layer circuit to form an outer layer circuit; And peeling the copper plating resist.

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The method may further include applying an inner layer PSR between the lower surface of the insulating substrate on which the inner layer circuit is formed and the first prepreg layer before the first prepreg layer is stacked.

In addition, after the forming of the outer layer circuit, PSR coating the outer layer circuit may be further included.

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Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Prior to this, terms or words used in the present specification and claims should not be construed as being limited to the common or dictionary meanings, and the inventors should properly explain the concept of terms in order to best explain their own invention. Based on the principle that can be defined, it should be interpreted as meaning and concept corresponding to the technical idea of the present invention.

Therefore, the embodiments described in the specification and the drawings shown in the drawings are only one of the most preferred embodiments of the present invention and do not represent all of the technical idea of the present invention, various modifications that can be replaced at the time of the present application It should be understood that there may be equivalents and variations.

1 is a flowchart illustrating a method of manufacturing a cavity-type printed circuit board according to an exemplary embodiment of the present invention. FIG. 2A is a cross-sectional view of a substrate on which an inner layer circuit is formed in the step of FIG. 1, and FIG. 2B is an inner layer circuit in the step of FIG. 1. 2C is a cross-sectional view of the first prepreg layer subjected to cavity processing in the step of FIG. 1, and FIG. 2D is a second portion of the substrate on which the inner layer circuit is formed in the step of FIG. 1. A prepreg layer and a copper foil are laminated, and a lower portion thereof is a sectional view of a substrate on which a copper foil laminate and a first prepreg layer subjected to cavity processing are laminated, and FIG. 2E is a sectional view in which PSR is applied to an outer layer circuit in the step of FIG. 2F is a cross-sectional view of a PCB having a cavity processed with respect to the insulating layer in the step of FIG. 1.

Referring to FIG. 2A, first, an insulating substrate 10 is prepared (S10). Here, as the material that can be used as the insulating substrate 10, Teflon, ceramic, epoxy, and the like can be mentioned. Next, the copper foil 30 is coated on the upper and lower surfaces of the insulating substrate (s20), and the first through hole 20 is formed by CNC (Computer Numerical Control) processing in the vertical direction of the insulating substrate coated with copper foil ( s30). The through hole 20 may be drilled using a drill or a laser.

Next, the first copper plating 35 is performed on the upper and lower surfaces of the insulating substrate 10 and the inner circumferential surface of the through hole 20 so as to electrically connect the upper and lower surfaces of the insulating substrate 10. (s40). The non-conductive ink filling filling the through hole 20 with respect to the through hole 20 may be selectively performed.

Next, after the primary copper plating 35 is formed, desired portions of the copper foil 30 and the primary copper film layer 35 are patterned on the upper and lower surfaces of the insulating substrate to form a desired circuit (s50). ). Thus, the circuits formed on the upper and lower surfaces of the insulating substrate 10 are referred to as the inner layer circuit 38.

Next, referring to FIG. 2B, before the first prepreg layer 50 (see FIG. 2C) is stacked, the lower surface of the insulating substrate 10 on which the inner layer circuit 38 is formed and the insulating substrate 10 thereafter. The method may further include applying the inner layer PSR 40 between the first prepreg layer 50 to be stacked on the bottom surface (S55).

Next, referring to FIG. 2C, a first prepreg layer 50 having a cavity processed so that a position corresponding to a portion of the inner layer circuit 38 formed on the bottom surface of the insulating substrate to be subsequently mounted will be penetrated. To prepare a step may be (s60). The prepreg layer is in a semi-cured state. Thereafter, a predetermined pressure and heat are generally applied for curing. It is apparent to those skilled in the art that the step s60 and the step s55 described above may be reversed.

Next, as shown in FIG. 2D, the insulating layer 150 and the copper foil 160 are formed on the lower surface of the insulating substrate 10 on which the inner layer circuit 38 is formed through the first prepreg layer 50. The laminated copper foil laminated plate 170 is laminated (s70).

Similarly, as shown in FIG. 2D, the copper foil 200 is laminated on the upper surface of the insulating substrate 10 on which the inner layer circuit 38 is formed, via the second prepreg layer 190 (S80). Here, it is apparent to those skilled in the art that the step s70 and the step s80 described above may be interchanged with each other, and the steps s70 and s80 may be performed simultaneously.

Next, as shown in FIG. 2E, the insulating substrate 10, the second prepreg layer 190 and the copper foil 200, and the lower side of the insulating substrate 10 stacked on the insulating substrate 10. A second through hole 175 vertically penetrating the entire first prepreg layer 50 and the copper foil laminated plate 170 is formed (S90). Similar to the first through hole 20, it may be formed through CNC machining, or other methods may be used.

Next, a second copper plating process may be performed on the inner circumferential surface of the second through hole 175, the lower surface of the copper foil laminate plate 170, and the upper surface of the copper foil 200 formed on the upper surface of the second prepreg layer 190. 180) (s100).

Next, after performing the second copper plating 180, the copper foil laminated plate 170 and the copper plated portion 180 are patterned to form a lower circuit by forming a desired circuit, and the second prepreg is formed. The upper layer circuit is formed by patterning the copper foil 200 formed on the upper surface of the layer 190 and the copper plated portion 180 thereon to form an outer layer circuit formed of the upper and lower layer circuits (S110).

Next, the method may further include applying an outer layer PSR 210 to the outer layer circuit (S115).

Finally, as shown in FIG. 2F, the copper foil laminate plate formed under the first prepreg layer 50 so as to correspond to an open portion of the first prepreg layer 50 on which the semiconductor chip is to be mounted. The insulating layer 150 of the 170 is cavity-processed by a router to integrally form an opening of the first prepreg layer 50 to form a cavity in which a semiconductor chip is to be mounted later (S120).

In the above process, in some cases, a conformal process and a laser process may be performed between the steps s90 and s100 to form a desired circuit pattern. The conformal process removes the copper foil that cannot be removed by the laser process, and then removes the insulating layer, that is, the second prepreg layer 190, by the laser process. This can be easily seen with reference to FIG. 2E.

3 is a flowchart illustrating a method of manufacturing a cavity-type printed circuit board according to another aspect of the present invention, FIG. 4A is a cross-sectional view of a substrate on which an inner layer circuit is formed in the step of FIG. 3, and FIG. 4B is a step in FIG. 3. Fig. 4C is a cross-sectional view of the first prepreg layer subjected to cavity processing in the step of Fig. 3, and Fig. 4D is a cross-sectional view of the copper foil laminated plate subjected to cavity processing in the step of Fig. 3. 4E is a cross-sectional view of a substrate in which a second prepreg layer and a copper foil are laminated on an upper portion of a substrate on which an inner layer circuit is formed in the step of FIG. 3, and a first prepreg layer and a copper foil laminate plate on which a cavity is processed are laminated. 4F is a cross-sectional view of a PCB that completes the process illustrated in the step of FIG. 3.

Referring to FIG. 4A, first, an insulating substrate 10 is prepared (S10). Next, the copper foil 30 is coated on the upper and lower surfaces of the insulating substrate (s20), and then the first through hole 20 is formed by CNC machining in the vertical direction of the insulating substrate coated with copper foil (s30). The through hole 20 may be drilled using a drill or a laser.

Next, primary copper plating 35 is performed on the upper and lower surfaces of the insulating substrate and the inner circumferential surface of the through hole 20 so as to electrically connect the upper and lower surfaces of the insulating substrate (S40). The non-conductive ink filling filling the through hole 20 with respect to the through hole 20 may be selectively performed.

Next, after the primary copper plating 35 is formed, a desired circuit is formed by patterning predetermined portions of the copper foil 30 and the primary copper plating layer 35 on the upper and lower surfaces of the insulating substrate (s50). ). Thus, the circuits formed on the upper and lower surfaces of the insulating substrate 10 are referred to as the inner layer circuit 38.

Next, referring to FIG. 4B, before the first prepreg layer 50 is laminated, the lower surface of the insulating substrate 10 on which the inner layer circuit 38 is formed is laminated on the lower surface of the insulating substrate 10. The method may further include applying the inner layer PSR 40 between the first prepreg layer 50 to be performed (S55).

Next, referring to FIG. 4C, a first prepreg layer 50 having a cavity processed so that a position corresponding to a portion of the inner circuit 38 formed on the bottom surface of the insulating substrate to be subsequently mounted will be penetrated. To prepare a step may be (s60). The prepreg layer is in a semi-cured state. Thereafter, a predetermined pressure and heat are generally applied for curing.

Next, as shown in FIG. 4D, the copper foil laminate 270 made of the insulating layer 250 and the copper foil 260 so as to correspond to an open portion of the first prepreg layer 50 where the semiconductor chip will be mounted later. The through-formed cavity is subjected to cavity processing (s175).

It will be apparent to those skilled in the art that the steps s60 and s175 and the steps s55 described above may be reversed.

Next, as shown in FIG. 4E, the step S175 is performed on the bottom surface of the insulating substrate 10 on which the inner layer circuit 38 is formed, through the first prepreg layer 50 subjected to the cavity processing in step S60. In step (s70) to the laminated copper foil laminated plate 270 is formed by laminating the insulation layer 250 and the copper foil 260 is subjected to the cavity process.

Similarly, as shown in FIG. 4E, the copper foil 200 is laminated on the upper surface of the insulating substrate 10 on which the inner layer circuit 38 is formed, via the second prepreg layer 190 (S80). Here, it is apparent to those skilled in the art that the step s70 and the step s80 described above may be interchanged with each other, and the steps s70 and s80 may be performed simultaneously.

Next, as shown in FIG. 4F, the second prepreg layer 190, the copper foil 200, and the lower side of the insulating substrate 10 stacked on the insulating substrate 10 and the insulating substrate 10. A second through hole 175 vertically penetrating the entire first prepreg layer 50 and the copper foil laminated plate 270 is formed (S90). Similar to the first through hole 20, it may be formed through CNC machining, or other methods may be used.

Next, before performing the second copper plating, which is a step S100, to be performed later, a copper plating resist is applied to prevent copper plating from the portion where the semiconductor chip is to be mounted, that is, the portion where the cavity is to be formed (S190).

Next, a second copper plating process may be performed on an inner circumferential surface of the second through hole 175, a lower surface of the copper foil laminate plate 270, and an upper surface of the copper foil 200 formed on the upper surface of the second prepreg layer 190. 180) (s100). Here, copper plating is not applied to the portion to which the copper plating resist is applied in step S190, that is, the cavity portion to which the semiconductor chip is to be mounted later.

Next, after performing the second copper plating 180, the copper foil laminate 270 and the copper plated portion 180 are patterned so that a desired circuit is formed to form a lower layer circuit, and the second prepreg. The upper layer circuit is formed by patterning the copper foil 200 formed on the upper surface of the layer 190 and the copper plated portion 180 thereon to form an outer layer circuit formed of the upper and lower layer circuits (S110).

Next, a process of peeling the copper plating resist applied in step S190 is performed. The outer layer circuit may further include applying an outer layer PSR 210 (S115).

The printed circuit board that has undergone the above process is to complete the printed circuit board as shown in FIG. 4F by undergoing a final cavity process.

In the above process, in some cases, a conformal process and a laser process may be performed to form a desired circuit pattern between steps s90 and s190. The conformal process removes the copper foil that cannot be removed by the laser process, and then removes the insulating layer, that is, the second prepreg layer 190, by the laser process. This can be easily seen with reference to FIG. 4F.

1 and 2A to 2F, the insulating layer 150 of the copper foil laminate 170 is cavity-processed at the last step s120 in the above embodiment, but in the present embodiment, copper foil is used. There is a difference in that the laminate 270 is previously cavity processed in step s175.

As described above, the method of manufacturing a cavity-type printed circuit board of the present invention provides the following effects.

When mounting components or semiconductor chips into the cavity of a printed circuit board, not only can the board mounting area be reduced, but also the overall board thickness can be reduced. Incidentally, there is an effect that miniaturization of the devices using the same.

As mentioned above, although this invention was demonstrated by the limited embodiment and drawing, this invention is not limited to this and it is described by the person of ordinary skill in the art to this invention, and below. Various modifications and variations are possible without departing from the scope of the appended claims.

Claims (5)

delete Preparing an insulating substrate; Coating copper foil on upper and lower surfaces of the insulating substrate; Forming a first through hole in the insulating substrate; Performing primary copper plating on the upper and lower surfaces of the insulating substrate and the inner circumferential surface of the through hole to electrically connect the upper and lower surfaces of the insulating substrate; Patterning upper and lower surfaces of the insulating substrate to form an inner circuit on the upper and lower surfaces of the insulating substrate; Preparing a first prepreg layer having a cavity processed so that a position corresponding to a portion where a semiconductor chip is to be mounted later is penetrated through the circuit formed on a lower surface of the insulating substrate; Preparing a copper foil laminated plate formed by laminating an insulating layer and copper foil, and cavity processing so that the copper foil laminated plate is formed through in advance so as to correspond to an open portion of the first prepreg layer on which a semiconductor chip will be mounted later; Inserting and laminating the first prepreg layer having a cavity between the bottom surface of the insulating substrate having inner layer circuits formed on the top and bottom surfaces of the insulating substrate and the cavity-treated copper foil laminate; Inserting and stacking a second prepreg layer between the upper surface and the lower surface of the insulating substrate having inner layer circuits formed on the upper and lower surfaces of the insulating substrate and the copper foil; A second prepreg layer laminated on the insulating substrate, an upper side of the insulating substrate and the copper foil, and a first prepreg layer laminated on the lower side of the insulating substrate and a second through hole vertically penetrating the entire copper foil laminate. Forming; Applying a copper plating resist so that a position corresponding to a portion of the circuit formed on the lower surface of the insulating substrate to correspond to the portion where the semiconductor chip is to be mounted later is not the second copper plating; Performing secondary copper plating on the inner circumferential surface of the second through hole, the lower surface of the copper foil laminated plate, and the upper surface of the copper foil formed on the upper surface of the second prepreg layer; And After performing the second copper plating, a lower layer circuit is formed by patterning the copper foil laminate and a copper plated portion thereunder, and patterning the copper foil formed on the upper surface of the second prepreg layer and the copper plated portion above the upper layer. Forming a circuit to form an outer layer circuit; And Method of manufacturing a cavity-type printed circuit board comprising the step of peeling the copper plating resist. The method of claim 2, Before the first prepreg layer is laminated, further comprising the step of applying an inner layer PSR between the lower surface of the insulating substrate on which the inner layer circuit is formed and the first prepreg layer of the cavity type printed circuit board Manufacturing method. The method of claim 2, After the forming of the outer layer circuit, the method of manufacturing a cavity-type printed circuit board further comprising the step of applying the outer layer circuit PSR. delete

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