JP2004200392A - Manufacturing method of multilayer printed circuit board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the manufacturing method of a multilayer printed circuit board capable of obtaining a multilayer printed circuit board, capable of easily forming a recess for mounting a component, and capable of utilizing a conventional manufacturing facility while retaining high working efficiency and stabilized quality. <P>SOLUTION: The manufacturing method of the multilayer printed circuit board comprises a process for forming a multilayer board 14 by laminating a base substrate 1, an insulating substrate 10 having an opening 11 and a circuit substrate 13 having a conductor circuit 5, a process for forming a conductive via-hole 3 on one side of the multilayer board 14 as well as a through hole 15 on a place except a hollow section to apply through hole plating 151, a process for forming an outer layer conductor circuit 54 on the surface of the multilayer board 14, a process for forming a recess 17 by cutting one side of the multilayer board 14, and a process for applying plating on the outer layer conductor circuit 54. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a multilayer printed wiring board having a concave portion for mounting components, which facilitates mounting of electronic components such as a semiconductor chip, a resistor, a capacitor, a coil, and a sensor.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, there has been known a multilayer printed wiring board in which a plurality of printed wiring boards are laminated to form a multilayer wiring board, a recess is formed by counterboring, and an electronic component is mounted in the recess.
However, since the conventional multilayer printed wiring board forms a recess by counterboring after laminating a plurality of printed wiring boards, there is a possibility that the circuit on which the component is mounted is deformed or damaged. However, there is a problem that it is difficult to perform counterboring with high accuracy.
In order to solve this problem, a method has been proposed in which a recess is formed by omitting the counterbore processing. For example, Japanese Patent Application Laid-Open No. 9-321439 discloses a method in which a plurality of printed wiring boards having openings are laminated. Are disclosed.
However, even in this method, there is a problem that it is difficult to perform processing without damaging the circuit because the printed wiring board on which the circuit is formed is cut to form the opening.
[Title]
Japanese Patent Application Laid-Open No. 9-321439
[Problems to be solved by the invention]
The present invention provides a multilayer printed circuit that can easily form a component mounting concave portion, can use a conventional manufacturing facility, has a high working efficiency, and can obtain a multilayer printed wiring board of stable quality. An object of the present invention is to provide a method for manufacturing a wiring board.
[0004]
[Means for Solving the Problems]
The present invention, in order to solve the above problems, in the invention of claim 1,
A. A basic substrate having a conductor circuit on one outer layer and a unit substrate having a conductive material on the other layer of two or more layers,
An insulating substrate having an opening and having an adhesive layer on both sides,
A step of laminating a circuit board having conductor circuits on both sides to form a multilayer board,
B. Forming a conductive via hole on one side of the multilayer board, forming a through hole in a portion other than the hollow portion, and plating the through hole;
C. Forming an outer conductor circuit on the surface of the multilayer board;
D. Cutting one side of the multilayer board, forming a recess,
E. FIG. Plating the outer conductor circuit.
3. The method according to claim 2, wherein the substrate is a glass cloth thermosetting resin or a glass nonwoven thermosetting resin.
4. The method according to claim 3, wherein the plating applied to the outer conductor circuit is nickel plating and gold plating.
[0005]
In step A of claim 1, a double-sided board, a multilayer board, and an interstitial via-hole board are generally used as a basic board having two or more unit boards each having a conductor circuit on one outer layer and a conductive material on the other. It is used.
Further, as the substrate, a glass cloth thermosetting resin or a glass nonwoven cloth thermosetting resin can be used, and specifically, a glass cloth epoxy resin, a glass nonwoven cloth epoxy resin, glass There are cloth bismaleimide triazine resin and aramid non-woven epoxy resin.
[0006]
An insulating substrate having an opening and having an adhesive layer on both sides uses an epoxy-based resin, a polyimide-based resin, a bismaleimide triazine-based resin, and an acrylate-based resin as an adhesive layer material. It is manufactured by applying an adhesive or laminating an adhesive sheet made of an adhesive layer material on both sides of the insulating substrate, solidifying it by heating, and forming an opening by press working or router working.
Since the insulating substrate having the adhesive layer does not have a conductor circuit, there is no risk of damaging the conductor circuit when forming an opening by press working or router working, and the work can be performed efficiently.
[0007]
As a circuit board having a conductor circuit in an outer layer, a double-sided board or a multilayer board having a commonly used conductor circuit formed thereon is used.
As a result, (1) an insulating substrate having a conductor circuit in one outer layer and two or more unit substrates having a conductive material stacked on the other, and (2) an insulating member having an opening and having an adhesive layer on both sides. The substrate and (3) a circuit substrate having a conductor circuit in an outer layer are laminated, and heated and pressed by a vacuum press to form a multilayer board.
Thus, the opening of the insulating substrate forms a hollow portion between the base substrate and the circuit board.
[0008]
Next, in the process B, a via hole is formed by drilling by laser or drilling on the conductive material side of the multilayer board, and then a through hole is formed by drilling a portion other than the hollow portion, and panel plating is performed. A conductive via hole is formed by plating by a method, and plating is performed on the through hole.
[0009]
In step C, a dry film is laminated as an etching resist on both sides of the multilayer board, and is exposed, developed and etched to form an outer conductor circuit.
At this time, by removing the outer conductor of the portion where the concave portion is formed by the router processing in the next step D, it is possible to prevent the generation of burrs at the time of the router processing, and at the same time, to release the air when laminating by heating and pressing The effect can be expected.
[0010]
Thereafter, in step D, a cut is made along the hollow portion from the outer layer portion of the multilayer board to form an opening by router processing, thereby forming a concave portion.
Since the hollow portion is formed in the multilayer board by lamination in advance, high processing accuracy is not required in the vertical direction. Therefore, by employing the router processing, the processing can be performed very easily and efficiently. Although high processing accuracy can be obtained, it does not require time-consuming counterbore processing.
[0011]
Finally, in step E, the outer conductor circuit is subjected to nickel plating and gold plating as finish plating, so that the connection reliability with the semiconductor chip can be ensured at the time of component mounting.
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
A method of manufacturing a multilayer printed wiring board, comprising the steps of: forming a multilayer board; forming conductive via holes and through holes in the multilayer board; plating the through holes; and forming an outer conductor circuit on the surface of the multilayer board. , A step of cutting one side of the multilayer board to form a recess, and a step of plating the outer conductor circuit.
[0013]
【Example】
An embodiment of the present invention will be described with reference to the drawings.
In FIG. 2, a first insulating material 21 provided with a conductive via hole 3, a first conductive circuit 51, and a third conductive circuit 53, and a second insulating material 22 provided with a conductive via hole 4 and a second conductive circuit 52 are provided. And the third insulating material 23 provided with the third conductive material 63 on the outer surface not in contact with another insulating material, thereby forming the basic substrate 1.
As the base substrate 1, a double-sided board, a multilayer board, an interstitial via-hole board, or the like is used. In this embodiment, an interstitial via-hole board composed of four layers (first to third insulating materials and conductive materials) is used. Used.
[0014]
The manufacturing process of the basic substrate 1 composed of the interstitial via hole plate will be described with reference to FIGS.
FIG. 8A shows a double-sided copper-clad laminate 7 formed by laminating a conductive material 6 on both sides of an insulating plate 2. As a material of the insulating plate 2, a glass cloth epoxy resin, a glass nonwoven epoxy resin, glass A cloth bismaleimide triazine resin and an aramid non-woven fabric epoxy resin are used.
The thickness of the insulating plate 2 is set to 0.05 to 0.20 mm.
[0015]
Copper is generally used as the conductive material 6 and has a thickness of 12 to 35 μm.
In this embodiment, a copper foil having a thickness of 12 μm is used for the conductive material 6 and a double-sided copper-clad glass cloth epoxy resin plate having a thickness of 0.15 mm is used as the insulating plate 2.
[0016]
FIG. 8B shows a double-sided copper-clad laminate 7 in which a through-hole 8 is formed by drilling a hole with a drill having a drill diameter of 0.15 to 0.30 mm.
Next, as shown in FIG. 8C, the through via hole 8 is subjected to panel plating to form a conductive via hole 3, and the conductive via hole 3 is filled with an epoxy resin 9 containing silica particles. Then, a dry film of an etching resist is laminated, exposed, developed, and etched to remove the conductive material 6 on one side to form a first conductive circuit 51 and a first conductive circuit 61 having a first conductive material 61 on the other side. An insulating material 21 is formed.
[0017]
In this case, although it is possible to form a conductor circuit on both sides, the insulating plates are laminated in the next step, and the lamination is performed so as not to be affected by the unevenness formed by the conductor circuit at the time of lamination. The conductor circuit is formed only on the other side, leaving the first conductive material on the side outside the laminate after lamination.
[0018]
In FIG. 9A, a second insulating material 22 in which a second conductive material 62 is stacked on one side is stacked on the side of the first insulating material 21 opposite to the first conductive material 61.
The second insulating material 22 has a side on which the conductive material is not laminated as a bonding surface with the first insulating material 21.
A copper foil having a thickness of 12 μm is laminated as the second conductive material 62, and a glass cloth epoxy resin prepreg having a thickness of 0.06 mm is laminated as the second insulating material 22. The heating temperature is 170 to 200 ° C., the pressure is 1 to 3 MPa, and the time is 90 to 90 μm. Laminate by heating and pressing for 150 minutes.
[0019]
Next, in the second insulating material 22, the second conductive material 62 at the position where the via hole is to be formed is removed, and the hole is formed by laser processing using a carbon dioxide laser or the like to form a via hole having a diameter of 0.07 to 0.15 mm. After desmearing, panel plating is performed, and after laminating a dry film of an etching resist, exposure, development, and etching are performed to form the conductive via hole 4 and the second conductor circuit 52 as shown in FIG. I do.
[0020]
Further, in the same manner as the laminating method shown in FIGS. 9A and 9B, the third insulating material 23 and the third conductive material 63 are formed outside the third insulating material 23 so as to cover the conductive via hole 4 and the second conductive circuit 52. (See FIG. 9C).
In FIG. 9C, a dry film is laminated, a third conductive circuit 53 is formed only on the side of the conductive via hole 3 (outside the first insulating material 21), and a solder resist film is formed on the conductive circuit if necessary. (Not shown) are formed to form an interstitial via hole plate (basic substrate 1) composed of four layers as shown in FIG.
[0021]
In FIG. 3, the insulating substrate 10 has an opening 11, and an adhesive layer 12 made of an adhesive is provided on both sides of the insulating layer 24.
As a material of the insulating layer 24, a hardened glass cloth epoxy resin, a glass nonwoven cloth epoxy resin, a glass cloth bismaleimide triazine resin, or an aramid nonwoven cloth epoxy resin having a thickness of 0.05 to 0.4 mm can be used.
[0022]
As a material of the adhesive layer 12, an epoxy resin, a polyimide resin, a bismaleimide triazine resin, an acrylate resin, or the like can be used.
As a method of forming the adhesive layer 12, there is a method of applying the adhesive layer to the insulating layer 24 by a roller coat or the like, or a method of laminating as an adhesive sheet and using it in a semi-cured state by heating.
Further, the thickness of the adhesive layer 12 is preferably 30 to 70 μm.
[0023]
In this embodiment, a hardened glass cloth epoxy resin having a thickness of 0.13 mm is used as the insulating layer 24, and a low-flow epoxy adhesive sheet having a thickness of 50 μm is laminated on both sides of the insulating layer 24 as the adhesive layer 12. After heating and pressurizing at 160 ° C. and a pressure of 1 to 2 Pa for 20 to 30 minutes and performing temporary press bonding, a router process was performed to form an opening 11 of 10 mm × 10 mm.
[0024]
Since the insulating substrate 10 having the adhesive layer 12 on both sides of the insulating layer 24 does not have a conductor circuit, there is no fear of damaging the conductor pattern by forming a hollow portion (opening 11) by a router process, and Since it does not require high positional accuracy, it can be manufactured with high work efficiency.
[0025]
FIG. 4 shows a circuit board 13 in which the conductor circuits 5 are provided on both outer layers of the base insulating layer 25. A double-sided board or a multilayer board in which the conductor circuits 5 are provided in the outer layer can be used.
By removing the conductor by etching at the position corresponding to the opening 11 of the insulating substrate 10, it is possible to prevent the generation of burrs at the time of the cutting process in the later step, and at the same time, to heat and press the air when laminating. There is an effect of skipping.
[0026]
As the base insulating layer 25, a glass cloth epoxy resin, a glass nonwoven cloth epoxy resin, a glass cloth bismaleimide triazine resin, an aramid nonwoven cloth epoxy resin, or the like is used.
In the present embodiment, a double-sided copper-clad glass cloth epoxy resin having a thickness of 0.13 mm and a copper foil having a thickness of 12 μm attached to both sides is used as the base insulating layer 25, and the conductor circuit 5 is formed by an ordinary method.
Although a double-sided board is shown as the base insulating layer 25, a multilayer board may be used.
[0027]
Next, as shown in FIG. 5, a base substrate 1 composed of an interstitial via hole plate, an insulating substrate 10 having an opening 11 and having an adhesive layer 12 on both sides, and a circuit substrate 13 having a conductive circuit 5 on both sides Are laminated on each other, and are pressed and bonded from both upper and lower surfaces while heating with a vacuum press machine to form a multilayer board 14.
In this example, the treatment was performed at a heating temperature of 170 to 190 ° C. and a pressure of 2 to 5 MPa for a heating and pressing time of 60 to 120 minutes.
[0028]
Thus, the base substrate 1, the insulating substrate 10, and the circuit board 13 are bonded to each other by the bonding layer 12.
In addition, since the low flow type epoxy resin is used as the adhesive layer 12, there is no possibility that the adhesive layer (adhesive) 12 flows greatly and stains the conductor pattern.
[0029]
In FIG. 6, a conductive via hole 41 is provided in the multilayer board 14, a through hole 15 is formed, and a through hole plating 151 is applied to an inner peripheral wall and an opening edge of the through hole 15.
That is, a bottomed circular hole having a diameter of 0.07 to 0.15 mm is formed in one outer layer of the multilayer board 14 with a carbon dioxide gas laser, and a portion other than the hollow portion 16 formed by the opening 11 is drilled into a through hole. The through hole 15 having a diameter of 0.3 to 0.6 mm is formed by punching, and after performing desmearing, panel plating is performed to form the conductive via hole 41 and the through hole plating 151.
[0030]
In FIG. 7, by laminating a dry film on the surface of the multilayer board 14, exposing, developing, and etching, an outer layer conductor circuit 54 is formed, and unnecessary portions (for example, portions corresponding to the hollow portion 16) are formed. The conductor such as copper foil is removed.
By removing a conductor such as a copper foil at a portion corresponding to the hollow portion 16, it is possible to prevent burrs from being generated at the time of cutting (router processing) in the next step.
[0031]
In FIG. 1, a solder resist film is formed on a necessary portion of the outer layer conductor circuit, and a cut is made along the hollow portion 16 (see FIG. 7) from the outside by a router process to form a concave portion 17.
Since the hollow portion 16 (see FIG. 7) has already been formed, strict positioning accuracy is not required for vertical positioning in the router processing, so that the router processing can be performed efficiently.
[0032]
Next, nickel plating and gold plating are applied to the second conductor circuit 52 and the through hole 15 in the recess 17 to form the multilayer printed wiring board 18.
Since the outer layer conductor circuit 54 of the multilayer printed wiring board 18 is plated with nickel and gold, the connection reliability by mounting the semiconductor chip and other electronic components is ensured.
Further, since the through holes are also plated with nickel and gold, the through holes can be cut in the vertical direction and used as end surface through holes.
[0033]
【The invention's effect】
The present invention has the following effects because it is configured as described above.
By laminating an insulating substrate having an opening, the conductive circuit is not damaged by the cutting process for forming the concave portion, and the counterboring process is not required, so that a multi-layer printed wiring board with high working efficiency and stable quality is provided. Can be manufactured.
[Brief description of the drawings]
FIG. 1 is a schematic configuration diagram of a multilayer printed wiring board according to an embodiment of the present invention.
FIG. 2 is a schematic configuration diagram of a basic substrate of the present invention.
FIG. 3 is a schematic configuration diagram of an insulating substrate of the present invention.
FIG. 4 is a schematic configuration diagram of a circuit board of the present invention.
FIG. 5 is an explanatory view of a manufacturing process according to the embodiment of the present invention.
FIG. 6 is an explanatory view of a manufacturing process according to an example of the present invention.
FIG. 7 is an explanatory diagram of a manufacturing process according to an example of the present invention.
FIG. 8 is an explanatory view of a manufacturing process of the basic substrate of the present invention.
FIG. 9 is an explanatory diagram of a manufacturing process of the basic substrate of the present invention.
[Explanation of symbols]
REFERENCE SIGNS LIST 1 basic substrate, 2 insulating plate, 3, 4, 41 conductive via hole, 5 conductive circuit, 6 conductive material, 7 double-sided copper-clad laminate, 8 through via hole, 9 filled resin 10 insulating substrate, 11 opening, 12 adhesive layer , 13 circuit board 14 multilayer board, 15 through hole, 16 hollow portion, 17 concave portion 18 multilayer printed wiring board 21 first insulating material, 22 second insulating material, 23 third insulating material, 24 insulating layer 25 base insulating layer,
51 first conductor circuit, 52 second conductor circuit, 53 third conductor circuit 54 outer layer conductor circuit,
61 first conductive material, 62 second conductive material, 63 third conductive material,
151 through-hole plating,

Claims (3)

A method for manufacturing a multilayer printed wiring board, comprising the following steps.
A. A basic substrate having a conductor circuit on one outer layer and a unit substrate having a conductive material on the other layer of two or more layers,
An insulating substrate having an opening and having an adhesive layer on both sides,
A step of laminating a circuit board having conductor circuits on both sides to form a multilayer board,
B. Forming a conductive via hole on one side of the multilayer board, forming a through hole in a portion other than the hollow portion, and plating the through hole;
C. Forming an outer conductor circuit on the surface of the multilayer board;
D. Cutting one side of the multilayer board, forming a recess,
E. FIG. A step of plating the outer conductor circuit. The method for manufacturing a multilayer printed wiring board according to claim 1, wherein the substrate is a thermosetting resin of glass cloth or a thermosetting resin of glass nonwoven fabric. 3. The method for manufacturing a multilayer printed wiring board according to claim 1, wherein the plating applied to the outer layer conductor circuit is nickel plating and gold plating.

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