KR100686339B1 - Thin Film Transistor using Metal Induced Crystallization and method of fabricating the same and Active Matrix Flat Panel Display using said Thin Film Transistor - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor using a metal induction crystallization method using a metal induction crystallization method, a method for manufacturing the same, and an active matrix flat panel display device using the same. The present invention relates to a MIC polycrystalline silicon having a source / drain region formed on an insulating substrate. An active layer formed; A buffer layer formed on the active layer; And a gate electrode formed on the buffer layer, wherein the buffer layer serves as a diffusion sacrificial layer of the MIC crystallization inducing metal during MIC crystallization and serves as a gate insulating film of the thin film transistor.

Thin Film Transistors, MIC, Sacrificial Layers

Description

Thin Film Transistor using Metal Induced Crystallization and method of fabricating the same and Active Matrix Flat Panel Display using said Thin Film Transistor}

1A to 1D are cross-sectional views illustrating a method of manufacturing a thin film transistor using a conventional metal induction crystallization method.

2A to 2E are cross-sectional views illustrating a method of manufacturing a thin film transistor using a metal induction crystallization method according to a first embodiment of the present invention.

3A to 3E are cross-sectional views illustrating a method of manufacturing a thin film transistor according to a second embodiment of the present invention.

4 is a diagram showing an off current (Ioff) according to the content of Ni contained in an active layer of a thin film transistor.

5 is a diagram showing the mobility of the charge and the threshold voltage according to the content of Ni contained in the active layer of the thin film transistor.

(Explanation of symbols for main parts of drawing)

200; Insulating substrate 210; First buffer layer

225; Active layer 230; Second buffer layer

240; Crystallization induced metal film 250; Gate electrode

260; Interlayer insulating films 261 and 265; Contact hall

271, 275; Source / drain electrodes

The present invention relates to a thin film transistor using a metal induction crystallization method, a method for manufacturing the same, and an active matrix flat panel display device using the same, and more particularly, to a metal induction crystallization method using a metal induced crystallization method (MIC). A thin film transistor using the same, a method of manufacturing the same, and an active matrix flat panel display using the same.

As a method of forming a polycrystalline silicon film used as an active layer of a thin film transistor, a method of forming an polycrystalline silicon film by depositing an amorphous silicon film on an insulating substrate and then crystallizing at a predetermined temperature is used.

Crystallization of the amorphous silicon film may include solid phase crystallization (SPC) by heat treatment, executive laser annealing (ELA) by laser crystallization, metal induced crystallization (MIC), and the like.

However, the SPC method has a problem of high crystallization temperature and a long process time, and the ELA method has a problem of causing temporal and spatial unevenness due to expensive equipment investment and laser instability and streaking defect due to the laser. .

In comparison, the MIC method has a relatively low process temperature and a short process time using a conventional heat treatment facility.

Hereinafter, a conventional technology will be described with reference to the accompanying drawings.

1A to 1D are cross-sectional views illustrating a method of manufacturing a thin film transistor using a conventional metal induction crystallization method.

Referring to FIG. 1A, a crystallization catalyst metal for forming an amorphous silicon film 120 on an insulating substrate 100 having a buffer layer 110, and performing a metal induced crystallization method on the amorphous silicon film 120. The film 130 is formed.

Referring to FIG. 1B, the insulating substrate 100 on which the crystallization catalyst metal film 130 is formed is heat-treated in a furnace to crystallize the amorphous silicon film 120 into a polycrystalline silicon film 125.

Referring to FIG. 1C, the polycrystalline silicon film 125 is patterned to form an active layer 125 made of polycrystalline silicon.

Referring to FIG. 1D, after forming the active layer 125, a gate insulating layer 140 and a gate electrode material are sequentially formed on the insulating substrate 100, and the gate electrode material is patterned to form the gate electrode 150. To form.

After the gate electrode 150 is formed, source / drain regions 125S and 125D are formed in the active layer 125 by implanting predetermined impurities using the gate electrode 150 as a mask. In this case, a region between the source / drain regions 125S and 125D serves as a channel region 125C.

After forming the source / drain regions 125S and 125D, a contact hole exposing a portion of the source / drain regions 125S and 125D on the entire surface of the insulating substrate 100 including the gate electrode 150 ( An interlayer insulating layer 160 having 161 and 165 is formed.

After forming the interlayer insulating layer 160, source / drain electrodes 171 and 175 electrically connected to the source / drain regions 125S and 125D are formed through the contact holes 161 and 165 to form a thin film transistor. To form.

However, since the thin film transistor formed through the above process is crystallized in direct contact with the crystallization catalyst metal during MIC crystallization, the crystallization catalyst metal diffuses and remains in the active layer. At this time, when the content of the crystallization catalyst metal in the active layer is more than necessary, especially when the crystallization catalyst metal is Ni and the content of Ni in the active layer is 1E + 12 / cm 2 or more, the off current increases and the threshold voltage ( Vth) is increased, and the mobility of the charges is hindered by lowering the mobility of the charges.

Therefore, there is a problem in that the image quality is degraded in the active matrix flat panel display using the thin film transistor as described above, and malfunction occurs.

An object of the present invention is to solve the above problems of the prior art, the present invention forms a sacrificial layer for diffusion of the crystallization inducing metal between the amorphous silicon film and the crystallization induction metal film, and the diffusion of the crystallization induction metal It is an object of the present invention to provide a thin film transistor using a metal-induced crystallization method having excellent properties by performing MIC crystallization and controlling the remaining amount of crystallization-inducing metal in the active layer, and a method of manufacturing the same and an active matrix flat panel display device using the same. .

The present invention for achieving the above object is an active layer made of MIC polycrystalline silicon having a source / drain region formed on an insulating substrate; A buffer layer formed on the active layer; And a gate electrode formed on the buffer layer, wherein the buffer layer serves as a diffusion sacrificial layer of the MIC crystallization inducing metal during MIC crystallization and serves as a gate insulating film of the thin film transistor.

Preferably, the buffer layer is made of SiO 2, and the crystallization inducing metal is preferably any one of Ni, Al, Pt, Pd, Pb, Co, and alloys thereof.

It is preferable that the said active layer contains a crystallization induction metal by MIC crystallization.

Preferably, the crystallization induction metal contained in the active layer is Ni, and the Ni contained in the active layer is preferably 1E + 12 / cm 2 or less, and more preferably, the Ni contained in the active layer is 1E + 11 / cm 2. It is preferable that it is to 1E + 12 / cm <2>.

In addition, the present invention comprises the steps of forming an amorphous silicon film on an insulating substrate; Forming a buffer layer on the amorphous silicon film; Depositing a crystallization inducing metal for MIC crystallization on the buffer layer; And heat-treating the amorphous silicon film to MIC crystallization to form a polycrystalline silicon film.

The forming of the polycrystalline silicon film may be performed by thermally diffusing the crystallization inducing metal and simultaneously forming the polycrystalline silicon film by MIC crystallizing the amorphous silicon film.

The forming of the polycrystalline silicon film may include performing a first heat treatment to diffuse the crystallization inducing metal to form a crystallization inducing metal film interposed between the amorphous silicon film and the buffer layer; The second heat treatment may be performed to MIC crystallize the amorphous silicon film into a polycrystalline silicon film using the crystallization induction metal film.

And forming a polycrystalline silicon film through the MIC crystallization, and simultaneously patterning the buffer layer and the polycrystalline silicon film to simultaneously form an active layer made of polycrystalline silicon and a gate insulating film.

Removing the buffer layer after forming a polycrystalline silicon film through the MIC crystallization; Patterning the polycrystalline silicon film to form an active layer; The method may further include forming a gate insulating film on an entire surface of the insulating substrate including the active layer.

The present invention also provides an active matrix flat panel display device such as an active matrix liquid crystal display device or an active matrix organic electroluminescent display device using the above-described thin film transistor.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

2A to 2E are cross-sectional views illustrating a method of manufacturing a thin film transistor using a metal induction crystallization method according to a first embodiment of the present invention.

Referring to FIG. 2A, a first buffer layer 210 is provided to prevent impurities such as metal ions from diffusing from the insulating substrate 200 and penetrate into the active layer made of polycrystalline silicon. ) Is deposited by a method such as PECVD, LPCVD, sputtering.

After the first buffer layer 210 is formed, an amorphous silicon film 220 is deposited on the first buffer layer 210 using PECVD, LPCVD, or sputtering. And a dehydrogenation process is performed in a vacuum furnace. When the amorphous silicon film 220 is deposited by LPCVD or sputtering, it may not be dehydrogenated.

Next, a second buffer layer 230 is formed on the amorphous silicon film 220 to serve as a sacrificial layer for diffusing a crystallization inducing metal. In this case, the second buffer layer 230 is preferably made of SiO 2 which can act as a sacrificial layer during diffusion of the crystallization inducing metal.

After forming the second buffer layer 230, a crystallization inducing metal for MIC crystallization is deposited to form a crystallization inducing metal film 240. At this time, the crystallization induction metal layer 240 is preferably any one of Ni, Al, Pt, Pd, Pb Co and their alloys.

Referring to FIG. 2B, after forming the crystallization inducing metal film 240, the insulating substrate 200 on which the amorphous silicon film 220 is formed is heat-treated in a furnace to heat the crystallization inducing metal. The polysilicon film 223 is formed by diffusing the amorphous silicon film 220 through the buffer layer 230 and performing a MIC crystallization process of crystallizing the amorphous silicon film 220 by the diffused crystallization inducing metal. .

At this time, the content of the crystallization induction metal of the polycrystalline silicon film 223 formed through the MIC crystallization process is preferably in the range of 1E + 11 / cm 2 to 1E + 12 / cm 2.

When the content of the crystallization induction metal is 1E + 12 / cm 2 or more, the characteristics of the thin film transistor such as off current increase and threshold voltage increase, and the content of the crystallization induction metal is 1E + 11 / cm 2. This is because in the case of 2 cm 2 or less, a delay of MIC crystallization is caused due to the lack of an absolute amount of crystallization inducing metal serving as a MIC crystallization catalyst.

Referring to FIG. 2C, the crystallization inducing metal layer 240 on the second buffer layer 230 is removed.

After removing the crystallization-inducing metal layer 240, the second buffer layer 230 and the polycrystalline silicon layer 223 are simultaneously patterned to form an active layer 225, and a second remaining on the active layer 225. The buffer layer 230 serves as a gate insulating film of the thin film transistor.

Referring to FIG. 2D, after forming the active layer 225, the gate electrode 250 is formed on the second buffer layer 230 serving as the gate insulating layer.

After the gate electrode 250 is formed, predetermined conductive impurities are doped into the active layer 225 using the gate electrode 250 as a mask, and source / drain regions 225S and 225D are formed in the active layer 225. ). In this case, the undoped region between the source / drain regions 225S and 225D serves as the channel region 225C of the thin film transistor.

Referring to FIG. 2E, after forming the source / drain regions 225S and 225D, a portion of the source / drain regions 225S and 225D is formed on the entire surface of the insulating substrate 200 including the gate electrode 250. An interlayer insulating film 260 having contact holes 261 and 265 exposing the same is formed.

After forming the interlayer insulating layer 260, source / drain electrodes 271 and 275 electrically connected to the source / drain regions 225S and 225D are formed through the contact holes 261 and 265 to form a thin film transistor. To form.

(Example 2)

3A to 3E are cross-sectional views illustrating a method of manufacturing a thin film transistor according to a second exemplary embodiment of the present invention.

Referring to FIG. 3A, an amorphous silicon film 320 is formed on an insulating substrate 300 on which the first buffer layer 310 is formed, similar to the first embodiment.

After forming the amorphous silicon film 320, a second buffer layer 330 made of SiO 2 is formed on the amorphous silicon film 320, and a crystallization induction metal for MIC crystallization is formed on the second buffer layer 330. Deposition to form a first crystallization induction metal film 340. At this time, the first crystallization induction metal film 340 is preferably any one of Ni, Al, Pt, Pd, Pb, Co and alloys thereof.

Referring to FIG. 3B, after the first crystallization inducing metal layer 340 is formed, the amorphous silicon layer is formed by first heat treatment of the insulating substrate 300 on which the amorphous silicon layer 320 is formed in a furnace. A second crystallization inducing metal film 345 is formed between the 320 and the second buffer layer 330.

The second crystallization induction metal layer 345 is formed by diffusion of the crystallization induction metal via the second buffer layer 330 through the first heat treatment, and is formed in polycrystalline silicon formed in a subsequent MIC crystallization process. It is for adjusting the content of the crystallized metal contained.

Referring to FIG. 3C, the first crystallization inducing metal layer 340 and the second buffer layer 330 are removed.

After removing the first crystallization-inducing metal layer 340 and the second buffer layer 330, the amorphous silicon film 320 is subjected to a second heat treatment in a furnace (crystal) MIC crystallization to crystallize into a polycrystalline silicon film 323 Perform the process.

In this case, the content of the crystallization induction metal of the polycrystalline silicon film 323 formed through the MIC crystallization process is preferably in the range of 1E + 11 / cm 2 to 1E + 12 / cm 2 as in the first embodiment.

Referring to FIG. 3D, after the amorphous silicon film 320 is crystallized with the polycrystalline silicon film 323, the second crystallization inducing metal film 340 is removed.

After removing the second crystallization induction metal film 340, the polycrystalline silicon film 323 is patterned to form an active layer 325.

Referring to FIG. 3E, after forming the active layer 325, a gate insulating layer 350 is formed on the entire surface of the insulating substrate 300 including the active layer 325, and a gate electrode 360 is formed.

Source / drain regions 325S and 325D are formed by doping a predetermined impurity into the active layer 325 using the gate electrode 360 as a mask. In this case, a region between the source / drain regions 325S and 325D serves as a channel region 325C of the thin film transistor.

After the source / drain regions 325S and 325D are formed, as in the first embodiment, the gate insulating film 350, the gate electrode 360, the interlayer insulating film 370, and the source / drain electrodes 381 and 385 are formed. To form a thin film transistor.

On the other hand, Figure 4 is a diagram showing the off current (Ioff) according to the content of Ni contained in the active layer of the thin film transistor, Figure 5 is a charge mobility and threshold voltage according to the content of Ni contained in the active layer of the thin film transistor It is a figure which shows.

Referring to FIG. 4, it can be seen that when the content of the crystallization inducing metal, for example, Ni contained in the active layer of the thin film transistor is 1E + 12 / cm 2 or more, the off current increases to 100 mA or more, thereby deteriorating the characteristics of the thin film transistor. have.

In addition, referring to FIG. 5, it can be seen that the charge mobility and the threshold voltage of the thin film transistor change according to the content of the crystallization inducing metal, for example, Ni contained in the active layer. That is, the lower the Ni content, the greater the mobility of charge, and the lower the threshold voltage, the better the characteristics of the thin film transistor.

That is, it can be seen that it is preferable to maintain the content of Ni contained in the active layer to 1E + 12 / cm 2 or less.

In addition, when the content of the crystallization-inducing metal is 1E + 11 / ㎠ or less, because the lack of the absolute amount of the crystallization-inducing metal acting as MIC crystallization catalyst causes a delay of MIC crystallization, the content of the crystallization-inducing metal contained in the active layer It is preferable that it is 1E + 11 / cm <2> or more.

The thin film transistor formed through the process as described above adjusts the content of the crystallization induction metal remaining in the active layer to 1E + 12 / ㎠ or less, low off current and threshold voltage of the thin film transistor, high mobility of charge It is possible to provide an excellent thin film transistor. In addition, the content of the crystallization induction metal remaining in the active layer can be adjusted to 1E + 11 / cm 2 or more to prevent the delay of the MIC crystallization process.

In addition, the above-described thin film transistor can be used to prevent deterioration and malfunction of an active matrix flat panel display such as an active matrix organic electroluminescent display or a liquid crystal display using a flat panel display.

As described above, according to the present invention, an active layer is formed by forming a sacrificial layer for diffusion of a crystallization inducing metal between an amorphous silicon film and a crystallization inducing metal film, and performing MIC crystallization through diffusion of the crystallization inducing metal. A thin film transistor using a metal-induced crystallization method having excellent properties by controlling the remaining amount of crystallization-inducing metal of the present invention, a method of manufacturing the same, and an active matrix flat panel display device using the same can be provided.

While the foregoing has been described with reference to preferred embodiments of the present invention, those skilled in the art will be able to variously modify and change the present invention without departing from the spirit and scope of the invention as set forth in the claims below. It will be appreciated.

Claims (18)

An active layer made of MIC polycrystalline silicon having a source / drain region formed on the insulating substrate; A buffer layer formed on the active layer; A gate electrode formed on the buffer layer, The buffer layer serves as a diffusion sacrificial layer of the MIC crystallization induction metal during MIC crystallization, and serves as a gate insulating film of the thin film transistor. The method of claim 1, The buffer layer is a thin film transistor, characterized in that made of SiO2. The method of claim 1, The crystallization induction metal is any one of Ni, Al, Pt, Pd, Pb, Co and alloys thereof. The method of claim 1, And the active layer contains a crystallization inducing metal by MIC crystallization. The method of claim 4, wherein And the crystallization inducing metal contained in the active layer is Ni. The method of claim 5, Ni contained in the active layer is a thin film transistor, characterized in that 1E + 11 / cm 2 to 1E + 12 / cm 2. delete An active matrix flat panel display device comprising the thin film transistor according to any one of claims 1 to 6. The method of claim 8, And the flat panel display is a liquid crystal display or an organic electroluminescent display. delete delete delete delete delete delete delete delete delete

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