KR100674943B1 - Sb,Ga 또는 Bi가 도핑된 반도체 메모리 소자 및 그제조 방법 - Google Patents
Sb,Ga 또는 Bi가 도핑된 반도체 메모리 소자 및 그제조 방법 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 85
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 229910052797 bismuth Inorganic materials 0.000 title claims abstract description 13
- 239000012535 impurity Substances 0.000 claims abstract description 79
- 239000000758 substrate Substances 0.000 claims abstract description 42
- 239000002019 doping agent Substances 0.000 claims abstract description 18
- 238000003860 storage Methods 0.000 claims abstract description 14
- 238000010438 heat treatment Methods 0.000 claims description 39
- 238000000034 method Methods 0.000 claims description 22
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- 238000013500 data storage Methods 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims description 2
- 238000002425 crystallisation Methods 0.000 description 10
- 230000008025 crystallization Effects 0.000 description 10
- 230000014759 maintenance of location Effects 0.000 description 6
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 238000002441 X-ray diffraction Methods 0.000 description 3
- 238000005259 measurement Methods 0.000 description 3
- 230000002411 adverse Effects 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
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- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
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- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
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- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66833—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a charge trapping gate insulator, e.g. MNOS transistors
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
- H01L29/167—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System further characterised by the doping material
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
Abstract
Description
Claims (12)
- 반도체 메모리 소자에 있어서,반도체 기판에 Sb, Ga 또는 Bi 중 어느 하나의 물질을 도펀트로 포함하여 각각 형성된 제 1불순물 영역 및 제 2불순물 영역;상기 반도체 기판 상에 상기 제 1불순물 영역 및 상기 제 2불순물 영역과 각각 접하며 형성되며 전하 저장층 및 고유전체층을 포함하는 절연막; 및상기 절연막 상에 형성된 게이트 전극층;을 포함하는 것을 특징으로 하는 반도체 메모리 소자.
- 제 1항에 있어서,상기 절연막은 순차적으로 형성된 터널링 산화층, 데이타 저장층 및 블로킹 산화층을 포함하여 상기 블로킹 산화층은 high-k 물질로 형성된 것을 특징으로 하는 반도체 메모리 소자.
- 제 1항에 있어서,상기 반도체 기판은 p형 기판이며, 상기 제 1불순물 영역 및 상기 제 2불순물 영역은 Sb 또는 Bi 중 어느 하나의 물질로 도핑된 것을 특징으로 하는 도핑된 반도체 메모리 소자.
- 제 1항에 있어서,상기 반도체 기판은 n형 기판이며, 상기 제 1불순물 영역 및 상기 제 2불순물 영역은 Ga로 도핑된 것을 특징으로 하는 도핑된 반도체 메모리 소자.
- 반도체 메모리 소자의 제조 방법에 있어서,(가) 반도체 기판 상에 전하 저장층 및 유전체층을 포함하는 절연막 및 게이트 전극층을 형성하는 단계;(나) 상기 절연막 및 게이트 전극층의 양측부를 제거하여 상기 반도체 기판의 양측상부를 노출시키는 단계;(다) 노출된 상기 반도체 기판의 양측상부에 Sb, Bi 또는 Ga 중 적어도 어느 하나의 물질을 도핑하여 제 1불순물 영역 및 제 2불순물 영역을 각각 형성시키는 단계; 및(라) 상기 제 1불순물 영역 및 상기 제 2불순물 영역을 활상화시키기 위하여 열처릴를 실시하는 단계;를 포함하는 것을 특징으로 하는 반도체 메모리 소자의 제조 방법.
- 제 5항에 있어서,상기 반도체 기판은 p형 기판이며, 상기 제 1불순물 영역 및 상기 제 2불순물 영역은 Sb 또는 Bi 중 어느 하나의 물질로 도핑하는 것을 특징으로 하는 도핑된 반도체 메모리 소자의 제조 방법.
- 제 5항에 있어서,상기 반도체 기판은 n형 기판이며, 상기 제 1불순물 영역 및 상기 제 2불순물 영역은 Ga로 도핑하는 것을 특징으로 하는 도핑된 반도체 메모리 소자의 제조 방법.
- 제 5항에 있어서, 상기 (다) 단계의 상기 도핑은 5keV 내지 15keV의 가속 에너지로 이루어지는 것을 특징으로 반도체 메모리 소자의 제조 방법.
- 제 5항에 있어서, 상기 (다) 단계의 상기 도핑에 의해 도핑된 도펀트 양은 5×1014/cm2 내지 1016/cm2 인 것을 특징으로 하는 반도체 메모리 소자의 제조 방법.
- 제 5항에 있어서, 상기 (라) 단계의 상기 열처리는 섭씨 600도 내지 850도에서 실시하는 것을 특징으로 하는 반도체 메모리 소자의 제조 방법.
- 제 5항에 있어서,상기 (가) 단계의 상기 절연막은 상기 반도체 기판 상에 터널링 산화층, 데이타 저장층 및 터널링 산화층을 순차적으로 증착하여 형성시키는 것을 특징으로 하는 반도체 메모리 소자의 제조 방법.
- 제 11항에 있어서,상기 터널링 산화층은 high-k 물질로 형성시키는 것을 특징으로 하는 반도체 메모리 소자의 제조 방법.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
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KR1020050003982A KR100674943B1 (ko) | 2005-01-15 | 2005-01-15 | Sb,Ga 또는 Bi가 도핑된 반도체 메모리 소자 및 그제조 방법 |
CNB2006100061208A CN100530692C (zh) | 2005-01-15 | 2006-01-16 | 掺有锑、镓或铋的半导体器件及其制造方法 |
JP2006007968A JP2006196909A (ja) | 2005-01-15 | 2006-01-16 | Sb、GaまたはBiがドーピングされた半導体メモリ素子及びその製造方法 |
US11/333,959 US7531865B2 (en) | 2005-01-15 | 2006-01-17 | Semiconductor device doped with Sb, Ga or Bi and method of manufacturing the same |
US12/417,432 US7670916B2 (en) | 2005-01-15 | 2009-04-02 | Semiconductor device doped with Sb, Ga, or Bi and method of manufacturing the same |
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KR1020050003982A KR100674943B1 (ko) | 2005-01-15 | 2005-01-15 | Sb,Ga 또는 Bi가 도핑된 반도체 메모리 소자 및 그제조 방법 |
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KR101005638B1 (ko) * | 2006-12-04 | 2011-01-05 | 주식회사 하이닉스반도체 | 반도체 메모리 소자 및 제조방법 |
KR101140271B1 (ko) * | 2010-11-23 | 2012-04-26 | 고려대학교 산학협력단 | 다중 기능 비휘발성 메모리 소자 및 그 제조 방법 |
CN106653603B (zh) * | 2015-11-04 | 2019-08-27 | 中芯国际集成电路制造(上海)有限公司 | 改善半导体结构漏电流的方法 |
US10249542B2 (en) | 2017-01-12 | 2019-04-02 | International Business Machines Corporation | Self-aligned doping in source/drain regions for low contact resistance |
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JPH05218069A (ja) * | 1992-02-07 | 1993-08-27 | Sharp Corp | Mosトランジスタおよびその製造方法 |
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KR20000076854A (ko) * | 1999-03-16 | 2000-12-26 | 카네코 히사시 | 반도체 장치의 제조방법 |
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JPS6340378A (ja) | 1986-08-05 | 1988-02-20 | Fujitsu Ltd | Epromの製造方法 |
DE19620032C2 (de) | 1996-05-17 | 1998-07-09 | Siemens Ag | Halbleiterbauelement mit Kompensationsimplantation und Herstellverfahren |
US6329257B1 (en) * | 1997-12-19 | 2001-12-11 | Advanced Micro Devices, Inc. | Method for laterally peaked source doping profiles for better erase control in flash memory devices |
US6518122B1 (en) * | 1999-12-17 | 2003-02-11 | Chartered Semiconductor Manufacturing Ltd. | Low voltage programmable and erasable flash EEPROM |
TW520506B (en) * | 2001-08-09 | 2003-02-11 | Macronix Int Co Ltd | Structure of non-volatile memory |
EP1487013A3 (en) * | 2003-06-10 | 2006-07-19 | Samsung Electronics Co., Ltd. | SONOS memory device and method of manufacturing the same |
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TWI401749B (zh) * | 2004-12-27 | 2013-07-11 | Third Dimension 3D Sc Inc | 用於高電壓超接面終止之方法 |
US7319618B2 (en) * | 2005-08-16 | 2008-01-15 | Macronic International Co., Ltd. | Low-k spacer structure for flash memory |
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JPH05218069A (ja) * | 1992-02-07 | 1993-08-27 | Sharp Corp | Mosトランジスタおよびその製造方法 |
KR19980057025A (ko) * | 1996-12-30 | 1998-09-25 | 김영환 | 반도체 소자 제조방법 |
KR20000076854A (ko) * | 1999-03-16 | 2000-12-26 | 카네코 히사시 | 반도체 장치의 제조방법 |
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US7670916B2 (en) | 2010-03-02 |
US7531865B2 (en) | 2009-05-12 |
CN100530692C (zh) | 2009-08-19 |
JP2006196909A (ja) | 2006-07-27 |
US20090227081A1 (en) | 2009-09-10 |
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