KR100643561B1 - A substrate for LCD and method for fabricating thereof - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an array substrate for a liquid crystal display device having a color filter on array structure in which a color filter is formed on a thin film transistor, and in particular, a plurality of gate wirings and data wirings connected to the array substrate. Link line (hereinafter referred to as "link portion").

Conventionally, an organic film, which is a light shielding film formed with a color filter, remains on each link portion of the gate wiring and the data wiring, so that the adhesive force with the adhesive printed on the link portion for bonding the substrate is not good.

Therefore, when the floating phenomenon of the substrate and the sealant occurs and the liquid crystal is injected, a defect occurs that the liquid crystal leaks outward.

In order to solve this problem, the present invention uses a method of further forming a metal film on the insulating film on the upper link portion, and dry etching the organic film using the metal film as an anti-etching film. In this manner, the lower link portion can be protected in the process of removing the organic layer, and at the same time, the effect of lowering the step difference in the outer portion of the substrate is expected.

Therefore, a reliable liquid crystal panel can be manufactured.

Description

A substrate for LCD and method for fabricating array substrate             

1 is a cross-sectional view illustrating a cross section corresponding to one pixel part of a general liquid crystal display device.

2 is an enlarged plan view schematically showing some pixels of a conventional COT structure array substrate for a liquid crystal display device;

3A to 3D are cross-sectional views illustrating a process sequence by cutting along III-III ′ and IV-IV ′ of FIG. 2.

4A to 4E are process plan views according to the present invention and process cross-sectional views cut along the lines V-V ′ and VI-VI ′ and according to the process sequence.

<Explanation of symbols for the main parts of the drawings>

100 substrate 114 pixel electrode

113: gate wiring 113c: gate connection wiring

115: data wiring 115c: data connection wiring

133: source electrode 135: drain electrode                 

137: active layer 148: gate terminal

149: data terminals 151, 153: etching prevention pattern

The present invention relates to an image display device, and more particularly, to a method of manufacturing a liquid crystal display device (LCD) including a thin film transistor (TFT) and a liquid crystal display device according to the method. It is about.

The driving principle of the liquid crystal display device uses the optical anisotropy and polarization property of the liquid crystal. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, and the direction of the molecular arrangement can be controlled by artificially applying an electric field to the liquid crystal.

Accordingly, when the molecular arrangement direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light is refracted in the molecular arrangement direction of the liquid crystal due to optical anisotropy to express image information.

Currently, the active matrix liquid crystal display (AM-LCD) in which the above-described thin film transistor and pixel electrodes connected to the thin film transistor are arranged in a matrix manner has attracted the most attention due to its excellent resolution and video performance.

In general, the structure of a liquid crystal panel, which is a basic component of a liquid crystal display, will be described.

1 is a cross-sectional view showing a cross section of a general liquid crystal panel.

In the liquid crystal panel 20, two substrates 2 and 4 having various kinds of elements are arranged to correspond to each other, and the liquid crystal layer 10 is sandwiched between the two substrates 2 and 4. .

The liquid crystal panel 20 includes an upper substrate 4 having a color filter representing a color and a lower substrate 2 having a switching circuit capable of converting a molecular arrangement direction of the liquid crystal layer 10.

A color filter layer 8 for implementing color is formed on the upper substrate 4, and a common electrode 12 covering the color filter layer 8 is formed. The common electrode 12 serves as one electrode for applying a voltage to the liquid crystal 10. The lower substrate 2 is a thin film transistor S serving as a switching role and a pixel electrode 14 serving as an electrode that receives a signal from the thin film transistor S and applies a voltage to the liquid crystal 10. It is composed of

The portion where the pixel electrode 14 is formed is called a pixel region P. FIG.

In order to prevent leakage of the liquid crystal 10 injected between the upper substrate 4 and the lower substrate 2, sealants (sealant) is formed at the edges of the upper substrate 4 and the lower substrate 2. It is sealed with).

The lower substrate 2 includes a plurality of thin film transistors S and a plurality of pixel electrodes 14 connected to the thin film transistors, respectively.                         

In the liquid crystal display device described above, a color filter substrate and a thin film transistor array substrate are manufactured by different processes, and a method of bonding them is adopted.

However, the above method is very complicated in the manufacturing process. For example, the manufacturing process of the color filter increases the price because the yield is low. The cost ratio occupied by the color filter in the liquid crystal display is very large.

In order to simplify the manufacturing process of the above-mentioned conventional liquid crystal display device, a thin film of a new concept called a "color filter on TFT" (hereinafter referred to as "COT" method) for forming a color filter on a thin film transistor array substrate. Transistor array design concepts have been introduced.

The liquid crystal display of the COT method is manufactured by forming a color resin of red, green, and blue on the thin film transistor after forming the thin film transistor which is a switching element.

In this case, the color resin may be formed in various ways, and the color filter may be formed by an electrodeposition method using the pixel electrode as an electrodeposition electrode.

For example, the structure of a COT structure array substrate in which a color filter is formed by the electrodeposition method and the manufacturing method thereof will be described through the contents of 00-74191 filed by the present applicant.

2 is an enlarged plan view schematically showing a part of an array substrate for a COT liquid crystal display.

As shown in the drawing, the array substrate for the liquid crystal display device includes a plurality of gate lines 13 arranged in one direction and a plurality of data lines 15 defining the pixel region P by crossing the gate lines 13 perpendicularly. Is formed.

Gate pads 17 and data pads 19 for receiving external signals are formed at predetermined ends of the gate line 13 and the data line 15, respectively.

In this case, the gate line 13 is connected to the gate pad 17 through a gate connection line 21, and the data line 15 is connected to the data pad 19 through a data connection line 23. do.

The thin film transistor S composed of the gate electrode 31, the source electrode 33, the drain electrode 35, and the active channel 37 is positioned at the point where the two wires cross each other, and is disposed on the pixel region P. The pixel electrode 14 in contact with the drain electrode 35 is configured.

In this case, a red matrix of red, green, and blue is formed in each pixel region on the pixel region P, and a black matrix composed of an opaque resin is formed between the subcolor filters 7. (8) is comprised. Each of the sub color filters 7 is formed by an electrodeposition method using the lower pixel electrode 14 as an electrodeposition electrode.

As shown, the black matrix 8 is positioned above the gate line 13, the data line 15, and the thin film transistor S in the pixel portion where the pixel electrode 14 is positioned. The gate connection line 21 and the data connection line 23 are formed in an area.

In such a configuration, when the color filter is formed on the array substrate using the electrodeposition method, the black matrix uses an opaque resin.                         

In the case where the black matrix is formed of a metal, since the black matrix is electroformed while the color pigment is deposited on the substrate, the black matrix uses an opaque resin which is an organic insulating material.

However, the resin does not have good adhesive properties with a sealant, which is an adhesive that is printed for bonding to the upper substrate, thereby causing a phenomenon of lifting between the substrate and the adhesive.

Hereinafter, the problems occurring during the manufacturing process and the process will be described in detail with reference to the process cross-sectional views of FIGS. 3A to 3D.

3A to 3D are cross-sectional views illustrating a process sequence by cutting along III-III ′ and IV-IV ′ of FIG. 2.

FIG. 3A illustrates a data line (15 in FIG. 2) vertically formed by crossing a gate line (13 in FIG. 2) and the gate line on the array substrate 20, and a thin film transistor S positioned at an intersection point of the two lines. ) Is a cross-sectional view.

As shown in the drawing, the thin film transistor S includes a semiconductor layer 37 formed by interposing a gate electrode 31 and a first insulating film 34 between the gate electrode 31, and The semiconductor layer 37 includes source and drain electrodes 33 and 35 spaced apart from each other by a predetermined distance from the gate electrode 31.

The gate electrode 31 may use a portion of the gate wiring (13 in FIG. 2) or may protrude from the gate wiring. A gate pad 17 is formed at one end of the gate line 13, and the gate line 13 and the gate pad 17 are connected by a gate link line 21.

The source electrode 33 protrudes from the data line 15 to the gate electrode 31, and a drain electrode 35 is formed to be spaced apart from the source electrode 33 by a predetermined distance.

At this time, although not shown, a data pad 19 connected by a data connection wiring (23 of FIG. 2) is formed at the end of the data wiring 15.

The gate connection line 21 and the data connection line 23 are both formed in the non-display area of the substrate, and then a sealant is printed.

Next, as illustrated in FIG. 3B, an organic insulating material or, in some cases, an inorganic insulating material may be coated or deposited on the entire surface of the substrate 20 on which the data wiring 15 and the like are formed. 2 The protective layer 41 which is an insulating film is formed.

Next, the protective layer 41 is patterned to expose a drain contact hole 43 exposing a part of the drain electrode on the drain electrode 35, and a part of the gate pad on the gate pad 17. A gate pad contact hole 45 for exposing and a data pad contact hole 47 for exposing a portion of the data pad 19 of FIG. 2 are formed on the data pad 19 of FIG. 2.

Next, a transparent conductive metal is deposited on the patterned protective layer 41 and patterned to form an island shape in contact with the pixel electrode 14 and the gate pad 17 in contact with the drain electrode 35. Gate pad terminals 51 are formed.

At the same time, an island-shaped data pad terminal 53 in contact with the data pad (19 in Fig. 2) is formed.

Next, as shown in FIG. 3C, an opaque resin used as the light shielding film 8 is deposited and patterned on the entire surface of the substrate 20 on which the pixel electrode 14 is formed. ), An upper portion of the data line 15, an area where the gate pad 17 and the gate connection line 21 located in the non-display area are located, a data pad (19 in FIG. 2) and the data connection line (FIG. 2). Light-shielding film 8 is formed in the area | region where 23) is located.

The reason why the light-shielding film 8 is applied to the non-display area is to form a sub color using the electrodeposition method, so that the pad part or the connection wiring part (hereinafter referred to as the "link part") is corroded by the electrolytic solution. It may cause disconnection or defect.

Next, the process of electrodepositing a color pigment in each pixel area | region (P of FIG. 2) of the board | substrate 20 in which the said light shielding film 8 was formed is performed. In this case, in the electrodeposition method, the substrate 20 is immersed in an electrodeposition paint solution containing pigment, resin, electrolysis solution, and the like, followed by electrodeposition of the first color, followed by electrodeposition of the second color and the third color. The sub color filter 7 is formed on the electrode.

After forming each of the sub-color filters, an organic material is coated to protect the pigment of the color filter to form a color filter protective film 57.

Next, the process of exposing each said pad part is performed.

In this process, as illustrated in FIG. 3D, the insulating layer on the gate connection line and the data connection line may be over-etched by dry etching.

As a result, the gate connection line 21 and the data connection line 21 (21 in FIG. 2) are exposed to cause large damage.

Accordingly, while removing the insulating film and the light blocking film between the pads and the connection wiring, the light blocking film and the color filter protective film on the upper connection wiring are left and patterned.

As a result, the insulating layers 34 and 41, the light blocking layer 8, and the color filter protective layer 57 remain on the plurality of gate connection lines 21 and the data connection lines 23.

Therefore, since the link portion is still an organic film (resin), the adhesive force with the sealant is not good even when the sealant is printed. Therefore, when the liquid crystal is injected after the upper substrate is bonded, the link portion and the sealant The phenomenon that the liquid crystal leaks due to the slight lifting between them occurs.

The present invention for solving this problem uses a method of removing the light shielding film and the color filter protective resin on the upper portion of the link portion, the defect occurs in the protective layer on the upper link portion while removing the light shielding film and the color filter protective resin. In order not to do so, a metal layer serving as a transparent electrode is inserted in the upper portion of the protective layer.

Accordingly, an object of the present invention is to produce a reliable liquid crystal panel by improving the adhesive force with the sealant and reducing the step with the display area using the method as described above.

According to an aspect of the present invention, an array substrate for a liquid crystal display device includes: a substrate defined by a display area and a non-display area; An active gate line formed on the substrate in one direction and passing through the display area, a gate pad positioned in the non-display area to receive a signal, and a gate connection line connecting the active gate line and the gate pad; A gate wiring composed of; Define a pixel area crossing the gate line perpendicularly to the gate line, and pass the active data line passing through the display area, a data pad positioned in the non-display area to receive a signal, the active data line and the data pad. A data wiring composed of a data connection wiring to be connected; A thin film transistor positioned at an intersection of the gate wiring and the data wiring and having a gate electrode, a source electrode, a drain electrode, and an active layer; A transparent pixel electrode in contact with the drain electrode and positioned on the pixel region; An etch stop layer formed on the gate connection line and the data connection line; Red, green, and blue sub-color filters on the pixel electrodes; And a black matrix configured between the sub color filters of the display area.

A first insulating film is formed again between the gate wiring and the data wiring.

An upper portion of the gate connection line has a structure in which a first insulating layer, a protective layer, and an etch stop layer are stacked.

The upper portion of the data connection line has a structure in which a protective layer and an etch stop layer are stacked.                     

The etch stop layer is made of the same material as the transparent pixel electrode, and a transparent conductive metal such as indium tin oxide (ITO) and indium zinc oxide (IZO) is used as the material.

The color filter is formed using an electrodeposition method, and is formed by electrodeposition on the pixel electrode.

According to an aspect of the present invention, there is provided a method of manufacturing an array substrate for liquid crystal display autonomous, comprising: preparing a substrate defined by a display area and a non-display area; An active gate line formed on the substrate in one direction and passing through the display area, a gate pad positioned in the non-display area to receive a signal, and a gate connection line connecting the active gate line and the gate pad to each other; Forming a configured gate wiring; Define a pixel area by crossing the gate line perpendicularly, and define an active data line passing through the display area, a data pad positioned in the non-display area to receive a signal, and connect the active data line to the data pad. Forming a data line formed of a data connection line; Forming a thin film transistor positioned at an intersection of the gate wiring and the data wiring, the thin film transistor having a gate electrode, a source electrode, and a drain electrode; Forming a pixel electrode in contact with the drain electrode and positioned on the pixel region; Forming an etch stop layer on the gate connection line and the data connection line; Forming red, green, and blue sub-color filters on the pixel electrodes; And a black matrix configured between the sub color filters of the display area.                     

Hereinafter, with reference to the accompanying drawings and embodiments will be described the present invention in detail.

Example

The present invention is to further form a transparent electrode before forming a light shielding film for the black matrix on the gate link and the data link portion, by using the transparent electrode as an etch prevention layer, to increase the step and to cause adhesion failure organic resin Can be removed. Hereinafter, preferred embodiments of the present invention will be described with reference to FIGS. 4A to 4E.

4A to 4E are process plan views according to the present invention and process cross-sectional views cut along the lines V-V ′ and VI-VI ′ and according to the process sequence.

First, as shown in FIG. 4A, aluminum (Al), aluminum alloy (AlNd), chromium (Cr), tungsten (W), molybdenum (Mo), copper (Cu), and the like are included on the transparent substrate 100. The selected one of the conductive metal groups is deposited and patterned to form a plurality of gate lines 113 formed in one direction and a plurality of gate electrodes 131 protruding from the gate lines 113.

In this case, the gate wiring 113 includes an active gate wiring 113a passing through the display area, a gate pad 113b positioned outside the display area and receiving a signal from the outside, the active gate wiring 113a and the A gate connection wiring 113c connecting the gate pad 113b is formed.

Next, an inorganic insulating material group in which a silicon oxide film (SiO ₂ ) and a silicon nitride film (SiN _x ) are formed on the entire surface of the substrate 100 including the gate wiring 113, and in some cases, benzocyclobutene. And one selected from an organic insulating material group consisting of an acrylic resin and an acrylic resin is deposited or coated to form a gate insulating film 121 as a first insulating film.

Next, an amorphous silicon (a-Si: H) 137a and an impurity amorphous silicon (n + a-Si: H) 137b are formed on the gate insulating layer 121 above the gate wiring (113 in FIG. 2). The semiconductor layer 137 is formed by lamination.

In the stack structure, the lower pure amorphous silicon layer 137a becomes an active channel afterwards, and the impurity amorphous silicon layer 137b is an ohmic contact for reducing resistance between the active layer and the metal wiring. Ohmic contact layer.

Next, a metal selected from the conductive metal group as described above is deposited and patterned on the entire surface of the substrate 100 on which the semiconductor layer 137 is formed, and perpendicularly intersects the gate wiring 113 to form a pixel region P. FIG. ), A data line 115 defining a source line, a source electrode 133 protruding from one side of the gate electrode 131 in the data line 115, and a drain electrode spaced apart from the source electrode 133 by a predetermined distance. And form 135.

The data line 115 also includes an active data line 115a in a display area, a data pad 115b in a non-display area to receive an external signal, the active data line 115a and a data pad. It consists of the data connection wiring 115c which connects 115b.

Next, as shown in FIG. 4B, one of the organic insulating material group described above and optionally an inorganic insulating material group is selected on the front surface of the substrate 100 on which the data line 115 and the like are formed. Coating or vapor deposition is performed to form the protective layer 123 which is the second insulating film.

Next, the protective layer 123 is patterned to be disposed on the drain electrode 135 to expose a drain contact hole 143 exposing a part of the drain electrode 135 and the gate pad 113b. A gate pad contact hole 143 and a data pad contact hole 145 exposing the data pad 115b are formed.

Next, as shown in FIG. 4C, one selected from the group of transparent conductive metals composed of indium tin oxide (ITO) and indium zinc oxide (IZO) on the entire surface of the substrate 100 on which the patterned protective layer is formed. Depositing and patterning the pixel electrode 114 in contact with the exposed drain electrode 135, the island-shaped gate pad terminal 148 in contact with the gate pad 113b, and the data pad 115b. While forming the data pad terminal 149 in contact with the substrate, an island-shaped transparent electrode pattern 151 and 153 in the shape of each connection line is further formed on the gate connection line 113c and the data connection line 115c. do.

Each of the transparent electrode patterns 151 and 153 serves as an etch stop layer 151 and 153 to prevent defects in the lower passivation layer and the insulating layer in the subsequent etching process.

Next, as shown in FIG. 4D, the opaque black resin having a low reflectance of light such as a carbon-based resin is formed on the entire surface of the substrate 100 on which the pixel electrode 114 and the pad terminals 148 and 149 are formed. Is applied and patterned to form a black matrix (BM) 155.

In this case, the light blocking film 155 is formed on the data line 115 and the gate line 113 except for the area of the pixel electrode 114 and the non-display area, and then the color filter 118 is formed by an electrodeposition process. This is to prevent the electrical generation of the metal wiring by the electrolytic solution in the process.

Next, the substrate 100 having the light shielding film 155 formed in an area except the pixel electrode 114 is immersed in an electrodeposition coating solution containing a pigment, a resin, and an electrolysis solution of a predetermined color to immerse the first color. In this case, the pixel electrode 114 is also used as an electrodeposition electrode that causes electrodeposition of the pigment. This process is repeated to form the red, green, and blue sub color filters 118.

After depositing the sub color filter 118, a method for protecting the surface of the color filter 118, a transparent such as an acrylic resin (resin) on the entire surface of the substrate on which the color filter is formed An organic insulating material is coated to form the color filter protective film 157.

FIG. 4E illustrates an island-shaped transparent electrode formed on the light blocking layer 155 and the color filter protective layer 157 by etching the non-display area to expose the gate pad terminal 148 and the data pad terminal 149. The process of exposing the connection wiring portions 113c and 115c on which the patterns 151 and 153 are formed is performed.                     

The color filter passivation layer 157 and the light blocking layer 155 are etched through dry etching. When the dry etching is performed, the pad terminals 148 and 149 of the upper portion of the gate pad 113b and the upper portion of the data pad 115b are exposed, and the etching of the upper portion of the gate connection line 113c and the upper portion of the data connection line 115c is performed. Protective films 151 and 153 are also exposed.

In addition, the color filter protective film between the pads and the connection wirings, the light emitting film 155, and the insulating film 121 under the etching are etched.

During the etching process, an etch process for etching the light blocking film (not shown) formed between the connection wirings 113c and 115c and the insulating layer under the etching process is performed by the etching prevention layers 151 and 153 formed on the connection wirings. The gate insulating film 121 and the protective film 123, which are insulating films on the connection wirings 113c and 115c, are protected.

In this process, the array substrate of the COT structure can be completed, and then, in order to bond the lower substrate with the upper substrate, the sealant is printed on the link portion (connection wiring portion) around the liquid crystal panel. At this time, the sealant (not shown) is formed to some extent in consideration of the gap of the liquid crystal panel.

Next, after printing the sealant (not shown), the top plate (not shown) is bonded.

Thereafter, the liquid crystal panel may be completed by injecting liquid crystal into the bonded liquid crystal panel and encapsulating the liquid crystal panel.

Advantages that can be obtained through the method of manufacturing a COT structure according to the present invention as described above are first, the resin forming the light-shielding film in the connection portion of the data wiring and the gate wiring to which the sealant, which is an adhesive for bonding to the upper substrate, is printed. By removing and improving the adhesive force of a sealant, leakage of a liquid crystal can be prevented.

Second, by removing the light blocking layer on the connection line, the cell gap between the non-display area and the display area printed with the sealant can be induced.

Therefore, there is an effect that can produce the reliable substrate.

Third, there is an effect that can greatly improve the yield of the product by the above features.

Claims (18)

A substrate defined by a display area and a non-display area; An active gate line formed on the substrate in one direction and passing through the display area, a gate pad positioned in the non-display area to receive a signal, and a gate connection line connecting the active gate line and the gate pad; A gate wiring composed of; Define a pixel area by crossing the gate line perpendicularly, and define an active data line passing through the display area, a data pad positioned in the non-display area to receive a signal, and connect the active data line to the data pad. A data wiring comprising a data connection wiring; A thin film transistor positioned at an intersection of the gate wiring and the data wiring and having a gate electrode, a source electrode, a drain electrode, and an active layer; A transparent pixel electrode in contact with the drain electrode and positioned on the pixel region; An etch stop layer formed on the gate connection line and the data connection line; Red, green, and blue sub-color filters on the pixel electrodes; A black matrix configured between the sub-color filters of the display area Array substrate for a liquid crystal display device comprising a. The method of claim 1, And a first insulating film interposed between the gate wiring and the data wiring. The method of claim 1, An array substrate for a liquid crystal display device having a first insulating film, a protective layer, and an etch stop layer stacked on the gate connection line. The method of claim 1, And an upper portion of the data connection line and a protective layer and an etch stop layer. The method of claim 1, The light blocking film is a carbon-based opaque resin array substrate for a liquid crystal display device. The method of claim 1, And the etch stop layer is formed of the same material as the transparent pixel electrode. The method of claim 6, The transparent pixel electrode is one of a transparent conductive group consisting of indium tin oxide (ITO) and indium zinc oxide (IZO). The method of claim 1, And the color filter is electrodeposited to the pixel electrode. Preparing a substrate defined by a display area and a non-display area; An active gate line formed on the substrate in one direction and passing through the display area, a gate pad positioned in the non-display area to receive a signal, and a gate connection line connecting the active gate line and the gate pad to each other; Forming a configured gate wiring; Define a pixel area crossing the gate line perpendicularly to the gate line, connect the active data line passing through the display area, a data pad positioned in the non-display area to receive a signal, and connect the active data line to the data pad. Forming a data line formed of a data connection line; Forming a thin film transistor positioned at an intersection of the gate wiring and the data wiring, the thin film transistor having a gate electrode, a source electrode, and a drain electrode; Forming a pixel electrode in contact with the drain electrode and positioned on the pixel region; Forming an etch stop layer on the gate connection line and the data connection line; Forming red, green, and blue sub-color filters on the pixel electrodes; A black matrix configured between the sub-color filters of the display area Array substrate manufacturing method for a liquid crystal display device comprising a. The method of claim 9, A method of manufacturing an array substrate for a liquid crystal display device, wherein first insulation is formed between the gate wiring and the data wiring. The method of claim 9, The first insulating layer is deposited or coated with an organic insulating material group consisting of a silicon oxide film and a silicon nitride film, and optionally one selected from an organic insulating material group consisting of benzocyclobutene and an acryl-based resin. Formed array substrate manufacturing method for a liquid crystal display device. The method of claim 9, And a first insulating layer, a protective layer, and an etch stop layer formed on the gate connection line. The method of claim 9. The protective layer is an organic insulating material group consisting of benzocyclobutene and acryl-based resin, and in some cases, an organic insulating material consisting of a silicon oxide film (SiO ₂ ) and a silicon nitride film (SiN _x ). A method of manufacturing an array substrate for a liquid crystal display device, which is formed as one selected from the group. The method of claim 9, And a protective layer and a transparent electrode pattern formed on an upper portion of the data connection line. The method of claim 9, The light shielding film is formed of a carbon-based opaque resin array substrate manufacturing method for a liquid crystal display device. The method of claim 9, And the etch stop layer is formed of the same material as the transparent pixel electrode. The method of claim 16, The transparent pixel electrode is formed by selecting one of a transparent conductive group consisting of indium tin oxide (ITO) and indium zinc oxide (IZO). The method of claim 9, And the color filter is electrodeposited to the pixel electrode.

Images