JPH0534717A - Liquid crystal display device and production thereof - Google Patents

Abstract

PURPOSE:To prevent the shorting of gate lines and drain lines by the dust and pinholes of an interlayer insulating layer by providing layers consisting of the same material as the material of display electrodes on the gate insulating film corresponding to the intersected parts of the gate lines and drain lines. CONSTITUTION:Plural pieces of the gate lines 12 provided on a transparent insulating substrate 10 and plural pieces of the drain lines 10d provided to intersect with the gate lines 12 as well as the switching transistors and display electrodes H provided in these plural intersected parts are provided. The layers HG, HR consisting of the same material as the material of the display electrodes H are provided on the upper layers of the gate insulating film 15 corresponding to the gate lines 12 intersecting with the drain lines 19d. Namely, the dust sticking to the intersected parts of the gate lines 12 and the drain lines 19 is not gouged and the pinholes are not formed if the ITO is provided at the intersected points of the gate lines 12 and the drain lines 19d at the time of forming the display electrodes H consisting of the ITO after forming the gate insulating film 15 over the entire surface and, therefore the short-circuiting is prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device,
In particular, it relates to a structure for preventing a short circuit between the gate line and the drain line due to dust or pinholes in the interlayer insulating layer.

[0002]

2. Description of the Related Art In general, liquid crystal display devices have been actively developed and mass-produced mainly for color TVs. A detailed explanation of these technological trends is “Flat Panel Display 1991” issued by Nikkei BP. Although liquid crystal display devices having various structures are disclosed therein, an active matrix liquid crystal display device using a TFT will be described below.

This active matrix liquid crystal display device has a structure as shown in FIG. 7, for example. First, there is a transparent insulating substrate, such as a glass substrate (51). On this glass substrate (51), a gate (52) and an auxiliary capacitance electrode (53), which are constituent elements of the TFT, are formed on the glass substrate (51), for example, Mo-
It is formed of Ta alloy or the like. Furthermore, SiNx is used on the entire surface
A film (54) made of is laminated. Then, the gate (5
On the SiNx film (54) corresponding to 2), an amorphous silicon film (55) and an N ⁺ -type amorphous film are formed.
A silicon film (56) is laminated, and a semiconductor protective film (57) is provided between the two layers of amorphous silicon films (55) and (56). Subsequently, a source electrode (58) and a drain electrode (59) are formed on the N ⁺ -type amorphous silicon film (56), for example, Mo.
And Al are laminated. Furthermore, on the SiNx film (54) corresponding to the auxiliary capacitance electrode (53),
A display electrode (60) made of, for example, ITO is provided and is electrically connected to the source electrode (58).

On the other hand, although not shown, a glass substrate is provided facing the glass substrate (51), and a counter electrode is provided on the glass substrate. Further, liquid crystal is injected between the pair of glass substrates to form a liquid crystal display device.

[0005]

[Problems to be Solved by the Invention] In the above constitution,
There is a problem that a pinhole is generated in the SiNx film (54) and the display electrode (60) contacts the auxiliary capacitance electrode (53) through the pinhole. Therefore, the SiN _x corresponding to this auxiliary capacitance electrode (53) is
In some cases, a layer made of the same material as the amorphous silicon film (55) and the N ⁺ type amorphous silicon film (56) is provided on the film (54) to improve the breakdown voltage.

Since this short circuit also occurs at the intersection of the gate line and the drain line, the two amorphous silicon films (55) and (56) are also laminated to improve the breakdown voltage. However, when the semiconductor protective film (57) made of the SiN _x film is etched, the auxiliary capacitance electrode (53) is
Silicon film (55) corresponding to the intersection
Are soaked in the etchant of the SiN _x film, the dust existing on the auxiliary capacitance electrode (53) and the intersection are cut out to form a pinhole, and the auxiliary capacitance electrode (53) and the N ⁺ -type amorphous silicon film (56) are formed. ), The display electrode (60), and the gate line and the drain line were short-circuited.

The liquid crystal display device has 300,000 to 1,000,000 pixels in recent years, and the number of pixels tends to increase more and more.
However, under such a situation, even one point defect is not tolerated, and even if only one pinhole is generated, it is a major factor of reduction in yield.

[0008]

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and a plurality of gate lines provided on a transparent insulating substrate and a plurality of gate lines provided crossing the gate lines. In a liquid crystal display device including a plurality of drain lines and switching transistors and display electrodes provided at the plurality of intersections, the display is provided on an upper layer of a gate insulating film corresponding to the gate lines intersecting the drain lines. The solution is to provide a layer of the same material as the electrode.

Further, a step of forming a first gate insulating layer so as to cover at least the gate formed on the transparent insulating substrate and the gate line integrated with the gate, and the step of forming the gate line and the gate A step of providing a display electrode in the vicinity of an intersection with a drain line of a TFT to be configured and at the same time providing a protective layer of the same material as the display electrode at the intersection, and a second gate insulating layer on the insulating substrate. A step of forming, a step of forming a non-single-crystal silicon film not doped with impurities in the active region of the TFT and the intersection, and a semiconductor protective layer between the source region and the drain region of the TFT and at the intersection. Forming step, and the T
Forming an impurity-doped non-single-crystal silicon film on the source region, drain region, and intersection of the FT;
The problem is solved by including at least a step of forming electrodes in the source region and a part of the display electrode, and in the formation region of the drain region and the drain line.

[0010]

After the gate insulating film (15) is formed on the entire surface, I
If this ITO is provided at the intersection of the gate line (12) and the drain line (19d) when the display electrode H made of TO is formed, dust adhering to this intersection will not be hollowed out and a pinhole will not be formed. Short circuit can be prevented.

For example, the etchant of SiNx, which is a gate insulating film, or the etchant of an amorphous silicon film is more or less etchable with respect to silicon, but ITO is not etched. Therefore, as long as the film completely covers the dust, the dust cannot be cut out.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure of the present invention will be described below with reference to FIGS. Incidentally, FIG. 6 is a line A-A and a line B of FIG.
Similar to the cross-sectional view corresponding to the line -B, FIG. 1 shows one cell including two TFTs connected to one display electrode. First, a gate (11) formed on a transparent insulating substrate (10), and this gate (11)
A plurality of gate lines (12) formed integrally with
The auxiliary capacitance electrode (13) formed apart from the gate line (12), and the auxiliary capacitance line (14) formed integrally with the auxiliary capacitance electrode (13), and substantially the insulating substrate ( Insulating layer (1) formed on the entire surface of (10)
There is 5).

The transparent insulating substrate (10) is, for example, a glass.
It consists of On the glass substrate (10), a chain line
Like the gate (11) and this gate (11)
The gate line (12) extends up and down with respect to the plane of FIG.
The width of the TFT formation region is slightly narrower.
It In addition, the auxiliary capacitance electrode (13) indicated by the chain line and
Auxiliary capacitance line (1
4) is provided, and H of H is formed in the lower layer of the display electrode region described later.
It is formed in the shape of a letter, and is installed above and below the paper surface of FIG.
In order to connect to the adjacent
A storage capacity line (14) is provided. Also, both
For example, made of Cr, Ta, TaMo and C
It may be r-Cu (containing a trace amount of Fe) or the like. Gate
The terminals and auxiliary capacitance terminals are made of ITO, for example, and
Provided around the lath substrate (10) and considered as the final structure
Then, these are electrically connected to each other. See you
Gate (11), gate line (12), auxiliary capacitance electrode
A first gate covering (13) and the auxiliary capacitance line (14).
There is a gate insulating film (15). This film is plasma CVD
It is a SiNx film formed by the method. Here, SiNx
SiO instead of a film₂You can use a membrane or both
The film may have two layers. In addition, SiNx film and SiO ₂The membrane
When used alone, the film formation process is divided into two steps, with a two-layer structure.
You may.

Next, as shown by the solid line in FIG. 1, a display electrode H made of ITO is provided, and at the intersection of the gate line (12) and a drain line described later, and the auxiliary capacitance line (14) and this drain line. Layers H _G and H _Y made of the same material as the display electrode H are provided. This intersection is indicated by the dotted line in FIG. Here, the layers H _G and H _Y made of the same material as the display electrode H are the features that characterize the present invention. Since ITO is provided at the intersection, dust existing at the intersection can be covered. Therefore, at the time of etching the amorphous silicon film or the semiconductor protective film, since the layers H _G and H _Y already exist, dust is not cut out and pinholes are not generated.

Next, the second gate insulating film (15 ') formed on the entire surface of the insulating substrate (10) and the gate (1).
The first non-single-crystal silicon layer (16) sequentially laminated at the intersection of the active region of the TFT, the gate line (12) and the drain line, and the auxiliary capacitance line (14) and the drain line of which 1) is one configuration. , (16G), (16Y), semiconductor protective films (17), (17G), and second non-single-crystal silicon layers (18), (18G), (18Y), and a second region corresponding to the source region. Non-single crystal silicon film (1
8) a conductive film (19) electrically connected with the second non-single-crystal silicon film (18) corresponding to the drain region.
Conductive film (19d) connecting the drain line (20) with the drain line (20)
There is.

A second gate insulating film (1
5 ') on top of the amorphous silicon active layer (a-S
An i-layer) (16) and an amorphous silicon contact layer (N ⁺ a-Si layer) (18) are laminated, and between the a-Si layer (16) and the N ⁺ a-Si layer corresponding to the channel. , A semiconductor protective film (17) made of SiNx is provided. In addition, these three layers (16), (17), (1
A layer of the same material as 8) is provided at the intersection. Therefore, at this intersection, three layers (1
Since ITO is provided in addition to 6), (17) and (18) and the second gate insulating film (15 ') is included to form five layers, a short circuit can be prevented more than in the conventional case.

Further, the drain electrode is a drain line (1
9), the source electrode is in contact with the display electrode H via the contact (20), and both are made of the same material. Here, for example, Mo and Al are laminated. Although not shown below, an alignment film made of, for example, polyimide is provided in the upper layer. On the other hand, a counter glass substrate which is paired with the glass substrate (10) is provided,
On this counter glass substrate, a light shielding film is provided at a position corresponding to the TFT, and a counter electrode is provided. Furthermore, the above-mentioned alignment film is provided.

Further, a spacer is provided between the pair of glass substrates, the periphery is sealed with a sealing material, and liquid crystal is injected through the injection hole to obtain the present device. Next, a method for manufacturing the device will be described. First, an insulating substrate (10) that transmits light is prepared and washed. Next, the insulating substrate (1
0) Cover the entire surface with ITO or metal, which is a terminal material,
The gate terminal, the drain terminal, the auxiliary capacitance terminal and the like are formed by an etching method.

Next, the gate (11) and the gate line (1
2), auxiliary capacitance electrode (13) and auxiliary capacitance line (1
4) etc. are formed. Here, as a gate material, a Cr film is about 500 Å and about 150% containing about 1% Fe.
It is formed by a sputtering method using a Cu film of 0Å. The process up to this point is shown in FIG. Subsequently, as shown in FIG. 3, a first gate insulating film (15) made of SiN _x is formed on the entire surface, ITO is deposited on the entire surface, and the display electrode H and a protective layer provided at the intersection are formed by etching. H _G, to form a H _Y.

This step is a characteristic step of the present invention, and is characterized in that ITO is formed immediately after forming the first gate insulating film (15). Prior to forming the ITO, the debris (30) has its head exposed or completely covered, as in FIG. In this state, if the gate insulating film (15) is subjected to an etching process for etching as much as possible, the surface may be etched and dust may be hollowed out to form pinholes. But,
In this process, since ITO protects this etching,
Further, since the etchants (16), (17), (18) and (19) formed in the upper layer are hardly etched, the formation of pinholes is completely eliminated.

Subsequently, as shown in FIG. 4, a second gate insulating film (15 ') made of SiN _x is formed, and as shown in FIG. 5, an a-Si layer (16) and SiN _x are continuously formed. Subsequently, the upper layer SiN _x is etched to provide the semiconductor protective film (17), the intersection of the gate line (12) and the drain line (19) and the intersection of the auxiliary capacitance line (14) and the drain line (19). Layer 17G, 1
7Y is formed. Subsequently, an N ⁺ a-Si layer is deposited on the entire surface, and an active region of the TFT (shown by a chain double-dashed line in FIG. 1) and the intersection (shown by a solid line in FIG. 1) are formed by etching. . The process up to this point is shown in FIG.

Finally, as shown in FIG. 6, the second electrode on the display electrode H is
A part of the gate insulating film (15 ') is etched to form a contact (20), a conductive material is deposited on the entire surface, a source electrode (19), a drain electrode and a drain line (19d) integrated therewith. Are formed by etching.
Furthermore, using the source electrode and the drain electrode as a mask, N ⁺ a
Etch the Si layer.

Although not shown, an alignment film or the like is provided on the main substrate, and liquid crystal is injected between the counter electrode and the counter substrate of the light shielding film and the main substrate to complete the process.

[0024]

As is apparent from the above description, the first effect is that since the layer of the same material as that of the display electrode is provided on the first gate insulating film corresponding to the intersection, dust is generated at the intersection. Even if there is, this dust is not hollowed out by etching of amorphous silicon or SiN _x provided in the upper layer, and pinhole formation can be prevented. Therefore, a short circuit at the intersection of the gate line and the drain line can be prevented.

The second effect is that the second gate insulating film on the display electrode is also provided at this intersection, so that withstand voltage and short circuit can be prevented similarly to ITO. The third effect is that amorphous silicon or IT is formed under the drain line at the intersection.
Since it has O, even if a drain line is broken at this intersection, it is electrically connected through these layers, and since it has redundancy, the yield can be improved.

[Brief description of drawings]

FIG. 1 is a plan view of a liquid crystal display device of the present invention.

FIG. 2 is a cross-sectional view showing the manufacturing method of the present invention.

FIG. 3 is a cross-sectional view showing the manufacturing method of the present invention.

FIG. 4 is a cross-sectional view showing the manufacturing method of the present invention.

FIG. 5 is a cross-sectional view showing the manufacturing method of the present invention.

FIG. 6 is a cross-sectional view showing the manufacturing method of the present invention.

FIG. 7 is a cross-sectional view of a conventional liquid crystal display device.

[Explanation of symbols]

(10) Glass substrate (11) Gate (13) Storage capacitor electrode (15) SiNx film (16) a-Si layer (17) Semiconductor protective film (18) N ⁺ a-Si layer (19d) Drain line

Claims (4)

[Claims] 1. A plurality of gate lines provided on a transparent insulating substrate, a plurality of drain lines provided so as to intersect the gate lines, and a switching transistor provided at the plurality of intersections. A liquid crystal display device comprising: and a display electrode, wherein a layer of the same material as that of the display electrode is provided on an upper layer of a gate insulating film corresponding to the gate line intersecting with the drain line. 2. The liquid crystal display device according to claim 1, wherein a layer made of the same material as that of the insulating layer covered by the upper layer of the display electrode is provided above the layer made of the same material as that of the display electrode. 3. A gate formed on a transparent insulating substrate, a gate line electrically integrated with the gate, and a first gate insulating layer formed substantially on the entire surface of the insulating substrate. The same as the display electrode provided in the upper layer of the first gate insulating layer in the vicinity of the gate, and the display electrode provided in the intersecting region of the gate and the drain line of the TFT which constitutes the gate. An insulating layer protective film made of the above-mentioned material, a second gate insulating layer formed substantially on the entire surface of the insulating substrate, and an impurity formed in the active region of the TFT and the intersection portion are not doped. A non-single crystal silicon film, a semiconductor protective film provided between the source region and the drain region of the TFT and at the intersection, and a semiconductor protection film provided at the source region, the drain region and the intersection of the TFT. And the impurity-doped non-single crystal silicon film, wherein the display electrode and the source region, the liquid crystal display device; and a the extended electrode to the drain region and the drain line. 4. A gate formed on a transparent insulating substrate, a step of forming a first gate insulating layer so as to cover at least the gate line integrated with the gate, and the gate line and the gate being one structure. A step of providing a display electrode in the vicinity of an intersection with a drain line of a TFT to be formed, and at the same time providing a protective layer of the same material as the display electrode in the intersection, and forming a second gate insulating layer on the insulating substrate. A step of forming a non-single-crystal silicon film not doped with impurities in the active region of the TFT and the intersection, and forming a semiconductor protective layer between the source region and the drain region of the TFT and at the intersection. And a step of forming an impurity-doped non-single-crystal silicon film at a source region, a drain region, and an intersection of the TFT, the source region and the A method of manufacturing a liquid crystal display device, comprising at least a step of forming an electrode on a part of a display electrode, the drain region and a drain line formation region.