KR100642753B1 - image sensor - Google Patents

Abstract

An image sensor is provided. The image sensor may be formed in a semiconductor substrate to generate and accumulate charges corresponding to incident light, a first charge transfer unit configured to transfer accumulated charges to the charge detector, and to discharge excess charges generated by the photoelectric converters to the outside. An overflow drain region and an excess charge are transferred to the overflow drain region, and the second charge transfer unit has a width that is 1/2 or more of one side of the photoelectric conversion unit.

Image sensor, single frame capture mode, overflow drain area

Description

Image sensor

1 is a block diagram of an image sensor according to an exemplary embodiment.

2 is a circuit diagram of a unit pixel of an image sensor according to an exemplary embodiment.

3 is a schematic plan view of a unit pixel of an image sensor according to an exemplary embodiment.

4 is a cross-sectional view taken along line IV-IV 'of FIG. 3.

5 is a cross-sectional view of a unit pixel of an image sensor according to another exemplary embodiment of the present invention.

6 is a cross-sectional view of a unit pixel of an image sensor according to another exemplary embodiment of the present invention.

7 and 8 are cross-sectional views of unit pixels of an image sensor according to another exemplary embodiment of the present invention.

9 and 10 are cross-sectional views of unit pixels of an image sensor according to another exemplary embodiment of the present invention.

11 is a circuit diagram of an image sensor according to another embodiment of the present invention.

12 is a schematic plan view of an image sensor according to another embodiment of the present invention.

FIG. 13 is a cross-sectional view taken along line XIII-XIII ′ of FIG. 12.

14 and 15 are schematic plan views illustrating an image sensor according to another exemplary embodiment of the present invention.

16 is a timing diagram of an image sensor according to an embodiment of the present invention.

17 is a diagram illustrating a conceptual diagram and a potential diagram of an image sensor according to an exemplary embodiment of the present invention.

 (Explanation of symbols for the main parts of the drawing)

1: image sensor 10: pixel array

20: timing generator 30: low decoder

40: low driver 50: correlated double sampler

60: analog-to-digital converter 70: latch portion

80: column decoder 100: unit pixel

110: photoelectric conversion unit 120: charge detection unit

130: first charge transfer unit 140: reset unit

150: amplification unit 160: selection unit

170: second charge transfer unit 180: overflow drain region

The present invention relates to an image sensor, and more particularly to an image sensor with improved image reproduction characteristics.

An image sensor is an element that converts an optical image into an electrical signal. Recently, with the development of the computer industry and the communication industry, the demand for improved image sensors in various fields such as digital cameras, camcorders, personal communication systems (PCS), gaming devices, security cameras, medical micro cameras, robots, etc. is increasing. have.

The image sensor includes a pixel array unit in which unit pixels, which photoelectrically convert incident light and provide an electric signal, are arranged in a matrix form, and a peripheral circuit unit which controls the unit pixel or processes an electric signal of the unit pixel. The peripheral circuit unit processes the optical image input to the pixel array unit in various ways. For example, there is a rolling shutter mode for processing a moving image and a single frame capture mode (SFCM) for processing a still image.

In the rolling shutter mode, since an optical image input in real time to the pixel array unit is sequentially read in units of rows, each row of the pixel array unit is exposed at different moments. In contrast, the single frame capture mode transfers an optical image input through an electrical shutter operation to the charge detector of the pixel array unit at the same time, and reads the signal stored in the charge detector in units of rows.

However, when very high illuminance light is continuously incident in the single frame capture mode, the excess charge generated in the photoelectric converter overflows the charge detector and distorts the image. In particular, since the excess charge that overflows during readout on a row-by-row basis increases, image distortion, for example, due to a difference in readout time between the first row and the last row is severe.

In the case of a plurality of unit pixels sharing the charge detection unit, the use time of the charge detection unit is divided by time. Accordingly, a difference in readout time occurs between unit pixels sharing the charge detector, and in this case, image distortion due to time difference between the unit pixels is likely to occur.

An object of the present invention is to provide an image sensor with improved image reproduction characteristics.

Technical problems of the present invention are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

The image sensor according to an embodiment of the present invention for achieving the above technical problem is a photoelectric conversion unit for generating and accumulating charges corresponding to incident light, the first charge transfer to transfer the accumulated charges to the charge detection unit And an overflow drain region for discharging excess charge generated by the photoelectric converter to the outside, and a second charge transfer unit having an excess charge of 1/2 or more of one side of the photoelectric converter. do.

According to another aspect of the present invention, an image sensor includes a pixel array in which a plurality of unit pixels are two-dimensionally arranged, and each unit pixel is formed in a semiconductor substrate to provide charge corresponding to incident light. A photoelectric conversion unit to generate and accumulate, a first charge transfer unit to transfer the accumulated charges to the charge detection unit, an overflow drain region for discharging excess charge generated in the photoelectric conversion unit to the outside, and excess charge to the overflow drain region And a second charge transfer unit having a width greater than 1/2 of one side of the photoelectric conversion unit, and the plurality of photoelectric conversion units share the overflow drain region through each second charge transfer unit.

Other specific details of the invention are included in the detailed description and drawings.

Advantages and features of the present invention, and methods of achieving the same will become apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms, and only the present embodiments are intended to complete the disclosure of the present invention, and the general knowledge in the art to which the present invention pertains. It is provided to fully convey the scope of the invention to those skilled in the art, and the present invention is defined only by the scope of the claims. Thus, well-known device structures and well-known techniques in some embodiments are not described in detail in order to avoid obscuring the present invention. Furthermore, n-type or p-type is exemplary, and each embodiment described and illustrated herein also includes its complementary embodiment. Like reference numerals refer to like elements throughout.

An image sensor according to embodiments of the present invention includes a charge coupled device (CCD) and a CMOS image sensor. Here, the CCD has less noise and better image quality than the CMOS image sensor, but requires a high voltage and a high process cost. CMOS image sensors are simple to drive and can be implemented in a variety of scanning methods. In addition, since the signal processing circuit can be integrated on a single chip, the product can be miniaturized, and the CMOS process technology can be used interchangeably to reduce the manufacturing cost. Its low power consumption makes it easy to apply to products with limited battery capacity. Therefore, hereinafter, a CMOS image sensor will be described as an image sensor of the present invention. However, the technical idea of the present invention can be applied to the CCD as it is.

An image sensor according to embodiments of the present invention may be well understood by referring to FIGS. 1 to 17.

1 is a block diagram of an image sensor according to an exemplary embodiment.

Referring to FIG. 1, an image sensor 1 according to an exemplary embodiment of the present invention may include a pixel array unit 10, a timing generator 20, a row decoder 30, and a row driver. 40), a correlated double sampler (CDS) 50, an analog to digital converter (ADC) 60, a latch 70, a column decoder 80, and the like. do.

The pixel array unit 10 includes a plurality of unit pixels arranged in two dimensions. A plurality of unit pixels serve to convert an optical image into an electrical signal. The pixel array unit 10 is driven by receiving a plurality of driving signals such as a pixel selection signal ROW, a reset signal RST, and first and second charge transfer signals TG1 and TG2 from the row driver 40. The converted electrical signal is also provided to the correlated double sampler 50 via a vertical signal line.

The timing generator 20 provides a timing signal and a control signal to the row decoder 30 and the column decoder 80.

The row driver 40 provides the pixel array unit 10 with a plurality of driving signals for driving the plurality of unit pixels according to a result decoded by the row decoder 30. In general, when unit pixels are arranged in a matrix form, a driving signal is provided for each row.

The correlated double sampler 50 receives, holds, and samples an electrical signal formed in the pixel array unit 10 through a vertical signal line. That is, a specific reference voltage level (hereinafter referred to as "noise level") and a voltage level (hereinafter referred to as "signal level") by the formed electrical signal are sampled twice, corresponding to the difference between the noise level and the signal level. Output the difference level.

The analog-to-digital converter 60 converts an analog signal corresponding to the difference level into a digital signal and outputs the digital signal.

The latch unit 70 latches the digital signal, and the latched signal is sequentially output from the column decoder 80 to the image signal processor (not shown) according to the decoding result.

2 is a circuit diagram of a unit pixel of an image sensor according to an exemplary embodiment. 3 is a schematic plan view of a unit pixel of an image sensor according to an exemplary embodiment of the present invention. 4 is a cross-sectional view taken along line IV-IV 'of FIG. 3.

2 and 3, the unit pixel 100 of the image sensor according to an exemplary embodiment may include a photoelectric converter 110, a charge detector 120, a first charge transmitter 130, and a reset unit. 140, an amplifier 150, a selector 160, and a second charge transfer unit 170.

The photoelectric conversion unit 110 generates and accumulates charges corresponding to incident light. The photoelectric converter 110 may be a photo diode, a photo transistor, a photo gate, a pinned photo diode (PPD), and a combination thereof.

As the charge detector 120, a floating diffusion region (FD) is mainly used, and the charge accumulated in the photoelectric converter 110 is received. Since the charge detector 120 has a parasitic capacitance, charges are accumulated cumulatively. The charge detector 120 is electrically connected to the gate of the amplifier 150 to control the amplifier 150.

The first charge transfer unit 130 transfers the charges from the photoelectric conversion unit 110 to the charge detection unit 120. The first charge transfer unit 130 generally includes one transistor and is controlled by the first charge transfer signal TG1.

The reset unit 140 periodically resets the charge detector 120. The source of the reset unit 140 is connected to the charge detector 120 and the drain is connected to Vdd. It is also driven in response to the reset signal RST.

The amplifier 150 serves as a source follower buffer amplifier in combination with a constant current source (not shown) located outside the unit pixel 100, and changes in response to the voltage of the charge detector 120. The voltage is output to the vertical signal line 162. The source is connected to the drain of the selector 160 and the drain is connected to Vdd.

The selector 160 selects the unit pixel 100 to be read in units of rows. Driven in response to the select signal ROW, the source is coupled to a vertical signal line 162.

The second charge transfer unit 170 transfers the excess charge generated by the photoelectric conversion unit 110 to the overflow drain region 180. The second charge transfer unit 170 may be a MOS transistor whose gate is controlled by the second charge transfer signal TG2, a source is connected to the photoelectric conversion unit 110, and a drain is connected to a positive voltage. Here, the second charge transfer signal TG2 may be a predetermined positive voltage or a clock signal that becomes a high level after the first charge transfer signal TG1 changes from a high level to a low level (high-to-low transition). Can be. However, the second charge transfer signal TG2 may be controlled such that the potential barrier peak of the second charge transfer unit 170 is lower than the potential barrier peak of the first charge transfer unit 130. Before the excess charge generated in the photoelectric conversion unit 110 overflows to the charge detection unit 120 through the first charge transfer unit 130, it passes through the second charge transfer unit 170 to the overflow drain region 180. To be discharged.

In particular, the second charge transfer unit 170 is formed adjacent to one side L of the photoelectric conversion unit 110, and the width W of the second charge transfer unit 170 is one side of the photoelectric conversion unit 110. It may be substantially the same as (L). As the width W of the second charge transfer unit 170 increases, a region through which excess charge can pass increases, so that drain characteristics may be improved.

Therefore, in the unit pixel 100 of the image sensor according to the exemplary embodiment of the present invention, when light having a very high illuminance is continuously incident in the single frame capture mode, the excess charge generated in the photoelectric converter 110 may be charged. Overflow to 120 prevents distortion of the image. In addition, blooming may be prevented due to excessive charge.

In addition, the driving signal lines 131, 141, 161, and 171 of the first charge transfer unit 130, the reset unit 140, the selector 160, and the second charge transfer unit 170 are included in the same row. The unit pixels are formed to extend in a row direction (horizontal direction) so as to be driven simultaneously.

Referring to FIG. 4, a unit pixel 100 of an image sensor according to an exemplary embodiment may include a semiconductor substrate 102, an isolation region 106, a photoelectric conversion unit 110, a charge detection unit 120, and a second pixel. The first charge transfer unit 130, the second charge transfer unit 170, and the overflow drain region 180 are included. The photoelectric conversion unit 110 uses a pinned photo diode (PPD) as an example for convenience of description.

The semiconductor substrate 102 mainly uses a P-type substrate, and an active region and an element isolation region are formed. Although not shown in the drawings, a P-type epitaxial layer is grown on the semiconductor substrate 102 or a separate well region is formed to form a photoelectric conversion unit on the P-type epi layer and / or well region. 110, first and second charge transfer units 130 and 170 may be formed.

The device isolation region 106 defines an active region on the semiconductor substrate 102 and may be, for example, Field Oxide (FOX) or Shallow Trench Isolation (STI) using a LOCOS (LOCal Oxidation of Silicon) method.

The photoelectric converter 110 accumulates electric charges generated by absorbing light energy, and includes an N-type photodiode 112 and a P ⁺ type pinning layer 114. In general, the photodiode 112 and the pinning layer 114 are formed through two different ion implantation processes. That is, first, the photodiode 112 is formed by ion implanting N dopants deeper than the surrounding source and drain, and implanting P ⁺ dopant on the photodiode 112 using low energy and high dose. The pinning layer 114 is formed. Of course, the concentration and location of the doping may vary depending on the manufacturing process and design, so is not limited thereto.

In the image sensor, the dark current may be a surface damage of the photodiode 112. Surface damage may be mainly due to the formation of dangling silicon bonds, or may be caused by defects associated with etching stresses during the manufacturing process of gates, spacers, and the like. . Therefore, by forming the photodiode 112 deep inside the semiconductor substrate 102 and forming the pinning layer 114, it is possible to prevent the generation of such dark current and to facilitate the transfer of charge generated by the light energy. have.

The charge detector 120 receives the charge accumulated in the photoelectric converter 110 through the charge transfer unit 130 and is mainly formed by ion implantation of N ⁺ dopant.

The first charge transfer unit 130 may use a depletion type transistor to prevent overflow and blooming in the photoelectric conversion unit 110 that may occur when excessive light energy is irradiated.

Since the channel is formed even when the charge transfer unit 130 using the depletion transistor is inactive, the charge detection unit 120 may be formed through the first charge transfer unit 130 when a predetermined amount or more of the charges are generated in the photoelectric conversion unit 110. To let some of the charge out. The N ⁻ ion implantation region 130D under the first charge transfer unit 130 serves as such a channel.

However, such a depletion transistor may serve to prevent overflow and blooming in other modes such as a rolling shutter mode. However, in the single frame capture mode, the excess charge generated in the photoelectric conversion part overflows to the charge detection part, thereby causing an image. It is easy to cause distortion.

In the single frame capture mode, the second charge transfer unit 170 discharges the excess charge to the overflow drain region 180 before overflowing through the first charge transfer unit 130. Accordingly, the second charge transfer signal TG2 may be adjusted so that the potential barrier peak of the second charge transfer unit 170 is lower than the potential barrier peak of the first charge transfer unit 130.

The second charge transfer unit 170 includes a gate electrode connected to the second charge transfer signal TG2, a MOS transistor including a source / drain region electrically connected to the photoelectric conversion unit 110 and the overflow drain region 180, respectively. Can be. As described above, the second charge transfer signal TG2 may be a predetermined positive voltage, and the first charge transfer signal TG1 becomes a high level after a high-to-low transition from a high level to a low level. It may be a clock signal as well.

In addition, the second charge transfer unit 170 may further include an ion implantation region 170D formed under the gate electrode. Here, the ion implantation region 170D is formed by ion implanting an N-type dopant, a P-type dopant, or a combination thereof. That is, as shown in FIG. 4, in the case of N ⁻ type, the potential barrier is lowered. In the case of P ⁺ type, the potential barrier is increased. Therefore, the conductivity type of the ion implantation region 170D may be determined in consideration of the voltage level of the second charge transfer signal TG2 applied to the gate electrode.

The overflow drain region 180 discharges the excess charge transferred through the second charge transfer unit 170 to the outside. Therefore, the overflow drain region 180 may be electrically connected to a predetermined positive voltage such as the power supply voltage Vdd.

5 is a cross-sectional view of a unit pixel of an image sensor according to another exemplary embodiment of the present invention. 6 is a cross-sectional view of a unit pixel of an image sensor according to another exemplary embodiment of the present invention. The same reference numerals are used for the components substantially the same as in FIG. 4, and a detailed description of the components will be omitted.

The second charge transfer unit 171 of the unit pixel 101 according to another exemplary embodiment of FIG. 5 may be an ion implantation region formed between the photoelectric converter 110 and the overflow drain region 180. . Even without a separate MOS transistor, the potential barrier can be adjusted according to the ion implantation concentration.

The second charge transfer unit 172 of the unit pixel 102 according to another exemplary embodiment of FIG. 6 may be a recessed MOS transistor. As the resolution increases, a plurality of unit pixels are formed in a narrow area. Therefore, the size of the MOS transistor used in the unit pixel also becomes smaller. In this case, the channel length gradually decreases so that the depletion region of the source / drain region penetrates into the channel, resulting in a short channel effect in which the effective channel length is reduced and the threshold voltage is reduced. In addition, when a high voltage is applied to the short channel MOS transistor, hot carriers may penetrate into the oxide layer. In order to solve this problem, in another embodiment of the present invention, by forming a gate in the semiconductor substrate 102, a trench transistor having a bulk channel can be used.

7 and 8 are cross-sectional views of unit pixels of an image sensor according to another exemplary embodiment of the present invention. The same reference numerals are used for constituent elements that are substantially the same as in FIG. 3, and a detailed description of the corresponding constituent elements will be omitted.

The second charge transfer unit 173 of the unit pixel 103 according to the exemplary embodiment of FIG. 7 is formed adjacent to one side L of the photoelectric conversion unit 110, and the width W is photoelectric. It is preferable that it is 1/2 or more of a conversion part. The larger the width W of the second charge transfer unit 173 is, the larger the area through which excess charge can pass, so that drain characteristics may be improved.

In the unit pixel 104 according to the exemplary embodiment of FIG. 8, the second charge transfer unit 174 is formed adjacent to at least one side of the photoelectric conversion unit 110. For example, it may be formed adjacent to two adjacent sides as shown in FIG. As the second charge transfer unit 174 is formed on a plurality of surfaces of the photoelectric conversion unit 110, drain characteristics may be improved. However, in consideration of the fill factor, it is necessary to consider the area and width in which the second charge transfer unit 174 is to be formed.

9 and 10 are cross-sectional views of unit pixels of an image sensor according to another exemplary embodiment of the present invention. The same reference numerals are used for constituent elements that are substantially the same as in FIG. 3, and a detailed description of the corresponding constituent elements will be omitted.

The second charge transfer unit 175 of the unit pixel 105 according to another exemplary embodiment of FIG. 9 includes a plurality of sub second charge transfer units 175a, 175b, and 175c. Here, the plurality of sub second charge transfer units 175a, 175b, and 175c are formed adjacent to one side L of the photoelectric converter 110, and the full width W1 + W2 + W3 is the photoelectric converter 110. It may be 1/2 or more of one side (L) of. In addition, as shown in FIG. 9, it may be substantially the same as one side L of the photoelectric conversion unit 110.

The second charge transfer unit 176 of the unit pixel 106 according to another exemplary embodiment of FIG. 10 includes a plurality of sub second charge transfer units 176a and 176b. Here, the plurality of sub second charge transfer units 176a and 176b are formed adjacent to two sides of the photoelectric conversion unit 110, and the full width W4 + W5 is formed on one side L of the photoelectric conversion unit 110. It may be 1/2 or more.

11 is a circuit diagram of an image sensor according to another embodiment of the present invention. 12 is a schematic plan view of an image sensor according to another embodiment of the present invention. FIG. 13 is a cross-sectional view taken along line XIII-XIII ′ of FIG. 12.

11 and 13, an image sensor according to another exemplary embodiment includes a pixel array unit (see 10 of FIG. 1) in which a plurality of unit pixels 200 and 205 are two-dimensionally arranged. . Here, the unit pixels 200 and 205 are substantially the same as the unit pixel 100 of the image sensor according to the exemplary embodiment of the present invention. That is, the unit pixels 200 and 205 are formed in the semiconductor substrate 202 to transfer and accumulate the accumulated charges to the charge detectors 220 and 225. And first charge transfer units 230 and 235. In particular, the unit pixels 200 and 205 share the overflow drain region 280 that discharges excess charge generated by the photoelectric converters 210 and 215 to the outside. Therefore, the region between the photoelectric converters 210 and 215 is not separated into the device isolation region 206, but becomes an active region in which the second charge transfer units 270 and 275 and the overflow drain region 280 are formed.

The second charge transfer units 270 and 275 may be formed adjacent to at least one side of the photoelectric converters 210 and 215. In addition, the second charge transfer units 270 and 275 may be 1/2 or more of one side of the photoelectric converters 210 and 215. As shown in FIG. 12, it may be substantially the same as one side of the photoelectric converters 210 and 215.

Here, the second charge transfer units 270 and 275 may include a gate electrode connected to the second charge transfer signal TG2, a source / drain electrically connected to the photoelectric conversion units 210 and 215, and the overflow drain region 280, respectively. It may be a MOS transistor including a region. In addition, the ion implantation regions 270D and 275D may be further formed under the gate electrode. The potential barrier may be adjusted by the voltage level of the second charge transfer signal TG2 applied to the gate electrode and the ion implantation concentrations of the ion implantation regions 270D and 275D.

Although not shown in the drawings, it is apparent to those skilled in the art that the overflow drain region may be shared even in the unit pixel of the image sensor described with reference to FIGS. 5 to 10.

14 and 15 are schematic plan views illustrating an image sensor according to another exemplary embodiment of the present invention.

FIG. 14 illustrates that in the image sensor according to another exemplary embodiment, the plurality of unit pixels, for example, four unit pixels 200a, 200b, 200c, and 200d share the charge detector 220. Here, each of the unit pixels 200a, 200b, 200c, and 200d time-divisions the use time by controlling whether each of the first charge transfer units 230a, 230b, 230c, and 230d is turned on, so that the common charge detector 220 may be divided. It becomes usable. Conventionally, for example, when used in order of reference numerals 200a, 200b, 200c, and 200d, the photoelectric conversion unit 210a of the unit pixel 200d is read out while the unit pixel 200a is read out. More charge can be generated. Therefore, image distortion due to time difference is likely to occur. In another embodiment of the present invention, adjacent unit pixels 200a and 205a share the overflow drain region 280 through the second charge transfer units 270a and 275a. Therefore, it is possible to reduce image distortion due to such a lead-out time difference. As illustrated in FIG. 14, the image sensor according to another exemplary embodiment shares the overflow drain region 280 between the other unit pixels 200a and 205a which do not share the charge detector 220, but is not limited thereto. All. That is, although not shown in the drawings, it is apparent to those skilled in the art that the overflow drain region may be shared, as is the unit pixel of the image sensor described with reference to FIGS. 5 to 10.

FIG. 15 illustrates that in the image sensor according to another exemplary embodiment, two unit pixels 201a and 201b share a charge detector 221 in common. Here, each of the unit pixels 201a and 201b time-divisions the use time by controlling whether each of the first charge transfer units 231a and 231b is turned on. Here, in another embodiment of the present invention, adjacent unit pixels 201a and 206a share the overflow drain region 281 through the second charge transfer units 271a and 276a.

16 is a timing diagram of an image sensor according to an embodiment of the present invention. 17 is a diagram illustrating a conceptual diagram and a potential diagram of an image sensor according to an exemplary embodiment of the present invention. Here, the potential level before the operation is indicated by a dotted line, and the potential level after the operation is indicated by a solid line. Potential degree is a downward direction of the potential increase.

Referring to FIGS. 16 and 17, an operation of an image sensor using the photoelectric converter 110 as a pinned photo diode will be described. In general, all the unit pixels located in the pixel array unit (see 10 of FIG. 1) commonly integrate charges. Here, the first and second charge transfer signals TG1 and TG2 are signals common to the unit pixels positioned in all rows of the pixel array unit. In addition, in the exemplary embodiment of the present invention, the second charge transfer signal TG2 is an example in which a predetermined positive voltage is applied. On the other hand, the reset signal RST and the pixel selection signal ROW are signals common to the unit pixels located in a specific row of the pixel array unit 10. In other words, the unit pixels positioned in a specific row are provided with a unique reset signal RST and a pixel selection signal ROW.

The pixel array section 10 is composed of N rows, and each row includes the ROW (1),... … , ROW (i), ROW (i + 1),... … , ROW (N) is read sequentially. In addition, for convenience of explanation, the description will be made mainly on ROW (i). As described above, the pixel selection signal ROW, the reset signal RST, and the first and second charge transfer signals TG1 and TG2 are controlled by a timing generator (see 20 in FIG. 1) (40 in FIG. 1). Reference) is provided to the pixel array unit 10. The pixel array unit 10 receives such a plurality of signals ROW, RST, TG1, and TG2 to accumulate charge, transfer the accumulated charge to the charge detector 120 at the same time, and charge The noise level and the signal level are double sampled by the detector 120.

Before the time t1, the i th row is moved outward through the vertical signal line 162, one line at a time, before the image frame stored in the charge detector 120 while the pixel select signal ROW (i) is high. Is provided. After that, the reset signal RST becomes high, and the charge detector 120 is reset.

At time t1, a different offset level, ie a noise level, is read out through the vertical signal line 162 for each pixel. Although not shown in the figure, the noise level on the vertical signal line 162 is held in the correlated double sampler (see 50 in FIG. 1) by the sample hold pulse SHP. In the meantime, since the photoelectric conversion unit 110 is exposed to incident light, charges corresponding to incident light are generated and accumulated.

In addition, a predetermined positive voltage is constantly applied to the second charge transfer unit 170. Here, the potential barrier peak of the second charge transfer unit 170 is formed to be lower than the potential barrier peak of the first charge transfer unit 130 by a predetermined difference h.

When the first charge transfer signal TG1 becomes high at time t2, the accumulated charge is transferred from the photoelectric converter 110 of all the rows of the pixel array unit 10 to the charge detector 120. At this time, since the charge detector 120 has a parasitic capacitance, charges are accumulated cumulatively, and thus the potential of the charge detector 120 is changed.

At time t3, the first charge transfer signal TG1 goes low. Thereafter, the potentials stored in the charge detector 120, that is, the signal level, are sequentially read from the first signal line 162 from the first row of the pixel array unit 10. Although not shown in the figure, the signal level on the vertical signal line 162 is retained in the correlated double sampler 50 by a sample hold pulse SHD. That is, the noise level and the signal level are sequentially sampled in one unit pixel 100, respectively.

This operation first prevents a fixed noise level from occurring even if the same path is used, since the output of the noise level and signal level is controlled using a predetermined switch. In addition, since the output is sequentially, the difference between the noise level and the signal level can be obtained by the correlated double sampler 50 which is a differential circuit without using a separate memory, thereby simplifying the system.

At the time t4, the potential stored in the charge detector 120 of the i-th row is not yet read. Nevertheless, since the photoelectric conversion unit 110 is exposed to incident light, excess charge may continue to be generated. On the other hand, since the potential barrier of the second charge transfer unit 170 is formed lower than the maximum potential barrier of the first charge transfer unit 130, the excess charge does not overflow to the charge detector 120 and the overflow drain region ( 180). Therefore, a stable electric shutter operation is possible even in the single frame capture mode, so that the frame image stored in the charge detector 120 is not distorted.

Thereafter, the image signal processor (not shown) undergoes a plurality of processes until the screen is displayed. For example, the correlated double sampler 50 outputs the difference level between the noise level and the signal level. Therefore, the fixed noise level due to the characteristic dispersion of the unit pixel 100 and the vertical signal line 162 is suppressed. In addition, the analog-to-digital converter 60 receives an analog signal output from the correlated double sampler 50 and outputs it as a digital signal.

For convenience of description, an all pixel independent reading mode in which signals of all the unit pixels 100 are read independently has been described, but the present invention is not limited thereto. Of course, a frame reading mode is also possible in which signals of odd lines are read in the first field and signals of even lines are read in the second field. In addition, a field reading mode is also possible in which signals from two adjacent lines are read at the same time to add a voltage and change a combination of two lines added for each field.

Although embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features thereof. I can understand that. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive.

According to the image sensor as described above has one or more of the following effects.

First, it is possible to prevent image distortion in the single frame capture mode.

Second, blooming can be prevented.

Third, it is possible to reduce image distortion due to an image processing time difference between unit pixels generated in the case of a plurality of unit pixels sharing the charge detector.

Claims (25)

A plurality of unit pixel actives spaced apart from each other in a semiconductor substrate, wherein the unit pixel actives include a plurality of unit pixel actives including photoelectric conversion actives, read actives, and overflow drain actives; A photoelectric conversion unit formed in the photoelectric conversion active to generate and accumulate charges corresponding to incident light; A first charge transfer unit formed between the photoelectric conversion active and the read active to transfer the accumulated charge to a charge detection unit; An overflow drain region formed in the overflow drain active and discharging excess charge generated by the photoelectric conversion unit to the outside; And A second charge transfer part formed between the photoelectric conversion active and the overflow drain active to transfer the excess charge to the overflow drain region, wherein the width of the second charge transfer portion is equal to the width of the overflow drain region; And an image sensor comprising a second charge transfer unit, which may be larger or larger. The image sensor of claim 1, wherein a width of the second charge transfer unit is equal to one side of the photoelectric conversion unit. The image sensor of claim 1, wherein the second charge transfer unit is formed adjacent to at least one side of the photoelectric conversion unit. The image sensor of claim 1, wherein the second charge transfer unit comprises a plurality of sub-second charge transfer units. delete The image sensor of claim 5, wherein an entire width of the plurality of sub second charge transfer parts is equal to one side of the photoelectric conversion part. The image sensor of claim 4, wherein the plurality of sub-second charge transfer units are formed to be adjacent to at least one side. The image sensor of claim 1, wherein the potential barrier peak of the second charge transfer unit is lower than the potential barrier peak of the first charge transfer unit. The image sensor of claim 1, wherein the second charge transfer unit is a MOS transistor including a gate electrode electrically connected to a charge transfer signal, and a source / drain region electrically connected to the photoelectric conversion unit and the overflow drain region, respectively. The method of claim 9, The second charge transfer unit further includes an ion implantation region formed under the gate electrode to adjust the potential barrier. The method of claim 9, And the MOS transistor is a trench type MOS transistor. The image sensor of claim 1, wherein the second charge transfer unit is an ion implantation region formed in the semiconductor substrate. A plurality of unit pixels includes a pixel array unit arranged in two dimensions, Each of the unit pixels may be formed in a semiconductor substrate to generate and accumulate charges corresponding to incident light, a first charge transfer unit configured to transfer the accumulated charges to a charge detector, and an excess charge generated by the photoelectric converters. An overflow drain region for discharging to the outside, a second charge transfer unit for transferring the excess charge to the overflow drain region, And the plurality of photoelectric conversion units share the overflow drain region through each of the second charge transfer units. The method of claim 13, And the plurality of photoelectric conversion units share the charge detection unit through each of the first charge transfer units. The method of claim 13, An image sensor having a width equal to one side of the photoelectric converter. The method of claim 13, And the second charge transfer part is formed adjacent to at least one side of the photoelectric conversion part. The method of claim 13, And the second charge transfer unit comprises a plurality of sub second charge transfer units. delete The method of claim 18, The overall width of the plurality of sub second charge transfer parts is the same as the one side of the photoelectric conversion part. The method of claim 17, And the plurality of sub second charge transfer parts are formed adjacent to at least one side. The method of claim 13, The potential barrier peak of the second charge transfer unit is lower than the potential barrier peak of the first charge transfer unit. The method of claim 13, And the second charge transfer unit is a MOS transistor including a gate electrode electrically connected to a charge transfer signal, and a source / drain region electrically connected to the photoelectric conversion unit and the overflow drain region, respectively. The method of claim 22, The second charge transfer unit further includes an ion implantation region formed under the gate electrode to adjust the potential barrier. The method of claim 22, And the MOS transistor is a trench type MOS transistor. The method of claim 13, And the second charge transfer part is an ion implantation region formed in the semiconductor substrate.

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