KR100603307B1 - Discharge display apparatus having improved operation sequence - Google Patents

Abstract

In the discharge display device according to the present invention, a discharge display panel, a driver for applying driving signals to respective electrode lines of the discharge display panel, a controller for generating drive control signals for allowing the drivers to operate, and a driver and a controller It is provided with a power supply for supplying power voltages. Here, after the power supply unit supplies power voltages to the driving units and the control unit, a signal indicating that power supply is completed is input to the control unit. In addition, the control unit generates drive control signals after a signal indicating that power supply is completed from the power supply unit.

Description

Discharge display apparatus having improved operation sequence

1 is a perspective view showing an internal structure of a plasma display panel of a three-electrode surface discharge method as a conventional discharge display panel.

FIG. 2 is a cross-sectional view illustrating an example of one display cell of the panel of FIG. 1.

3 is a block diagram showing a plasma display device as a discharge display device according to the present invention.

4 is a timing diagram illustrating an operation sequence of a power supply of FIG. 3.

FIG. 5 is a timing diagram illustrating an operation sequence of the logic controller of FIG. 3.

6 is a timing diagram illustrating an operation of the plasma display of FIG. 3.

FIG. 7 is a waveform diagram illustrating signals applied to electrode lines of the plasma display panel of FIG. 3.

<Explanation of symbols for the main parts of the drawings>

1 ... plasma display panel, 10 ... front glass substrate,

11, 15 dielectric layer, 12 protective layer,

13 ... back glass substrate, 14 ... discharge space,

16 fluorescent layers, 17 bulkheads,

X ₁ , ..., Xn ... X electrode line, Y ₁ , ..., Yn ... Y electrode line,

A _R1 , ..., A _Bm ... address electrode line, X _na , Y _na ... transparent electrode line,

X _nb , Y _nb ... metal electrode line, SF ₁ , ... SF ₈ ... subfield,

S _Y ... Y drive control signal, V _G ... ground voltage,

S _X ... X drive control signal,

S _A ... address drive control signal,

62 logic controller, 63 address drive,

64 ... X drive, 65 ... Y drive,

66 ... image processing unit, R ₁ , ..., R ₈ ... reset cycle.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a discharge display device, and more particularly, to a discharge display panel, driving units for applying driving signals to respective electrode lines of the discharge display panel, and a control unit for generating driving control signals capable of operating the driving units. And a power supply unit for supplying power voltages to the driving units and the control unit.

1 shows the structure of a three-electrode surface discharge type plasma display panel as a conventional discharge display panel. FIG. 2 shows an example of one display cell of the panel of FIG. 1. 1 and 2, between the front and rear glass substrates 10 and 13 of a conventional surface discharge plasma display panel 1, address electrode lines A _R1 ,..., A _Bm , a dielectric layer. (11, 15), Y electrode lines (Y ₁ , ..., Y _n ), X electrode lines (X ₁ , ..., X _n ), phosphor 16, partition 17 and protective layer As a magnesium monoxide (MgO) layer 12 is provided.

The address electrode lines A _R1 ,..., A _Bm are formed in a predetermined pattern on the front side of the rear glass substrate 13. The lower dielectric layer 15 is applied to the entire surface in front of the address electrode lines A _R1 ,..., A _Bm . In front of the lower dielectric layer 15, barrier ribs 17 are formed in a direction parallel to the address electrode lines A _R1 ,..., And A _Bm . These partitions 17 function to partition the discharge area of each display cell and to prevent optical cross talk between each display cell. The fluorescent layer 16 is applied between the partition walls 17.

The X electrode lines (X ₁ , ..., X _n ) and the Y electrode lines (Y ₁ , ..., Y _n ) intersect the address electrode lines (A _R1 , ..., A _Bm ). It is formed in a constant pattern on the back of the front glass substrate 10. Each intersection sets a corresponding display cell. Each X electrode line (X ₁ , ..., Xn) and each Y electrode line (Y ₁ , ..., Y _n ) is a transparent electrode line of a transparent conductive material such as indium tin oxide (ITO) or the like (see FIG. 2). X _na , Y _na ) and a metal electrode line (X _nb , Y _nb of FIG. 2) for increasing conductivity are formed. The front dielectric layer 11 is formed by applying the entire surface to the rear of the X electrode lines (X ₁ ,..., X _n ) and the Y electrode lines (Y ₁ ,..., Y _n ). A protective layer 12 for protecting the panel 1 from a strong electric field, for example, a magnesium monoxide (MgO) layer, is formed by applying the entire surface to the back of the front dielectric layer 11. The plasma forming gas is sealed in the discharge space 14.

In the driving method (see US Patent No. 5,541,618) basically applied to such a plasma display panel, the resetting, addressing, and sustaining-discharge steps are sequentially performed in the unit subfield. Is performed. In the resetting step, the charge states of all display cells are uniform. In the addressing step, a predetermined wall voltage is generated in the selected display cells. In the sustain-discharge step, a predetermined alternating voltage is applied to all the XY electrode line pairs so that the display cells in which the wall voltage is formed in the addressing step cause sustain-discharge. In this sustain-discharge step, a plasma is formed in the discharge space 14 of the selected display cells causing the sustain-discharge, that is, the gas layer, and the fluorescent layer 16 is excited by the ultraviolet radiation to generate light.

The driving device of the discharge display panel includes driving units, a control unit, and a power supply unit. The drivers apply driving signals to respective electrode lines of the discharge display panel. The controller generates driving control signals through which the driving units can operate. The power supply unit supplies power voltages to the driving units and the control unit.

In the discharge display device including the above-described discharge display panel and its driving device, conventionally, the control unit operates as soon as power is supplied to the control unit, and driving control signals from the control unit are input to the driving units. . Here, the driving control signals may be input to the driving units even before power is applied to the driving units. In this case, since the driving units operate abnormally, an electric shock is applied to the driving units and the discharge display panel, thereby degrading the performance of the discharge display device and reducing the lifespan.

It is an object of the present invention to provide a discharge display device in which no electric shock occurs internally at an initial time when a driving power is applied, so that its performance is not deteriorated and its life is not shortened.

In the discharge display device of the present invention for achieving the above object, the discharge display panel, the control unit for applying the driving signals to the respective electrode lines of the discharge display panel, the control unit for generating the drive control signals to enable the driving unit And a power supply unit supplying power voltages to the driving units and the control unit. Here, after the power supply unit supplies power voltages to the driving units and the control unit, a signal indicating that power supply is completed is input to the control unit. The control unit may generate the driving control signals after a signal indicating that power supply is completed from the power supply unit is input.

According to the discharge display device of the present invention, the driving units may operate after power supply from the power supply unit is completed. Accordingly, since the driving units normally operate at an initial time when driving power is applied, electric shock is not applied to the driving units and the discharge display panel. Accordingly, the performance of the discharge display device may not deteriorate and the life may not be shortened.

Hereinafter, preferred embodiments according to the present invention will be described in detail.

Referring to FIG. 3, a plasma display device as a discharge display device according to the present invention includes a plasma display panel 1, an image processor 66, a logic controller 62, an address driver 63, an X driver 64, and a Y driver. A driver 65 and a power supply 61. The plasma display panel 1 has been described with reference to FIGS. 1 and 2. The image processing unit 66 converts an external analog image signal into a digital signal to convert an internal image signal, for example, 8 bits of red (R), green (G), and blue (B) image data, a clock signal, vertical and horizontal, respectively. Generate sync signals. The controller 62 generates driving control signals S _A , S _Y , and S _X according to an internal image signal from the image processor 66. The address driver 63 processes the address signal S _A among the drive control signals S _A , S _Y , and S _X from the logic controller 62 to generate display data signals, and generates the generated display data signals. Are applied to the address electrode lines. The X driving unit 64 processes the X driving control signal S _X among the driving control signals S _A , S _Y , and S _X from the control unit 62, and applies the X driving control signal S _X to the X electrode lines. The Y driver 65 processes the Y driving control signal S _Y among the driving control signals S _A , S _Y , and S _X from the logic controller 62, and applies the Y driving control signal S _Y to the Y electrode lines.

The power supply unit 61 supplies a power supply potential V _CI and a ground potential V _G to the image processing unit 66, a power supply potential V _CL , a ground potential V _G , and a supply to the logic controller 62. The completion signal S _{SC is} supplied to the Y drive unit 65 by the sustain-discharge potential V _S , the rising potential V _SET , the scan-biasing potential V _E , the scan potential V _SCAN , and the ground potential. (V _G ) to the address driver 63, the addressing potential V _A and the ground potential V _G , and the X driver 64 to the sustain-discharge potential V _S and the ground potential V _G. Provide each. The power supply 61 includes the power supply potential V _CI of the image processor 66, the power supply potential V _CL of the logic controller 62, the ground potential V _G , the addressing potential V _A , the sustain-discharge potential (V _S ), rising potential V _SET , scan-biasing potential V _E , and scanning potential V _SCAN are sequentially applied to each part. Next, the power supply unit 61 provides the logic control unit 62 with a supply completion signal S _SC indicating that each potential has been applied. Accordingly, the logic controller 62 performs the drive control while generating the drive control signals S _A , S _Y , and S _X according to the internal image signal from the image processor 66. Accordingly, the driving units 63, 64, and 65 may operate after the power supply from the power supply unit 61 is completed.

4 shows an operation sequence of the power supply 61 of FIG. In FIG. 3, reference numeral S _PON denotes an internal control signal for starting the operation of the power supply 61 according to a user's power supply, and S _VCI denotes a power supply potential V _CI to the image processor 66 (FIG. 3). Internal control signal for supplying, S _VCL to supply the internal control signal for supplying the power supply potential (V _CL ) to the logic control unit (62 in Fig. 3), S _VG for supplying the ground potential (V _G ) to each part Internal control signal for supplying, S _VA is an internal control signal for supplying the addressing potential (V _A ) to the address driver 63, S _VS is a sustain-discharge potential (V) to the X and Y drivers (64, 65) _{S VSET} is an internal control signal for supplying _S ), S _VSET is an internal control signal for supplying the rising potential V _SET to the Y driver 65, and S _VE is a scan-biasing potential (Y) for the Y driver 65. Internal control signal for supplying V _E ) and S _VSCAN for supplying the scanning potential V _SCAN to the Y driver 65. One internal control signal and S _SC indicate the supply completion signal input to the logic controller 62, respectively.

3 and 4, a power supply potential V _CI of the image processor 66 and a power supply potential V _CL of the logic controller 62 are output at a time between a time t5 and a time t6. Next, at the time t6, the ground potential V _G and the addressing potential V _A are respectively output. Next, the sustain-discharge potential V _S is output at the time t8. Next, the rising potential V _SET , the scanning-biasing potential V _E , and the scanning potential V _SCAN are output at the time points between the time points t11 and t12. Next, at a time t13, a supply completion signal S _SC indicating that each potential has been applied is output to the logic controller 62. Accordingly, the logic controller 62 performs the drive control while generating the drive control signals S _A , S _Y , and S _X according to the internal image signal from the image processor 66. Accordingly, the driving units 63, 64, and 65 may operate after the power supply from the power supply unit 61 is completed.

An operation sequence of the logic controller 62 will now be described with reference to FIGS. 3 to 5.

First, as the power supply potential V _CL is applied to the logic controller 62, the inside of the logic controller 62 is initialized (step S51). Next, setting data is loaded into the system registers in the logic control section 62 (step S52). Next, the format of the internal video signal from the video processor 66 is determined (step S53). For example, it is determined to which of the formats of the internal video signal from the image processor 66 belongs to NTSC (National Television System committee) and PAL (Phase Alternation Line) formats. Next, setting data is loaded into the status registers in accordance with the determined input signal format (step S54). Steps S52 to S54 are repeatedly performed until the supply completion signal S _SC from the power supply unit 61 indicates that power supply is completed (step S55).

When the supply completion signal S _SC from the power supply unit 61 indicates that the power supply is completed (step S55), it waits for the vertical synchronization signal to be generated from the internal video signal from the image processing unit 66 (step S56). Next, when a vertical synchronizing signal is generated from the internal image signal from the image processing unit 66 (step S56), the drive control signals so that the address driver 63, the X driver 64, and the Y driver 65 operate. (S _A , S _Y , S _X ) are generated (step S57). Accordingly, the driving units 63, 64, and 65 may operate after the power supply from the power supply unit 61 is completed.

During the driving control (step S57), if the format of the internal video signal from the image processor 66 is switched, the steps S53 to S57 are repeatedly performed (step S58).

6 illustrates an operation of the plasma display device of FIG. 3. Referring to FIG. 6, each of the unit frames is divided into _eight subfields SF ₁ ,..., SF ₈ to realize time division gray scale display. In addition, each subfield SF ₁ , ..., SF ₈ has a reset time R ₁ , ..., R ₈ , an addressing time A ₁ , ..., A ₈ , and sustain-discharge It is divided by time S ₁ , ..., S ₈ .

The discharge conditions of all the display cells become uniform at each reset time R ₁ , ..., R ₈ and at the same time are adapted to the addressing to be performed in the next step.

At each addressing time (A ₁ , ..., A ₈ ), display data signals are applied to the address electrode lines (A _R1 , ..., A _{Bm in} FIG. 1) and at the same time, each Y electrode line (Y ₁ , ..., Y _n ), the scanning pulses are sequentially applied. Accordingly, when high level display data signals are applied while the scan pulse is applied, wall charges are formed by the addressing discharge in the corresponding discharge cell, and wall charges are not formed in the discharge cell that is not.

At each sustain-discharge time (S ₁ , ..., S ₈ ), all Y electrode lines (Y ₁ , ..., Y _n ) and all X electrode lines (X ₁ , ..., X _n) The sustain-discharge pulses are alternately applied to generate display discharge in the discharge cells in which the wall charges are formed at the corresponding addressing times A ₁ ,..., A ₈ . Therefore, the luminance of the PDP is kept occupied in the unit frame is proportional to the length of the discharge time _{(S 1, ..., S 8} ). The length of the sustain-discharge time S ₁ , ..., S ₈ occupied in the unit frame is 255T (T is the unit time). Therefore, it can be displayed in 256 gray scales, even if it is not displayed once in a unit frame.

Here, the time 1T corresponding to 2 ⁰ is the sustain-discharge time S ₁ of the first subfield SF ₁ , and the time 1T corresponding to the sustain-discharge time S ₂ of the second subfield SF ₂ is 2. ^The time 2T corresponding to ¹ is maintained in the third subfield SF ₃ -In the discharge time S ₃ , the time 4T corresponding to 2 ² is maintained in the fourth subfield SF ₄ . The discharge time S ₄ has a time 8T corresponding to 2 ³ , and the sustaining-discharge time S ₅ of the fifth subfield SF ₅ has a time 16T corresponding to 2 ⁴ , and the sixth sub field maintenance of the (SF ₆₎ - discharge time (S _6), this time (32T) corresponding to 2 ^5, 7 keep the sub-fields (SF ₇₎ - discharge time period that is equivalent to 2 ⁶ (S ₇₎ 64T and time 128T corresponding to 2 ⁷ are set in the sustain-discharge time S ₈ of the eighth subfield SF ₈ , respectively.

Accordingly, if the subfield to be displayed among the eight subfields is appropriately selected, the display of 256 gray levels can be performed including all zero (zero) gray levels that are not displayed in any of the subfields.

FIG. 7 shows signals applied to electrode lines of the plasma display panel 1 of FIG. 3. A drive signal is applied also to the reference symbol S _AR1..ABm are each address electrode lines (Fig. _{1 A R1, A G1, ...} , A Gm, A Bm) at 7, X is S _X1..Xn electrode the lines of the drive signal applied to the (in Fig. _{1 X 1, ... X n)} , and s _Y1, ..., s _Yn is the Y electrode lines (Fig. 1 of Y _1, ... Y _n) Indicates a drive signal applied to.

1, 3, and 7, in the first time t ₁ to t ₂ of the resetting time R of the unit subfield SF, first, the X electrode lines X ₁ ,. The potential applied to X _n ) is continuously raised from the ground potential V _G to the potential of the sustain-discharge potential V _S. Here, the ground potential V _G is applied to the Y electrode lines Y ₁ ,..., Y _n and the address electrode lines A _R1 ,..., A _Bm . Accordingly, between the X electrode lines (X ₁ , ..., X _n ) and the Y electrode lines (Y ₁ , ..., Y _n ), and the X electrode lines (X ₁ , ..., X) A weak discharge occurs between _n ) and the address electrode lines A ₁ , ..., A _m , and negative wall charges are formed around the X electrode lines X ₁ , ..., X _n . .

In the second time t ₂ to t ₃ as the wall charge accumulation time, the potential applied to the Y electrode lines Y ₁ ,..., Y _n is maintained from the sustain-discharge potential V _S to the sustain-discharge potential. than (V _S) increases as the potential (V _SET) it is further continued to rise to a high first potential (V _SET + V _S). Here, the ground potential V _G is applied to the X electrode lines X ₁ ,..., X _n and the address electrode lines A _R1 ..., A _Bm . Accordingly, a weak discharge occurs between the Y electrode lines (Y ₁ ,..., Y _n ) and the X electrode lines (X ₁ ,..., X _n ), while the Y electrode lines (Y ₁ , A weaker discharge occurs between ..., Y _n ) and the address electrode lines A _R1 , ..., A _Bm . Here, Y electrode lines _{(Y 1, ..., Y n} ) and the address electrode lines _{(A R1, ..., A Bm} ) than the discharge electrode line Y between the (Y _1, ..., Y _The reason why the discharge between _n ) and the X electrode lines (X ₁ , ..., X _n ) becomes stronger is that the negative wall charges around the X electrode lines (X ₁ , ..., X _n ) Because they were formed. Accordingly, many negative wall charges are formed around the Y electrode lines (Y ₁ , ..., Y _n ), and positive wall charges are formed around the X electrode lines (X ₁ , ..., X _n ). Are formed, and less positive wall charges are formed around the address electrode lines A _R1 , ..., A _Bm .

In the third time t ₃ to t ₄ as the wall charge distribution time, in the state where the potential applied to the X electrode lines X ₁ ,..., X _n is the sustain-discharge potential V _S , The potential applied to the electrode lines Y ₁ ,..., Y _n is continuously lowered from the sustain-discharge potential V _S to the negative scanning potential V _SCAN . Here, the ground potential V _G is applied to the address electrode lines A _R1 ,..., A _Bm . Accordingly, due to the weak discharge between the X electrode lines (X ₁ ,..., X _n ) and the Y electrode lines (Y ₁ , ..., Y _n ), the Y electrode lines (Y ₁ ,. Some of the negative wall charges around .., Y _n ) move around the X electrode lines X ₁ ,..., X _n . Accordingly, the wall electric-potential of the X electrode lines X ₁ , ..., X _n is lower than the wall potential of the address electrode lines A _R1 , ..., A _Bm and the Y electrode Higher than the wall potential of the lines Y ₁ , ..., Y _n . Accordingly, the addressing voltage required for the opposing discharge between the selected address electrode lines and the Y electrode line at the subsequent addressing time A can be lowered. Meanwhile, since the ground potential V _G is applied to all the address electrode lines A _R1 ,..., And A _Bm , the address electrode lines A _R1 ,..., A _Bm are X electrode lines ( Discharge is performed on X ₁ , ..., X _n ) and Y electrode lines (Y ₁ , ..., Y _n ), and due to the discharge, the address electrode lines (A _R1 , ..., A) _Bm ) the positive wall charges around it disappear slightly.

In the subsequent addressing time A, display data signals are applied to the address electrode lines A _R1 ,..., A _Bm , and the scan-biasing potential V _E lower than the sustain-discharge potential V _S. As the scan pulses of the negative scanning potential V _SCAN are sequentially applied to the Y electrode lines Y ₁ ,..., And Y _n biased by), smooth addressing may be performed. The display data signals applied to each of the address electrode lines A _R1 , ..., A _Bm have a positive addressing potential V _A when the display cell is selected and a ground potential V _G when the display cell is not selected. do. Accordingly, when the display data signals of the positive addressing potential V _A are applied while the scan pulse of the negative scan potential V _SCAN is applied, wall charges are formed by the addressing discharge in the corresponding display cell. Wall charges are not formed in the display cell. Here, the sustain-discharge potential V _S is applied to the X electrode lines X ₁ ,... X _{n for} more accurate and efficient addressing discharge.

The discharge time (S), all the Y electrode lines (Y _1, ... Y _n) and the X electrode lines held in the _{(X 1, ... X n)} - - leading to maintenance of the discharge potential (V _S) The pulses are alternately applied, causing sustain-discharge in the display cells in which wall charges are formed at the corresponding addressing time (A).

As described above, according to the discharge display device according to the present invention, the driving units may operate after the power supply from the power supply unit is completed. Accordingly, since the driving units normally operate at the initial time when the driving power is applied, electric shock is not applied to the driving units and the discharge display panel. Accordingly, the performance of the discharge display device may not deteriorate and the life may not be shortened.

The present invention is not limited to the above embodiments, but may be modified and improved by those skilled in the art within the spirit and scope of the invention as defined in the claims.

Claims (7)

A discharge display panel, driving units for applying driving signals to respective electrode lines of the discharge display panel, a control unit generating driving control signals for enabling the driving units to operate, and supplying power voltages to the driving units and the control unit. In a discharge display device provided with a power supply, After the power supply unit supplies power voltages to the driving units and the control unit, a signal indicating that power supply is completed is input to the control unit, And a control unit to generate the driving control signals after a signal indicating that power supply is completed from the power supply unit is input. The method of claim 1, wherein the discharge display panel, A front substrate and a rear substrate spaced apart from each other, wherein first and second sustain-discharge electrode lines are formed parallel to each other, and address electrode lines are formed on the first and second sustain-discharge electrode lines; Discharge display device formed to cross with respect to. The method of claim 2, And a video processing unit converting an external analog video signal into a digital signal to generate an internal video signal. The method of claim 3, wherein the control unit, And a display device for generating the driving control signals according to an internal image signal from the image processor. The method of claim 2, wherein the driving unit, An address driver for driving the address electrode lines; An X driver for driving the first sustain-discharge electrode lines, and And a Y driver for driving the second sustain-discharge electrode lines. The method of claim 5, The Y driver generates a scan signal and sequentially applies it to the first sustain-discharge electrode lines, and the address driver generates display data signals corresponding to the scan signal and applies it to the address electrode lines. A discharge display device in which addressing discharges occur in display cells to form wall charges. The method of claim 6, And X- and Y-drive parts apply an alternating voltage between the first and second sustain-discharge electrode lines, whereby sustain-discharge discharge occurs only in display cells in which the wall charges are formed.

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