KR100589532B1 - 집적 회로의 내장형 자체 시험 방법 및 장치 - Google Patents

집적 회로의 내장형 자체 시험 방법 및 장치 Download PDF

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Publication number
KR100589532B1
KR100589532B1 KR1020007014379A KR20007014379A KR100589532B1 KR 100589532 B1 KR100589532 B1 KR 100589532B1 KR 1020007014379 A KR1020007014379 A KR 1020007014379A KR 20007014379 A KR20007014379 A KR 20007014379A KR 100589532 B1 KR100589532 B1 KR 100589532B1
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South Korea
Prior art keywords
address
memory
row
delete delete
column
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Expired - Fee Related
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KR1020007014379A
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English (en)
Korean (ko)
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KR20010052985A (ko
Inventor
레페지안예반트데이비드
마란드지안흐란트
구카시안호바네스
크라우스로렌스
Original Assignee
크레던스 시스템스 코포레이션
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Publication of KR20010052985A publication Critical patent/KR20010052985A/ko
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Publication of KR100589532B1 publication Critical patent/KR100589532B1/ko
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits

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  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
KR1020007014379A 1998-08-21 1998-08-21 집적 회로의 내장형 자체 시험 방법 및 장치 Expired - Fee Related KR100589532B1 (ko)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US1998/017298 WO2000011674A1 (en) 1998-08-21 1998-08-21 Method and apparatus for built-in self test of integrated circuits

Publications (2)

Publication Number Publication Date
KR20010052985A KR20010052985A (ko) 2001-06-25
KR100589532B1 true KR100589532B1 (ko) 2006-06-13

Family

ID=22267708

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KR1020007014379A Expired - Fee Related KR100589532B1 (ko) 1998-08-21 1998-08-21 집적 회로의 내장형 자체 시험 방법 및 장치

Country Status (4)

Country Link
EP (1) EP1105876A4 (https=)
JP (1) JP2002523854A (https=)
KR (1) KR100589532B1 (https=)
WO (1) WO2000011674A1 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6550034B1 (en) 2000-02-17 2003-04-15 Hewlett Packard Development Company, L.P. Built-in self test for content addressable memory
US6658610B1 (en) * 2000-09-25 2003-12-02 International Business Machines Corporation Compilable address magnitude comparator for memory array self-testing
JP2006252702A (ja) * 2005-03-11 2006-09-21 Nec Electronics Corp 半導体集積回路装置及びその検査方法
JP2008065862A (ja) * 2006-09-04 2008-03-21 System Fabrication Technologies Inc 半導体記憶装置
US8185694B2 (en) * 2008-07-25 2012-05-22 International Business Machines Corporation Testing real page number bits in a cache directory
KR101232195B1 (ko) * 2011-02-25 2013-02-12 연세대학교 산학협력단 반도체 메모리 장치 테스트 방법 및 테스트 장치

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0492624A1 (en) * 1990-12-27 1992-07-01 Kabushiki Kaisha Toshiba Semiconductor integrated circuit

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4817093A (en) * 1987-06-18 1989-03-28 International Business Machines Corporation Method of partitioning, testing and diagnosing a VLSI multichip package and associated structure
US4965717A (en) * 1988-12-09 1990-10-23 Tandem Computers Incorporated Multiple processor system having shared memory with private-write capability
US5258986A (en) * 1990-09-19 1993-11-02 Vlsi Technology, Inc. Tightly coupled, low overhead RAM built-in self-test logic with particular applications for embedded memories
JP3269117B2 (ja) * 1992-05-26 2002-03-25 安藤電気株式会社 半導体メモリ用試験パターン発生器
KR0141432B1 (ko) * 1993-10-01 1998-07-15 기다오까 다까시 반도체 기억장치
US5617531A (en) * 1993-11-02 1997-04-01 Motorola, Inc. Data Processor having a built-in internal self test controller for testing a plurality of memories internal to the data processor
US5661732A (en) * 1995-05-31 1997-08-26 International Business Machines Corporation Programmable ABIST microprocessor for testing arrays with two logical views
US5659551A (en) * 1995-05-31 1997-08-19 International Business Machines Corporation Programmable computer system element with built-in self test method and apparatus for repair during power-on
US5615159A (en) * 1995-11-28 1997-03-25 Micron Quantum Devices, Inc. Memory system with non-volatile data storage unit and method of initializing same
US5805789A (en) * 1995-12-14 1998-09-08 International Business Machines Corporation Programmable computer system element with built-in self test method and apparatus for repair during power-on

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0492624A1 (en) * 1990-12-27 1992-07-01 Kabushiki Kaisha Toshiba Semiconductor integrated circuit

Also Published As

Publication number Publication date
KR20010052985A (ko) 2001-06-25
EP1105876A4 (en) 2003-09-17
WO2000011674A1 (en) 2000-03-02
JP2002523854A (ja) 2002-07-30
EP1105876A1 (en) 2001-06-13

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