KR100551059B1 - Plasma display panel - Google Patents

Abstract

The plasma display panel of the present invention includes: a first substrate and a second substrate disposed to face each other; Address electrodes formed on the second substrate; Partition walls arranged in a space between the first substrate and the second substrate to partition closed discharge cells each including a vertical partition wall in a direction parallel to the address electrode and a horizontal partition wall crossing each other; Phosphor layers formed in the discharge cells; First and second electrodes corresponding to each discharge cell while extending in a direction crossing the address electrode on the first substrate; A third electrode disposed between the first electrode and the second electrode to correspond to each of the discharge cells and formed to extend in a direction crossing the address electrode; And an intermediate partition formed at a height lower than the horizontal partition or vertical partition along the position where the third electrode and the address electrode intersect in the respective discharge cells.

Plasma, middle bulkhead, address, discharge, electrode, electric field

Description

Plasma display panel {Plasma display panel}

These drawings attached to the present specification are for reference in describing preferred embodiments of the present invention, and therefore, the technical spirit of the present invention should not be construed as being limited to the accompanying drawings.

1 is a partially exploded perspective view of a plasma display panel according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along the line 'I-I' of FIG. 1.

3 is a cross-sectional view taken along the line 'II-II' of FIG. 1.

4 is a plan view alternatively showing only the partition wall of FIG. 1.

FIG. 5 is a view illustrating an arrangement state of the electrode and the partition wall illustrated in FIG. 1.

FIG. 6 is a view illustrating an electrode arranged in a form different from that of FIG. 2.

FIG. 7 is an example drive waveform diagram for describing an operating state of the panel illustrated in FIG. 1.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to a plasma display panel in which a partition structure is improved so that discharge can occur uniformly while lowering a discharge voltage.

In a panel having a general three-electrode structure, the common electrode and the scan electrode are arranged in parallel with each other, and the address electrodes are arranged in a direction orthogonal to each other to constitute a discharge cell. In this case, the electrodes of the panel are in an m × n matrix form, and address electrodes are arranged in a column direction, and n rows of common electrodes and scan electrodes are alternately arranged in a row direction.

In a panel having such an electrode array structure, it is common that each subfield consists of a reset period, an address period, and a sustain period.

At this time, the reset section serves to erase the wall charge state of the previous sustain discharge and to set up the wall charge in order to stably perform the next address discharge, and a reset voltage is applied to the electrode.

The address period is a period during which the wall charges are accumulated in the discharge cells (addressed cells) that are turned on by selecting the discharge cells that are turned on and the discharge cells that are not turned on, and an address voltage is applied to the electrodes.

The sustain period consists of a period in which a sustain voltage is alternately applied to the scan electrode and the common electrode to perform discharge for actually displaying an image on the addressed cell.

However, in the conventional three-electrode panel structure, the scan electrode and the common electrode are disposed at both ends of the discharge cell, and the image required by the surface discharge is implemented.

In addition, since the scan electrodes which start the address discharge together with the address electrodes are biased to one end of the discharge cell, the wall charges generated as a result of the address discharge show an uneven distribution in the discharge cells. As a result, there has been a problem that the discharge is locally biased in the sustain discharge.

Accordingly, the present invention has been made to solve the above problems, and to provide a plasma display panel of the present invention so that the discharge can occur uniformly while lowering the discharge voltage.

In order to achieve the above object, the plasma display panel of the present invention,

A first substrate and a second substrate disposed to face each other;

Address electrodes formed on the second substrate;

Partition walls arranged in a space between the first substrate and the second substrate to partition closed discharge cells each including a vertical partition wall in a direction parallel to the address electrode and a horizontal partition wall crossing each other;

Phosphor layers formed in the discharge cells;

First and second electrodes corresponding to each discharge cell while extending in a direction crossing the address electrode on the first substrate;

A third electrode disposed between the first electrode and the second electrode to correspond to each of the discharge cells and formed to extend in a direction crossing the address electrode; And,

And an intermediate partition formed in each of the discharge cells along a position where the third electrode and the address electrode cross each other.

In this case, the intermediate partition is preferably formed at a height lower than the horizontal partition or vertical partition.

In addition, discharge is sequentially performed in a reset period, an address period, and a sustain period according to the voltage type applied to the electrodes, so that the reset period and the sustain between the first electrode, the second electrode, and the third electrode. A voltage causing discharge during the period is applied, and an address voltage in the address period is applied between the third electrode and the address electrode to drive the battery.

In this case, the third electrode may be disposed along the center of the discharge cell, and the first and second electrodes may be alternately disposed therebetween.

In another embodiment, the third electrodes may be disposed along the centers of the discharge cells, and the first and second electrodes may be disposed along the respective cell cells in pairs therebetween.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

1 is a partially exploded perspective view of a plasma display panel according to an exemplary embodiment of the present invention, and FIGS. 2 and 3 are cross-sectional views of panels along an 'I-I' line and a 'II-II' line, respectively. The present invention will be described with reference to the following.

Referring to the drawings, the plasma display panel (hereinafter, referred to as a 'panel') according to the present exemplary embodiment is disposed such that the first substrate 6 and the second substrate 4 are disposed to face each other at a predetermined interval, and have a space between the two substrates. The color-specific discharge cells 8R, 8G, and 8B partitioned by the partition wall 8 are provided.

Address electrodes 10 are formed on one inner surface of the second substrate 4 along one direction (the X-axis direction of the drawing), and the dielectric layer 16 covers the entire inner surface of the second substrate 4 while covering the address electrodes 10. ) Is located. At this time, the address electrodes 10 are preferably located side by side at a predetermined interval with the neighboring electrodes along the center of the width direction (Y-axis direction of the drawing) of the discharge cells (8R, 8G, 8B).

A partition 8 is formed on the dielectric layer 16 to provide a discharge space, and is partitioned into color-specific discharge cells 8R, 8G, and 8B according to red, green, and blue phosphors applied therein.

In the present embodiment, the discharge cells 8R, 8G, and 8B are divided into vertical partitions 8a extending along the X-axis direction and horizontal partitions 8b extending along the Y-axis direction of the discharge space. It has a matrix array.

In addition, an intermediate partition 9 is further disposed inside the discharge cells 8R, 8G, and 8B, which will be described below with reference to FIG.

In the present invention, the middle partition wall 9 is a point A where the third electrode 19 and the address electrode 20 cross each other, and is preferably formed inside each discharge cell.

At this time, the height of the intermediate partition 9 is preferably formed to a height lower than the horizontal partition or vertical partition wall, without interfering with the movement of the charge during the surface discharge made between the first electrode, the second electrode and the third electrode, This is to allow the address discharge to occur even at a lower voltage than before due to the electric field size between two electrodes inversely proportional to the distance as in Equation 1 below.

In the following equation, V is the voltage between the two electrodes, d is the distance.

In addition, in FIG. 4, the middle partition 9 is illustrated to have a circular cross section, but it is not necessarily limited thereto. That is, the shape of the intermediate partition 9 can be made freely by selection. For example, it may be implemented in various ways, such as an ellipse or an angular shape formed on the longitudinal axis (the X-axis direction of the drawing) with a long axis.

1, red, green, and blue phosphors are applied to discharge cells 8R, 8G, and 8B, respectively, to form phosphor layers 14R, 14G, and 14B. The phosphor layers 14R, 14G, and 14B emit light by vacuum ultraviolet rays generated by plasma discharge to emit visible light of each color from the discharge cells 8R, 8G, and 8B.

Meanwhile, the first electrode 18 and the second electrode 20 are formed in the first substrate 6 along the direction crossing the address electrode 10 (the Y-axis direction in the drawing), and are arranged at both ends of each discharge cell. Are each placed on. In addition, a third electrode 19 is further disposed between the first electrode 18 and the second electrode 20.

When the panel is driven, a reset and sustain voltage is applied between the first electrode 18 and the second electrode 20 and the third electrode 19 to cause a discharge during a reset period and a sustain period. An address voltage of an address section is applied and driven between the third electrode 19 and the address electrode 10, which will be described later.

In the present invention, each of the electrodes 18, 19, 20 is preferably composed of a transparent electrode and a bus electrode that complements the conductivity of the transparent electrode. The arrangement of the partition and the electrode will be described with reference to FIGS. 5 and 6. Is as follows.

First, FIG. 5 is a view illustrating an arrangement state of electrodes and barrier ribs of the panel according to FIG. 1, wherein first and second electrodes 18 and 20 are respectively along horizontal barrier ribs 8b of discharge cells 8R, 8G, and 8B. Bus electrodes 18a and 20a are alternately positioned, and are formed to extend in one direction (Y direction in the drawing) in parallel with the horizontal partition wall 8b. Accordingly, the bus electrodes 18a and 20a also serve as bus electrodes of adjacent discharge cells with the transverse bulkheads 8b interposed therebetween.

In addition, transparent electrodes 18b and 20b having a portion in contact with the bus electrodes 18a and 20a are extended to the discharge cells on both sides while crossing the bus electrodes 18a and 20a.

Accordingly, the first electrode 18 and the second electrode 20 are alternately disposed along the horizontal partition wall 8b, and the first electrode 18 or the second electrode (along the discharge cell center therebetween) is disposed. The third electrode 19 having the same shape as that of 20 is disposed. At this time, the intermediate partition 9 and the third electrode 19 formed at the center of the discharge cell are located on the same center line, thereby reducing the distance of the address discharge (see FIGS. 2 and 3). Therefore, stable address discharge can occur even at a lower voltage than before, and wall charge can be distributed to the center of the discharge cell.

6 will be described as follows.

Also in the example of FIG. 6, the first electrodes 18 and the second electrodes 20 are provided at both ends of the discharge cells, respectively. However, the first electrode 18 or the second electrode 20 is configured to be electrically separated from the electrodes of adjacent discharge cells with the horizontal partition 8b therebetween.

Therefore, a pair of bus electrodes 18b and 20b are arranged along the horizontal partition wall 8b, and the transparent electrodes 18a and 20a are centered on the discharge cell in contact with only one end of the bus electrodes 18b and 20b. It extends toward. Therefore, the first electrode 18 and the second electrode 20 arranged with the horizontal partition 8b interposed therebetween are electrically separated from each other.

In addition, the third electrode 19 disposed along the discharge cell center between the first electrode 18 and the second electrode 20 has a bus electrode 19b crossing the vertical partition 8b in one direction ( Extending in the Y direction of the drawing). Each transparent electrode 19a is provided for each discharge cell, and protrudes from the center of the discharge cell toward the transparent electrodes 18a and 20a of the first electrode 18 and the second electrode 20, respectively. Therefore, it is preferable to extend toward the first and second electrodes while crossing the bus electrode 19b.

In addition, compared with FIG. 5, the electrode arrangement of FIG. 6 includes a first electrode 18 and a second electrode 20 provided for each discharge cell in a state in which the third electrode 19 is disposed along the center of the discharge cell. Has a structure. On the other hand, as described above, the electrode arrangement of FIG. 5 has a structure in which the first electrode 18 and the second electrode 20 alternate with each other about the third electrode 19.

These electrodes, that is, the first electrode 18, the second electrode 20, and the third electrode 19 are protected from the plasma discharge occurring in the discharge cell by the dielectric layer 27 and the protective layer 29.

Hereinafter, a driving state of a panel according to an exemplary embodiment of the present invention configured as described above with reference to the driving waveform diagram of FIG. 7 will be described.

(I) Reset section

During this period, the third electrode (hereinafter, referred to as a scan electrode) in the center of the discharge cell while the first and second electrodes (hereinafter, the common electrode) 18 and 20 provided at both ends of the discharge cell are biased at a constant potential ( Apply a ramp waveform that slowly falls from the holding voltage to ground potential. Accordingly, discharge occurs between both ends of the discharge cell around the scan electrode 19 to remove wall charges formed in the previous sustain period.

(II) address section

In the address period, the address pulse is sequentially applied while the scan electrode 19 is biased, and the address voltage is applied to the discharge cells to be discharged. At this time, the common electrode is maintained at the ground voltage. Accordingly, discharge is induced between the scan electrode 19 and the address electrode 19 so that wall charges are accumulated on the scan electrode 19.

By the way, since the intermediate partition is placed between the scan electrode 19 and the address electrode 19, the distance of address discharge is relatively smaller than before. Therefore, due to the electric field size between two electrodes in inverse proportion to the distance, the address discharge is induced even at a lower voltage than before, thereby enabling high-speed driving.

 (III) maintenance section

During this period, the same sustain discharge voltage is alternately applied to the common electrodes 18 and 20 and the scan electrodes 19 to perform discharge for actually displaying an image on the addressed cells. In this case, since the discharge has a symmetrical structure formed between the common electrodes 18 and 20 disposed at both ends of the discharge cell with respect to the scan electrode 19, the discharge has a uniform distribution in the discharge cell. .

As described above, although the present invention has been described by way of limited embodiments and drawings, the present invention is not limited thereto and is intended by those skilled in the art to which the present invention pertains. Of course, various modifications and variations are possible within the scope of equivalents of the claims to be described.

According to the present invention, by disposing the common electrode consisting of the first and second electrodes at both ends of the discharge cell, and by placing the scan electrode in the center of the discharge cell therebetween, the discharge distance is reduced to reduce the discharge voltage in the reset and sustain periods. There is a number. Also, by arranging the middle partition wall having a predetermined height inside the discharge cell, the distribution of wall charges can be uniformed while lowering the discharge voltage of the address section, thereby enabling dispersal-free discharge.

Claims (10)

A front substrate and a back substrate disposed to face each other; Address electrodes formed on the rear substrate; Partition walls arranged in a space between the front substrate and the rear substrate and partitioning closed discharge cells each including a vertical partition wall in a direction parallel to the address electrode and a horizontal partition wall crossing each other; Phosphor layers formed in the discharge cells; First and second electrodes corresponding to each discharge cell while extending in a direction crossing the address electrode on the front substrate; A third electrode disposed between the first electrode and the second electrode to correspond to each of the discharge cells and formed to extend in a direction crossing the address electrode; And, An intermediate partition formed in each of the discharge cells so as to protrude toward the front substrate along a position where the third electrode and the address electrode cross each other; According to the voltage applied to the electrodes, discharge is sequentially generated in a reset period, an address period, and a sustain period, so that the reset period and the sustain period are separated between the first and second electrodes and the third electrode. And a voltage causing a discharge is applied, and an address voltage in an address period is applied between the third electrode and the address electrode to drive the plasma display panel. The method of claim 1, And the intermediate barrier rib is formed at a height lower than that of the horizontal barrier rib or the vertical barrier rib. delete The method of claim 1, And the intermediate partition is positioned at the center of the discharge cell. The method of claim 1, And the third electrode is disposed along a discharge cell center, and the first and second electrodes are alternately disposed therebetween. The method of claim 5, The first electrode and the second electrode is made of a bus electrode that extends while crossing the discharge cell to complement the conductivity of the transparent electrode and the transparent electrode, And the transparent electrode is extended to discharge cells on both sides of the transparent electrode in a state in which the transparent electrode is partially in contact with the bus electrode. The method of claim 6, The third electrode comprises a transparent electrode and a bus electrode extending long while crossing the center of the discharge cell, And the transparent electrode protrudes toward the transparent electrode of the first electrode and the second electrode positioned at both ends of the discharge cell while a part of the transparent electrode is in contact with the bus electrode. The method of claim 1, And the third electrodes are disposed along the centers of the discharge cells, respectively, and the first and second electrodes are arranged along the respective cell cells in pairs therebetween. The method of claim 8, The first electrode and the second electrode is made up of a respective bus electrode extending long while crossing the discharge cell to complement the conductivity of the transparent electrode and the transparent electrode, And the transparent electrode extends into the discharge cell in a state where the transparent electrode is in contact with the bus electrode. The method of claim 9, The third electrode comprises a transparent electrode and a bus electrode extending long while crossing the center of the discharge cell, And the transparent electrode protrudes toward each transparent electrode in a state in which a portion of the transparent electrode is in contact with the bus electrode toward the first electrode and the second electrode of the discharge cell.

Images