KR100545173B1 - A method for manufacturing a semiconductor device using a shallow trench isolation - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a trench in a semiconductor device in a semiconductor device having a shallow trench isolation (STI) structure so as to eliminate the occurrence of STI bridges due to spherical defects. A method of manufacturing a semiconductor device using an STI according to the present invention includes the steps of: i) forming a pad oxide film and a nitride film on a semiconductor substrate; Ii) forming a lower anti-reflection film on the nitride film; Iii) forming a trench mask pattern on the lower anti-reflection film; Iv) dry etching the lower anti-reflective coating under the set first process condition using the trench mask pattern; Iii) dry etching the nitride film using the trench mask pattern under a set second process condition; And iii) further etching the pad oxide layer and the silicon substrate using the second process conditions to form a trench. According to the present invention, it is possible to provide a higher and more stable semiconductor device yield by suppressing a spherical defect of about 0.2 μm that may occur when forming a trench separator of a semiconductor device.

STI, Trench, Defect, Dry Etch, BARC

Description

A method for manufacturing a semiconductor device using a shallow trench isolation

1A to 1D are diagrams illustrating a device isolation layer forming process using STI according to the prior art.

2A to 2G are views illustrating a manufacturing process of a semiconductor device using an STI according to the present invention.

FIG. 3A shows a spherical shape defect source that can occur in the prior art, and FIG. 3B shows a STI bridge generated due to the spherical defect source of FIG. 3A.

4 is a photograph showing that a spherical defect source was removed during fabrication of a semiconductor device using STIs.

5A and 5B are scan map photographs of a silicon wafer showing before and after defects are removed, respectively.

The present invention relates to a method of manufacturing a semiconductor device using shallow trench isolation (STI), and more particularly, to a semiconductor device having an STI structure, the bottom anti-reflective coating (hereinafter referred to as 'BARC') The present invention relates to a method of forming a trench in a semiconductor device so as to remove spherical defects generated during dry etching.

In a semiconductor circuit, it is necessary to electrically isolate various elements such as transistors, diodes, and resistors formed on the semiconductor substrate. In addition, as the integration of semiconductor devices has progressed, fine patterns have been required in manufacturing devices, and the channel length of transistors and the width of field oxide films for device isolation have also been reduced.

As a method for forming such device isolation, a conventional LOCal Oxidation of Silicon (LOCOS) has been most commonly used.

The LOCOS device isolation is performed by sequentially forming a pad oxide film and a nitride film on a silicon substrate, patterning the nitride film, and selectively oxidizing the silicon substrate to form a field oxide film. In the selective oxidation of the silicon substrate, a bird's beak is generated at the end of the field oxide layer as oxygen penetrates into the side of the pad oxide layer under the nitride layer used as a mask. Since the field oxide film is extended to the active region by the length of the buzz beak by such a buzz beak, a so-called short channel effect is generated in which the channel length is shortened and the threshold voltage is increased, resulting in the electrical characteristics of the transistor. Worsens. In particular, the LOCOS device isolation exhibits limitations such as a punch-through occurs in which field oxide films on both sides of the active region are stuck as the channel length is reduced to 0.3 μm or less, thereby not accurately securing the width of the active region. It was.

Therefore, trench device isolation methods have been discussed in recent semiconductor manufacturing processes manufactured with design rules of 0.25 mu m or less. That is, a trench technique of partially etching the semiconductor substrate to form a predetermined trench between the devices and separating the devices is applied.

Recently, a silicon substrate is locally etched to form a trench at the time of device isolation, an insulating film (eg, an oxide film) is deposited, and an insulating film on the active region is etched by a chemical mechanical polishing (CMP) process. A shallow trench isolation (STI) technique is mainly used in which an insulating film remains only in the field region. In particular, the STI technique for forming the trench depth shallower than 3 µm has been applied to design rules of 0.15 µm or less without major problems.

The STI process may include forming a trench by etching a silicon substrate to a predetermined depth, depositing an insulating layer on the trench and the substrate, and etching the insulating layer by etching the entire surface by a back etching or a CMP method. Filling or filling the inside with an insulating film. Currently, undoped silicate glass (USG), tetra-ethyl-ortho-silicate (TEOS), high temperature oxide (HTO), or a combination thereof is used as an oxide film to fill a trench. The above materials have a lower heat budget and a higher throughput than the thermal oxide formed by the oxidation process, while the wet etching rate is fast. Therefore, when the trench oxide layer filled with the above materials is exposed to the surface, the trench oxide layer is etched much faster than the active region when the photoresist strip or hydrogen fluoride (HF) wet etching is performed in a subsequent process.

Hereinafter, a process of forming a device isolation layer using the STI technique according to the prior art will be described in detail with reference to FIGS. 1A to 1D.

1A to 1G are diagrams illustrating a semiconductor device isolation process using the STI technique according to the prior art.

As shown in FIG. 1A, a pad oxide film 13 and a nitride film 15 made of a thermal oxide film are sequentially formed on the silicon substrate 11.

Next, a photoresist (PR) 17 is applied on the pad oxide film 13 and the nitride film 15 (see FIG. 1B), and the photoresist film 17 is exposed and removed so that only the upper side of the device isolation region is removed. It develops to form the trench mask pattern 17 '(refer FIG. 1C).

Afterwards, the trench is formed by etching the nitride film 15, the pad oxide film 13, and the silicon substrate 11 using a dry etching method using the trench mask pattern 17 ′ as a mask (see FIG. 1D). The trench thus formed is for forming a shallow trench isolation (STI) device. Here, reference numeral A denotes an etching site, and a trench is formed in the A portion.

The technology of forming a device isolation layer using the STI technique according to the related art causes problems such as pattern bridge, descum, and CD uniform dimension due to reflection characteristics of the nitride film. There is a problem.

In order to improve the above-described problems of the prior art, a method of forming a trench after forming BARC (Bottom AntiReflective Coating: BARC), which is a lower anti-reflection film that prevents light reflection, is used.

In this case, conventionally, as a process condition for dry etching the BARC, a reaction gas including 10 to 50 sccm of CHF ₃ , 30 to 60 sccm of CF ₄ , and 5 to 15 sccm of O ₂ is used. While maintaining a pressure of mTorr, RF power of 300 to 500 Watts was used.

However, when the trench is formed under the process conditions described above, a problem as shown in FIGS. 3A and 3B occurs.

FIG. 3A shows a spherical shape defect source that can occur in the prior art, and FIG. 3B shows a STI bridge generated due to the spherical defect source of FIG. 3A. Here, E denotes a BARC loss area, F denotes a defect source, and G denotes an STI bridge.

In other words, when dry etching using the conventional process conditions is performed, a spherical defect source is generated, which causes the upper half of the nitride film to be blocked, thereby lowering the isolation characteristics of the semiconductor device, thereby lowering the yield. There is a problem with importing.

 An object of the present invention for solving the above problems is to provide a method for forming a trench of a semiconductor device to remove the spherical defects generated during the dry etching of the lower anti-reflection film.

As a means for achieving the above object, a method of manufacturing a semiconductor device using the shallow trench isolation (Shallow Trench Isolation: STI) according to the present invention,

Iii) forming a pad oxide film and a nitride film on the semiconductor substrate;

Ii) forming a bottom antireflective coating (BARC) on the nitride film;

Iii) forming a trench mask pattern on the lower anti-reflection film;

Iii) dry etching the lower anti-reflection film using the trench mask pattern under a first process condition;

Iv) etching the nitride film using the trench mask pattern under a set second process condition; And

Iii) further etching the pad oxide layer and the silicon substrate using the second process conditions to form a trench;

It includes.

Here, the lower anti-reflection film is preferably coated with a thickness of about 400 ~ 700Å, the trench mask pattern is preferably formed of a photosensitive film of about 4000 ~ 5000Å.

Here, the first process conditions for dry etching the lower anti-reflection film is a reaction gas consisting of 20 to 60 sccm CHF ₃ , 50 to 100 sccm Ar and 20 to 60 sccm O ₂ , and 10 to 50 mTorr Pressure, and a high frequency power (RF Power) of 100 to 200 Watt.

And, in order to track the end point (End Point) of the lower anti-reflection film etching is characterized in that by monitoring the wavelength of about 4000 ~ 5000Å using OES (Optical Emission System) equipment.

Here, the second process conditions for dry etching the nitride film, the reaction gas consisting of 40 to 80 sccm CHF ₃ and 5 to 50 sccm Ar and 3 to 10 sccm O ₂ , a pressure of 30 to 60 mTorr and It consists of high frequency power of 200 to 300 Watts.

And, in order to track the end point of the nitride film etching is characterized in that for monitoring the wavelength of about 3700 ~ 3900Å by using the OES equipment.

Here, the additional etching of step iii) may be further etched by about 50 to 100% than the etching of step iii).

According to the present invention, when dry etching BARC using the first process conditions described above, a higher and more stable yield can be provided by suppressing the occurrence of spherical defects.

Hereinafter, a method of manufacturing a semiconductor device using shallow trench isolation (STI) according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

2A to 2G are views illustrating a manufacturing process of a semiconductor device using an STI according to the present invention.

First, a 100-200 kPa pad oxide film 23 is grown on the silicon substrate 21, and a nitride film 25 of about 1000-2000 kPa is grown thereon (see FIG. 2A). Thereafter, BARC of about 400 ~ 700 kHz is formed (see Figure 2b). Next, a photoresist layer 29 of about 4000 to 5000 m is coated on the BARC 27 (see FIG. 2C), and then the photoresist is patterned to form a trench mask pattern 29 ′ (see FIG. 2D).

Next, the BARC 27 is dry etched under the following first process conditions (see FIG. 2E).

That is, dry etching is performed using a high frequency power of 100 to 200 Watt while maintaining a pressure of 10 to 50 mTorr, wherein the reaction gas is 20 to 60 sccm of CHF ₃ and 50 to 100 sccm of Ar, And 20 to 60 sccm of O ₂ is used. And, in order to track the end point (End Point) of the BARC (27) etching (OES (Optical Emission System) equipment) to monitor the wavelength of about 4000 ~ 5000Å. Here, reference numeral B denotes a portion where the BARC 27 'is etched.

For reference, reference numerals 27 and 27 ′ representing the BARC indicate before and after the pattern is formed, respectively, and reference numerals to be described later mean before and after the change by etching, respectively.

Next, the nitride film 25 is etched, using a second process condition different from the above-described first process condition (see FIG. 2F). That is, the nitride film 25 is etched using a high frequency power of 200 to 300 Watt while maintaining a pressure of 30 to 60 mTorr. In addition, 40 to 80 sccm of CHF ₃ , 5 to 50 sccm of Ar, and 3 to 10 sccm O ₂ are used as the reaction gas. In this case, in order to track the end point of the nitride layer 25 'etching, the wavelength of about 3700 ~ 3900 Å is monitored using an OES device. Here, reference numeral C denotes a portion where the nitride film is etched.

Subsequently, about 50 to 100% of etching is further performed when the pad oxide film 23 'and the silicon substrate 21' are exposed (see FIG. 2G). Here, reference numeral D denotes a trench formed by further etching.

4 shows that a spherical defect source is removed during fabrication of a semiconductor device using STI, so that the aforementioned STI bridge is not generated. On the other hand, Figure 5a shows before the defect is removed, Figure 5b is a scan map (Scan Map) picture of the silicon wafer showing after the defect is removed by the present invention, it can be seen that the yield is increased.

As a result, when BARC is dry etched using the first process conditions described above, spherical defects can be suppressed. That is, as shown in FIG. 4, the above-described STI bridge does not occur, and as a result, the yield of the silicon wafer may be increased as shown in FIG. 5B.

While the present invention has been described by way of example of the preferred embodiments, these embodiments are intended to illustrate and not to limit the invention. It will be apparent to those skilled in the art that various changes, modifications, or adjustments to the above embodiments are possible without departing from the technical details of the present invention.

The method of manufacturing a semiconductor device using the STI according to the present invention can provide a higher and more stable yield of the semiconductor device by suppressing a spherical defect of about 0.2 μm that may occur when forming a trench isolation layer of the semiconductor device.

Claims (8)

In the method for manufacturing a semiconductor device by using shallow trench isolation (STI), Iii) forming a pad oxide film and a nitride film on the semiconductor substrate; Ii) forming a bottom antireflective coating (BARC) on the nitride film; Iii) forming a trench mask pattern on the lower anti-reflection film; Iii) using the trench mask pattern, a reaction gas consisting of 20 to 60 sccm CHF ₃ , 50 to 100 sccm Ar and 20 to 60 sccm O ₂ , a pressure of 10 to 50 mTorr, and a high frequency of 100 to 200 Watt Dry etching the lower anti-reflection film under a first process condition set to electric power; Iii) using the trench mask pattern, a reaction gas consisting of 40 to 80 sccm of CHF ₃ , 5 to 50 sccm of Ar, and 3 to 10 sccm of O ₂ , a pressure of 30 to 60 mTorr, 200 to 300 Watt Dry etching the nitride film under a second process condition set to a high frequency power; And Iii) further etching the pad oxide layer and the silicon substrate using the second process condition to form a trench; Method for manufacturing a semiconductor device using a shallow trench isolation comprising a. delete The method of claim 1, Method of manufacturing a semiconductor device using a shallow trench isolation characterized in that for monitoring the wavelength of 4000 ~ 5000Å using an optical emission system (OES) equipment to track the end point of the etching of the lower anti-reflection film. delete The method of claim 1, Method of manufacturing a semiconductor device using a shallow trench isolation, characterized in that for monitoring the end point of the nitride film etching of the wavelength of about 3700 ~ 3900Å using an OES equipment. The method of claim 5, The additional etching of the step iii) is further etched by about 50 to 100% than the etching of the iii) step. The method of claim 6, The lower anti-reflection film is a manufacturing method of a semiconductor device using a shallow trench isolation, characterized in that coating about 400 ~ 700Å. The method of claim 6, The trench mask pattern is a semiconductor device manufacturing method using a shallow trench isolation, characterized in that the photosensitive film of about 4000 ~ 5000 ~.

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