KR100535357B1 - 타이밍 제어기 - Google Patents
타이밍 제어기 Download PDFInfo
- Publication number
- KR100535357B1 KR100535357B1 KR10-1999-0064599A KR19990064599A KR100535357B1 KR 100535357 B1 KR100535357 B1 KR 100535357B1 KR 19990064599 A KR19990064599 A KR 19990064599A KR 100535357 B1 KR100535357 B1 KR 100535357B1
- Authority
- KR
- South Korea
- Prior art keywords
- signal
- voltage level
- mode selection
- selection signal
- output
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/08—Details of timing specific for flat panels, other than clock recovery
Abstract
Description
Claims (3)
- 박막 트랜지스터 액정표시 장치에 있어서,클럭 신호 및 인에이블 신호를 입력하여 모드선택신호가 제1 전압레벨을 가질때 정상적인 컨트롤 신호를 출력하는 컨트롤 프로세서 수단과,상기 모드선택신호가 제1 전압레벨을 가질 때 클럭 펄스신호의 변화구간에 따라 응답하여 계수된 n비트 데이타를 저장 및 출력하고 상기 모드선택신호가 제2 전압레벨을 가질 때 n비트 데이타를 리셋 상태로 만드는 n개의 D 플립플럽으로 구성된 래지스터 수단과,상기 모드선택신호에 의해 각각의 화소 데이타 신호와 상기 레지스터 수단의 출력 신호를 데이타 프로세스 수단으로 선택적으로 전달하는 멀티플렉서 수단을 포함하여 구성된 것을 특징으로 하는 타이밍 제어기.
- 제 1 항에 있어서,상기 제1 전압레벨은 '로직하이' 전압레벨이고,상기 제2 전압레벨은 '로직로우' 전압레벨인 것을 특징으로 하는 타이밍 제어기.
- 제 1 항에 있어서, 상기 멀티플렉서 수단은상기 모드선택신호가 '로직로우' 전압레벨일 때는 외부에서 입력된 각각의 화소 데이타 신호를 상기 데이타 프로세스 수단으로 스위칭해 주고,상기 모드선택신호가 '로직하이' 전압레벨일 때는 상기 레지스터 수단의 출력 신호를 상기 데이타 프로세스 수단으로 스위칭해 주는 것을 특징으로 하는 타이밍 제어기.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-1999-0064599A KR100535357B1 (ko) | 1999-12-29 | 1999-12-29 | 타이밍 제어기 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-1999-0064599A KR100535357B1 (ko) | 1999-12-29 | 1999-12-29 | 타이밍 제어기 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20010064409A KR20010064409A (ko) | 2001-07-09 |
KR100535357B1 true KR100535357B1 (ko) | 2005-12-09 |
Family
ID=19631873
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR10-1999-0064599A KR100535357B1 (ko) | 1999-12-29 | 1999-12-29 | 타이밍 제어기 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100535357B1 (ko) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7127631B2 (en) | 2002-03-28 | 2006-10-24 | Advanced Analogic Technologies, Inc. | Single wire serial interface utilizing count of encoded clock pulses with reset |
CN108024149B (zh) * | 2017-12-18 | 2020-09-04 | 海信视像科技股份有限公司 | TCON板通过单条连接线向SoC芯片传输信号的方法、TCON板及电视机 |
CN108172180B (zh) * | 2017-12-18 | 2020-06-05 | 深圳市华星光电技术有限公司 | 一种液晶显示器的驱动装置及其复位的方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5329533A (en) * | 1991-12-26 | 1994-07-12 | At&T Bell Laboratories | Partial-scan built-in self-test technique |
KR19980028174A (ko) * | 1996-10-21 | 1998-07-15 | 김광호 | 선형 궤환 쉬프트레지스터, 다중 입력기호 레지스터 및 이들을 이용한 내장 자기 진단회로 |
KR19990029299A (ko) * | 1997-09-16 | 1999-04-26 | 포만 제프리 엘 | 로직 회로 테스트용 셀프 테스트 회로를 포함한 집적 회로 및 그 테스트 방법 |
KR20000013809A (ko) * | 1998-08-13 | 2000-03-06 | 윤종용 | 선형궤환 쉬프트 레지스터를 사용한 내장 자기진단 장치 |
-
1999
- 1999-12-29 KR KR10-1999-0064599A patent/KR100535357B1/ko active IP Right Grant
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5329533A (en) * | 1991-12-26 | 1994-07-12 | At&T Bell Laboratories | Partial-scan built-in self-test technique |
KR19980028174A (ko) * | 1996-10-21 | 1998-07-15 | 김광호 | 선형 궤환 쉬프트레지스터, 다중 입력기호 레지스터 및 이들을 이용한 내장 자기 진단회로 |
KR19990029299A (ko) * | 1997-09-16 | 1999-04-26 | 포만 제프리 엘 | 로직 회로 테스트용 셀프 테스트 회로를 포함한 집적 회로 및 그 테스트 방법 |
KR20000013809A (ko) * | 1998-08-13 | 2000-03-06 | 윤종용 | 선형궤환 쉬프트 레지스터를 사용한 내장 자기진단 장치 |
Also Published As
Publication number | Publication date |
---|---|
KR20010064409A (ko) | 2001-07-09 |
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