KR100508950B1 - Driving method of plasma display panel and plasma display device - Google Patents

Abstract

In the driving method of the plasma display panel, a falling ramp voltage is applied to the scan electrode to initialize the wall charge state of the discharge cell in the reset period. At this time, the sustain electrode is maintained at a high voltage during the initial period when the falling ramp voltage is applied, and the voltage of the sustain electrode is lowered to the normal voltage later in the period when the falling ramp voltage is applied. In this way, since the wall charge of the address electrode is erased in the reset period, the amount of voltage applied to the address electrode in the address period can be reduced.

Description

Plasma display panel driving method and plasma display device {DRIVING METHOD OF PLASMA DISPLAY PANEL AND PLASMA DISPLAY DEVICE}

The present invention relates to a plasma display panel (PDP) and a driving method thereof.

A plasma display panel is a flat panel display device that displays characters or images using plasma generated by gas discharge, and tens to millions or more of pixels are arranged in a matrix form according to their size. First, the structure of the plasma display panel will be described with reference to FIGS. 1 and 2.

1 is a partial perspective view of a plasma display panel, and FIG. 2 shows an electrode arrangement diagram of the plasma display panel.

As shown in FIG. 1, the plasma display panel includes two glass substrates 1 and 6 facing each other apart. On the glass substrate 1, the scan electrode 4 and the sustain electrode 5 are formed in pairs and in parallel, and the scan electrode 4 and the sustain electrode 5 are covered with the dielectric layer 2 and the protective film 3. have. A plurality of address electrodes 8 are formed on the glass substrate 6, and the address electrodes 8 are covered with the insulator layer 7. The address electrode 8 and the partition 9 are formed on the insulator layer 7 between the address electrodes 8. In addition, the phosphor 10 is formed on the surface of the insulator layer 7 and on both sides of the partition wall 9. The glass substrates 1 and 6 are disposed to face each other with the discharge space 11 therebetween so that the scan electrode 4, the address electrode 8, the sustain electrode 5, and the address electrode 8 are orthogonal to each other. The discharge space 11 at the intersection of the address electrode 8 and the paired scan electrode 4 and the sustain electrode 5 forms a discharge cell 12.

As shown in FIG. 2, the electrode of the plasma display panel has a matrix structure of n × m. The plurality of address electrodes A ₁ -A _m are arranged in the vertical direction, and the plurality of scan electrodes Y ₁ -Y _n and the storage electrodes X ₁ -X _n are arranged in pairs in the horizontal direction.

In general, a plasma display panel is driven by dividing one frame into a plurality of subfields, and gray levels are expressed by a combination of subfields. In general, each subfield includes a reset period, an address period, and a sustain period. The reset period serves to erase the wall charges formed by the previous sustain discharge and to set up the wall charges in order to stably perform the next address discharge. The address period is a period in which a wall charge is accumulated in a cell (addressed cell) that is turned on by selecting a cell that is turned on and a cell that is not turned on in the panel. The sustain period is a period in which sustain discharge is performed to actually display an image in the addressed cells.

As shown in Fig. 3, the reset period consists of a rising ramp period and a falling ramp period. The ramp-up period, the ramp voltage gradually rising toward the voltage V _set at the voltage V _s in a holding state, the address electrode (A) and the sustain electrode (X) to 0V is applied to the scan electrode (Y). While this voltage rises, the first weak reset discharge occurs in each of the discharge cells from the scan electrode Y to the address electrode A and the sustain electrode X, respectively. As a result, negative wall charges are accumulated in the scan electrode Y, and positive wall charges are accumulated in the address electrode A and the sustain electrode X at the same time. In other words, wall charges are accumulated in the protective layer 3 covering the scan electrode Y and the sustain electrode X and the insulator layer 7 covering the address electrode A, but the scan electrode Y is described below for convenience. ), The wall charges are accumulated in the sustain electrode X and the address electrode A. FIG.

Subsequently, in the falling ramp period, the ramp voltage gradually falling toward 0 V from the V _s voltage is applied to the scan electrode Y while the sustain electrode X is maintained at the V _e voltage. While this ramp voltage falls, the second weak reset discharge occurs again in all the discharge cells. As a result, the negative wall charges of the scan electrode Y decrease and the positive wall charges of the sustain electrode X and the address electrode A decrease.

At this time, since a large amount of the positive wall charges accumulated in the address electrode A is erased in the conventional waveform, a high voltage must be applied to the address electrode A for address discharge in the address period. That is, a switch having a high breakdown voltage should be used in a circuit for applying a voltage to the address electrode A, and there is a problem in that power consumption increases due to the high voltage.

An object of the present invention is to provide a method of driving a plasma display panel that can cause an address discharge at a low voltage.

In order to solve this problem, the present invention increases the voltage applied to the sustain electrode in some of the second half of the reset period.

According to one feature of the invention, a plurality of first and second electrodes and a plurality of third electrodes intersecting the first and second electrodes are discharged by adjacent first, second and third electrodes. A method of driving a plasma display panel in which cells are formed is provided. The driving method includes gradually setting a wall charge in the discharge cell by gradually decreasing the voltage of the first electrode from the first voltage to the second voltage during the reset period, and selecting the discharge cell to be selected among the discharge cells during the address period. And applying a third voltage and a fourth voltage to the first electrode and the third electrode, respectively. During the period in which the voltage of the first electrode falls from the first voltage to the second voltage, the first electrode maintains the fifth voltage at the second electrode for a predetermined period and then applies a sixth voltage lower than the fifth voltage to the second electrode.

In this case, the sixth voltage may be a voltage having the same level as the voltage applied to the second electrode during the address period.

The voltage applied to the second electrode may be changed from a sixth voltage to a fifth voltage in a step form or to a fifth voltage after the second electrode is floated. Alternatively, the voltage applied to the second electrode may be gently changed from the sixth voltage to the fifth voltage. In this case, the speed of falling from the sixth voltage to the fifth voltage may be the same as the speed of falling from the first voltage to the second voltage.

In addition, the voltage of the first electrode may be gently lowered with at least one slope from the first voltage to the second voltage. Alternatively, the period of lowering the voltage of the first electrode by a predetermined voltage and the period of floating the first electrode may be repeated to decrease the voltage of the first electrode from the first voltage to the second voltage.

According to another feature of the present invention, a plasma display includes a plurality of first electrodes formed on a first substrate, and a plurality of address electrodes formed on the second substrate and crossing the first and second electrodes, respectively. A plasma display device including a panel and a driving circuit for applying a driving signal to a first electrode, a second electrode, and a third electrode are provided. The driving circuit gradually lowers the voltage of the first electrode from the first voltage to the second voltage to set the wall charge state of the discharge cells formed by the first electrode, the second electrode, and the third electrode to an addressable state. The voltage of the second electrode is changed from the third voltage to the fourth voltage while the voltage of the first electrode is changed from the first voltage to the second voltage.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention. Like parts are designated by like reference numerals throughout the specification.

A method of driving a plasma display panel according to an exemplary embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

4 is a driving waveform diagram of the plasma display panel according to the first exemplary embodiment of the present invention, and FIG. 5 is a diagram showing wall charge distribution by the driving waveforms of FIGS. 3 and 4. 6 and 7 are diagrams illustrating states of wall voltages and applied voltages according to the driving waveforms of FIGS. 3 and 4, respectively.

4, each of the subfields in the driving waveform according to a first embodiment of the present invention includes a reset period (P _r), an address period (P _a), and a sustain period (P _s). The reset period P _r includes an erase period P _r1 , a rising ramp period P _r2 , and a falling ramp period P _r3 .

The erase period P _r1 of the reset period P _r is a period for erasing electric charges formed by sustain discharge in the sustain period P _s of the previous subfield. The rising ramp period P _r2 is a period for forming wall charges in the scan electrode Y, the sustain electrode X, and the address electrode A, and the falling ramp period P _r3 is in the rising ramp period P _r2 . This is a period in which the formed wall charges are partially erased to facilitate address discharge. An address period (P _a) is a period for selecting a discharge cell to cause sustain discharge in a sustain period of the plurality of discharge cells. Sustain period (P _s) is a period for maintaining discharge in the discharge cells selected by applying a sustain pulse in turn to the scan electrode (Y) and the sustain electrode (X) during the address period (P _a).

In the plasma display panel, a scan / hold driving circuit for applying a driving voltage to the scan electrode Y and the sustain electrode Y in each of the periods P _r , P _a , and P _s , and a driving voltage to the address electrode A, respectively. An address driving circuit for applying a is connected to form one display device.

Referring to FIG. 4, in the driving waveform according to the first exemplary embodiment of the present invention, the sustain electrode X may have a sustain electrode X in _{comparison with the} voltage V _e of FIG. 3 in the first period P _r31 corresponding to the beginning of the falling ramp period P _r3 . After the voltage V _h as high as V _p is applied, the voltage V _{e is} applied to the sustain electrode X in the second period P _r32 corresponding to the later stage of the falling ramp period P _r3 . Then, a ramp voltage that gently decreases toward the reference voltage at the voltage V _s is applied to the scan electrode Y. The falling ramp voltage may be a voltage falling while having a constant slope, or may be a voltage falling while the slope is changed. In this way, the discharge occurs faster in the falling ramp period P _r3 of the driving waveform of FIG. 4 than in the driving waveform of FIG. 3. As a result, the erased amount of the wall charge accumulated in the address electrode A is reduced.

Hereinafter, this relationship will be described in detail with reference to FIGS. 5 to 7.

First, in the rising ramp period P _r2 of FIGS. 3 and 4, the discharge start voltage is higher than the discharge start voltage at the voltage V _s of the scan electrode Y while a voltage of 0 V is applied to the sustain electrode X and the address electrode A. FIG. A ramp voltage is applied which slowly rises to V _set voltage. Then, a weak reset discharge occurs from the scan electrode Y to the address electrode A and the sustain electrode X while the lamp voltage rises. As a result, negative wall charges are accumulated in the scan electrode Y, and positive wall charges are accumulated in the address electrode A and the sustain electrode X at the same time.

At this time, since the potential of the address electrode A has a characteristic of maintaining the intermediate potential between the scan electrode Y and the sustain electrode X, the wall charge state at the end of the rising ramp period P _r2 becomes as shown in FIG. 5. . That is, a potential formed by the voltage V _set applied to the scan electrode Y and the wall charges formed on the scan electrode Y, and the voltage formed on the sustain electrode X and the voltage 0V applied to the sustain electrode X. Wall charges corresponding to the intermediate potentials of the electric potentials by the electric charges are formed in the address electrode A. FIG.

Next, the wall charge state in the falling ramp period P _r3 of the driving waveform according to the first embodiment of the present invention will be described with reference to FIGS. 6 and 7.

First, as in the falling ramp period P _r3 of the driving waveform shown in FIG. 3, the ramp voltage falling from the V _s voltage to the V _n voltage while the V _e voltage is applied to the sustain electrode X is the scan electrode Y. When applied to the internal wall voltage is as shown in FIG. As shown in FIG. 6, the voltage difference between the scan electrode Y and the sustain electrode X (hereinafter referred to as an “applied voltage”) due to a voltage applied from the outside is represented by (V _s −V _e ) at the voltage _n -V _e ) gently falls to the voltage. When the wall voltage V _w between the scan electrode Y and the sustain electrode X is V _w0 at the end of the rising ramp period P _r2 of FIG. 3, the voltage V _w0 and the applied voltage V _in are set to V _w0 . The discharge starts when the voltage difference between them becomes larger than the discharge start voltage V _f . In addition, when the ramp voltage is gently applied and the discharge occurs, the wall voltage inside the discharge cell is also reduced at the same speed as the applied voltage V _in . Since this principle is described in detail in US Patent No. 5,745,086, detailed description thereof will be omitted.

However, as shown in FIG. 4, in the first embodiment P _r31 of the falling ramp period P _r3 , the voltage (V _e + V _p ) is applied to the sustain electrode X as shown in FIG. 4. In two periods P _r32 , a V _e voltage is applied to the sustain electrode X. Therefore, as shown in FIG. 7, in the first period P _r31 , the applied voltage V _in is gradually lowered from the voltage (V _s -V _e -V _p ) to the voltage (V _n -V _e ) and the second period is At P _r32 , the applied voltage V _in is slowly lowered from the voltage (V _n -V _e + V _p ) to the voltage (V _n -V _e ). At this time, the initial value (V _w0) and applied voltage (V _in) is as a weak discharge start when the discharge start voltage (V _f) above, the wall voltage (V _w) difference between the wall voltage (V _w) is the applied voltage Decrease at the same rate as (V _in ). In the second period P _r32 , since the difference between the wall voltage V _w and the applied voltage V _in is smaller than the discharge start voltage V _f , the discharge between the sustain electrode X and the scan electrode Y is prevented. Suppressed.

6 and 7, in the driving waveform according to the first embodiment of the present invention, discharge occurs faster than the driving waveform of FIG. 3 in the falling ramp period P _r3 . At this time, the potential of the sustain electrode X and the scan electrode Y is higher than the driving waveform of FIG. 3 at the beginning of the falling ramp period P _r3 . That is, the voltage applied to the sustain electrode X from the outside is higher by V _p than the drive waveform of FIG. 3, and the voltage applied to the scan electrode Y at the start of discharge is higher than the drive waveform of FIG. 3. On the basis of the time elapsed after the start of the discharge, while the discharge is continued and the applied voltage V _in decreases, the sustain electrode X and the scan electrode Y in the driving waveform according to the first embodiment are reduced. The potential is higher than the potential in the drive waveform of FIG. 3.

Therefore, according to the first embodiment of the present invention, the average potential of the sustain electrode X and the scan electrode Y becomes higher than the average potential in the driving waveform of FIG. 3 during the weak discharge. However, as described above, since the potential of the address electrode A has a characteristic of maintaining the average potential between the sustain electrode X and the scan electrode Y, the potential of the address electrode A must be higher than that of the driving waveform of FIG. 3. do. However, since the voltage applied to the address electrode A is the same in the driving waveforms of FIGS. 3 and 4, the amount of the positive wall charges formed on the address electrode A is the amount of wall charges in the driving waveform of FIG. 3. More. That is, less positive wall charges accumulated in the address electrode A are lost than in FIG.

In the second period P _r31 of the ramp falling period P _r3 , the voltage of the sustain electrode X is lowered back to the voltage V _e , so that the difference between the wall voltage V _w and the applied voltage V _in starts discharge. lowered than the voltage (V _f), the discharge can be suppressed between the scan electrode (Y) and the sustain electrode (X). In addition, in the second period P _r32 , a discharge occurs between the scan electrode Y and the address electrode A through priming particles generated by the discharge between the scan electrode Y and the sustain electrode X. . That is, in the final part of the ramp falling period P _r3 , the weak discharge between the scan electrode Y and the address electrode A is smoothly performed while the discharge between the scan electrode Y and the sustain electrode X is suppressed. Therefore, the wall voltage between the scan electrode Y and the address electrode A is precisely controlled.

As described above, according to the first embodiment of the present invention, the loss of the positive wall charges formed in the address electrode A is reduced, and the wall voltage between the address electrode A and the scan electrode Y is precisely controlled. . Accordingly, is increased, the wall voltage between the address electrode (A) and the scan electrode (Y) to reduce the size of the voltage (V _a) applied to the address electrode (A) for selecting discharge cells in the address period (P _a) Can be.

That is, in the address period _Pa , while the other scan electrode Y is maintained at the V _sc voltage, the scan electrode Y is sequentially selected by applying the voltage V _n to the scan electrode Y. And it is applied to the address voltage (V _a) to the address electrode (A) to form a discharge cell to be selected among the discharge cells formed by the scan electrode (Y) is applied to the voltage V _n. Then, the voltage applied to the address electrodes (A) (V _a) and the wall voltage due to the wall charges formed on the difference and the address electrode (A) and scan electrodes (Y) of the voltage (V _n) applied to the scan electrode (Y) This causes address discharge. At this time, as described above, since a large amount of positive wall charges are formed on the address electrode A and the wall voltage is high, the magnitude of the V _a voltage can be reduced.

Next, in the sustain period P _s , a sustain pulse is sequentially applied to the scan electrode Y and the sustain electrode X. A sustain pulse is a pulse to the scan electrode (Y) and the sustain electrode (X) to a voltage difference shift voltage V _s and -V _s to the voltage. The voltage V _{s is a} voltage lower than the discharge start voltage between the scan electrode Y and the sustain electrode X. If the address period (P _a), the wall voltage between the scan electrode (Y) and the sustain electrode (X) by the address discharge are formed on the scan electrode by the wall voltage and V _s the voltage (Y) and the sustain electrode (X) Discharge occurs at.

In the first embodiment of the present invention, when the voltage of the sustain electrode X is changed from the voltage V _{h to the} voltage V _{e, the} voltage is changed to a step shape as shown in FIG. 4, but may be different. Hereinafter, such an embodiment will be described with reference to FIGS. 8 and 9.

8 and 9 are driving waveform diagrams of the plasma display panel according to the second and third embodiments of the present invention, respectively.

That is, _referring to FIG. 8, in the second period P _r32 of the falling ramp period P _r3 , the voltage applied to the sustain electrode X gradually drops from the voltage V _{h to the} voltage V _e . In this case, the speed at which the voltage applied to the sustain electrode X falls may be the same as or faster than the speed at which the voltage applied to the scan electrode Y falls.

When the voltage of the sustain electrode X is gently lowered in the form of a lamp as described above, the voltage is changed by a small current so that the influence of the voltage change of the sustain electrode X on the voltage change of the scan electrode Y is reduced. . That is, since a general lamp voltage generation circuit is implemented to supply only a small current, if the voltage of the sustain electrode X is changed suddenly while the voltage of the scan electrode Y is changed into a lamp shape, the scan electrode in operation of the lamp ( Since the current is not properly supplied to Y), the voltage of the scan electrode Y may be affected by the voltage change of the sustain electrode X momentarily. However, as shown in FIG. 8, when the sustain electrode X is changed into a lamp shape, only a small current is required for the voltage change, so that the voltage of the scan electrode Y may not be affected by the voltage change of the sustain electrode X.

9, the sustain electrode X is floated for a predetermined time in the second period P _r32 of the falling ramp period P _r3 , and then a V _e voltage is applied to the sustain electrode X. In this case, since the falling lamp is applied to the scan electrode Y and the sustain electrode X in the floating state while the current is flowing does not receive current, the potential of the sustain electrode X changes in the potential of the scan electrode Y. Follow. Therefore, the sustain electrode X can be changed into a lamp shape without a circuit for applying the lamp voltage to the sustain electrode X, and thus the sustain electrode X is not affected without affecting the lamp voltage applied to the scan electrode Y. A bias change of is possible.

In the first embodiment of the present invention, the waveforms of applying the falling ramp voltage after applying the rising ramp voltage in all the reset periods are described. Is also applied to a driving waveform in which only a falling ramp voltage is applied in the negative reset period.

Hereinafter, such an embodiment will be described in detail with reference to FIG. 10. 10 is a driving waveform diagram of a plasma display panel according to a fourth embodiment of the present invention.

As shown in FIG. 10, in the driving waveform according to the fourth exemplary embodiment of the present invention, a main reset period P _{r_main} is formed in a first subfield among a plurality of subfields forming one frame, and in a subsequent subfield. A negative reset period P _{r_sub} is formed.

In the main reset period P _{r_main} , which is the reset period of the first subfield, the rising ramp waveform is applied after the rising ramp waveform is applied as shown in the driving waveform of FIG. 4. Only the falling ramp waveform is applied in the sub-reset period P _{r_sub which} is the reset period of the second and subsequent subfields.

Generally, a rising ramp waveform is applied to the scan electrode Y to form a large amount of wall charges in the discharge cells in the reset period. However, in the second and subsequent subfields, since a large amount of wall charges are already formed in the discharge cells emitting in the sustain period of the previous subfield by the sustain discharge, it is not necessary to form the wall charges in the reset period. In addition, since the wall charge state formed in the reset period is not changed in the discharge cells that do not emit light in the sustain period, the reset operation does not need to be performed again in the next subfield. In this state, if only the falling ramp waveform is applied to the scan electrode Y, no discharge occurs, and thus the discharge cell remains in the reset state.

In the last subfield, after the sustain period P _s is over, the same waveform as that applied in the erase period P _r1 of FIG. 4 is applied to the sustain electrode X to erase the wall charges formed by the sustain discharge. Then, the discharge cells can be reset again in the main reset period P _{r_main} of the first subfield of the next frame. In the fourth embodiment of the present invention, the main reset period P _{r_main is} provided only in the first subfield on the basis of one frame. Alternatively, the main reset period P _{r_main} may be provided in the other subfields.

As shown in FIG. 10, when the falling ramp voltage is applied to the scan electrode Y in the main reset period P _{r_main} and the sub reset period P _{r_sub} , the sustain electrode X is applied in the first period P _r31 . The voltage V _h is applied to the sustain voltage X _{e, and the} voltage V _e is applied to the sustain electrode X in the second period P _r32 . Then, as described earlier by accumulating a larger amount of wall charges on the address electrodes (A) it can reduce the magnitude of the voltage applied to the address electrode (A) during the address period (P _a). In the driving waveforms of FIG. 10, the voltage of the sustain electrode X may be changed as shown in FIGS. 8 and 9.

As described above, in the first to fourth embodiments of the present invention, a voltage gradually falling in the reset period is applied to the scan electrode Y. However, the floating may be repeatedly applied to the scan electrode Y in the reset period. . Hereinafter, such an embodiment will be described in detail with reference to FIG. 11.

11 is a driving waveform diagram of a plasma display panel according to a fifth embodiment of the present invention.

As shown in FIG. 11, in the driving waveform according to the fifth embodiment of the present invention, the falling ramp waveform applied to the scan electrode Y in the reset period is applied to the scan electrode Y after the voltage drops by a predetermined voltage. Plotting is repeated. In other words, the voltage applied to the scan electrode Y is lowered by a predetermined voltage and the operation of floating the scan electrode Y by cutting off the voltage supplied to the scan electrode Y is repeated.

If the discharge occurs in the discharge cell by the voltage applied to the scan electrode Y while this operation is repeated, the wall charges formed in the discharge cell are erased. When the scan electrode Y is floated after the discharge is started, even when a small amount of wall charges are lost in the discharge cell, the voltage in the discharge cell is rapidly decreased to eliminate the discharge. When the voltage of the scan electrode Y drops by a predetermined voltage, the discharge starts. When the scan electrode Y floats after the discharge starts, the voltage inside the discharge cell decreases rapidly and the discharge disappears. The charge is erased. In other words, it is possible to precisely control the amount of wall charges erased.

By repeating the floating operation after applying the falling voltage to the scan electrode Y as described above, it is possible to control the desired state while erasing the wall charge inside the discharge cell little by little. That is, the wall charge can be precisely erased by repeating the operation of erasing a small amount of the wall charge at a time.

Hereinafter, the strong discharge disappearance due to the floating will be described in detail with reference to FIGS. 12A to 12D. Since the discharge occurs between the sustain electrode X and the scan electrode Y, the discharge cell will be described based on the sustain electrode X and the scan electrode Y.

12A is a diagram of a discharge cell formed by the sustain electrode and the scan electrode, and FIG. 12B is an equivalent circuit diagram of FIG. 12A. FIG. 12C is a diagram illustrating a state in which an external voltage is applied to the discharge cell of FIG. 12A. FIG. 12D is a diagram illustrating a floating state when discharge occurs in the discharge cell of FIG. 12A. In FIG. 12A, the scan electrode 4 and the sustain electrode 5 are initially provided for convenience of explanation. And + It is assumed that a charge of is formed. The charge is formed on the dielectric layer of the electrode, but will be described below as being formed on the electrode for convenience of description.

As shown in FIG. 12A, the scan electrode 4 is electrically connected to the externally applied voltage V _in through the switch SW, and the sustain electrode 5 is electrically connected to the V _h voltage. A dielectric layer 2 is formed inside the scan electrode 4 and the sustain electrode 5, respectively. Discharge gas (not shown) is injected between the dielectric layers 2, and a region between the dielectric layers 2 forms a discharge space 11.

In this case, since the scan and sustain electrodes 4 and 5, the dielectric layer 2, and the discharge space 11 form a capacitive load, they may be equivalently represented by the panel capacitor C _p as shown in FIG. 12B. And the dielectric constant of the two dielectric layers 2 The voltage across the discharge space 11 is referred to as V _g . The thickness of the two dielectric layers 2 is equal (d ₁ ), and the distance (distance of the discharge space) between the two dielectric layers 2 is d ₂ .

First, referring to FIG. 12C, the voltage V _g1 inside the discharge space at the time when the switch SW is turned on and the external voltage V _in is applied to the scan electrode 4 (that is, when the discharge is not started) is performed. Calculate At this time, the scan electrode 4 and the sustain electrode 5 are respectively- And + Assume that as much charge is applied. Applying the Gaussian law of the internal dielectric layer 2, the electric field (E ₁₎ and the electric field in the discharge space (11) (E ₂₎ is given by the respective expressions (1) and (2).

here, Is the dielectric constant inside the discharge space.

The voltage V _e -V _in applied to the outside is represented by Equation 3 by the relationship between the electric field and the distance, and from Equations 1 to 3, the voltage inside the discharge space is expressed by Equation 4.

Where V _w is the wall charge in the discharge space 11 ( With voltage formed by Where α is to be.

Next, discharge occurs between the scan electrode 4 and the sustain electrode 5 by the voltage V _in applied to the scan electrode 4 from the outside. 12D, the wall charges formed on the scan electrode 4 and the sustain electrode 5 by discharge are The switch SW is turned off and then the scan electrode 4 is floated.

Then, since no charge flows from the outside in the floating state, the amount of charge applied to the scan electrode 4 and the sustain electrode 5 is also- And + Is maintained. At this time, by applying the Gaussian law of the dielectric layer (2) of the internal electric field (E ₁₎ and the electric field in the discharge space (11) (E ₂₎ it is given by the respective expressions (1) and 5.

When the voltage V _{g2 in the} discharge space is calculated from Equations 5 and 4, Equation 6 is obtained.

As can be seen from Equation 6, it can be seen that there is a voltage drop due to the wall charge that disappears when the switch SW is turned off (floating state). As a result, in the floating state, even if the wall charges are slightly dissipated, the voltage in the discharge space 11 decreases abruptly, so that the voltage between the electrodes becomes less than or equal to the discharge start voltage.

As described above, in the fifth embodiment of the present invention, the falling ramp waveform in the form of repeating voltage application and floating in the reset period is applied to the scan electrode Y to precisely control the wall charge. In this way, since the discharge is extinguished by eliminating the wall charge much less than before, fine control of the wall charge is possible. In addition, the reset by the ramp waveform which is continuously falling gently controlled the wall charge by preventing the strong discharge by gently lowering the voltage applied to the discharge space through a constant voltage change amount. In the case of such a lamp voltage, since the intensity of the discharge is controlled by the slope of the lamp, the lamp voltage slope constraint for the wall charge control is very strong, so that the time required for reset is lengthened. On the contrary, in the case of a reset using floating as in the fifth embodiment, the time required for the reset can be shortened because the intensity of discharge is used as the voltage drop principle according to the erasure of the wall charge.

And by applying a V _e voltage after applying a V _h voltage to the sustain electrode (Y) while the first to fourth embodiments and, like the dropping ramp waveform to the scan electrode (Y) in the fifth embodiment of the present invention is The amount of wall charges dissipated in the address electrode A can be reduced.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

As described above, according to the present invention, the amount of wall charges of the address electrodes is erased in the reset period. Therefore, the magnitude of the voltage applied to the address electrode in the address period can be reduced.

1 is a schematic partial perspective view of a plasma display panel.

2 is an arrangement diagram of electrodes of a plasma display panel.

3 is a driving waveform diagram of a plasma display panel according to the prior art.

4 is a driving waveform diagram of a plasma display panel according to a first embodiment of the present invention.

FIG. 5 is a diagram illustrating wall charge distribution by the driving waveforms of FIGS. 3 and 4.

6 and 7 are diagrams illustrating states of wall voltages and applied voltages according to the driving waveforms of FIGS. 3 and 4, respectively.

8 to 11 are driving waveform diagrams of the plasma display panel according to the second to fifth embodiments of the present invention, respectively.

12A is a diagram illustrating a discharge cell formed by a sustain electrode and a scan electrode.

12B is an equivalent circuit diagram of FIG. 12A.

FIG. 12C is a diagram illustrating a state in which an external voltage is applied to the discharge cell of FIG. 12A.

FIG. 12D is a diagram illustrating a floating state when discharge occurs in the discharge cell of FIG. 12A.

Claims (18)

A plurality of first electrodes and a plurality of second electrodes, and a plurality of third electrodes extending in a direction crossing the first and second electrodes, the first electrodes, the second electrodes and the third electrodes; In a method of driving a plasma display panel in which discharge cells are formed, Gradually lowering the voltage of the first electrode from the first voltage to the second voltage during a reset period to set the wall charge in the discharge cell; and Applying a third voltage and a fourth voltage to the first electrode and the third electrode of a discharge cell to be selected among the discharge cells during an address period, During a period in which the voltage of the first electrode falls from the first voltage to the second voltage, a fifth voltage is applied to the second electrode during a first period and the fifth voltage during a second period after the first period. A method of driving a plasma display panel applying a lower sixth voltage to the second electrode. The method of claim 1, And the first electrode, the second electrode, and the third electrode are a scan electrode, a sustain electrode, and an address electrode, respectively. The method of claim 1, And the sixth voltage is at the same level as the voltage applied to the second electrode during the address period. The method according to any one of claims 1 to 3, And a voltage applied to the second electrode is changed in a step form from the fifth voltage to the sixth voltage. The method according to any one of claims 1 to 3, And a voltage applied to the second electrode gradually drops from the fifth voltage to the sixth voltage. The method of claim 5, And the speed of falling from the fifth voltage to the sixth voltage is the same as the speed of falling from the first voltage to the second voltage. The method according to any one of claims 1 to 3, And a sixth voltage is applied to the second electrode during the second period after the second electrode is floated after the first period. The method according to any one of claims 1 to 3, And the voltage of the first electrode gradually decreases with at least one slope from the first voltage to the second voltage. The method according to any one of claims 1 to 3, The decreasing of the voltage of the first electrode from the first voltage to the second voltage may include: decreasing the voltage of the first electrode by a predetermined voltage and repeating the floating period of the first electrode. Driving method. The method of claim 9, And the predetermined voltage is constant during a period in which the voltage of the first electrode falls from the first voltage to the second voltage. The method of claim 9, And the predetermined voltage is changed at least once during a period in which the voltage of the first electrode falls from the first voltage to the second voltage. A plasma display panel including a plurality of first electrodes and a plurality of second electrodes and a plurality of address electrodes extending in a direction crossing the first and second electrodes, and A driving circuit for applying a driving signal to the first electrode, the second electrode, and the third electrode; The driving circuit may change the voltage of the first electrode from the first voltage to the second voltage to set the wall charge state of the discharge cells formed by the first electrode, the second electrode, and the third electrode to an addressable state. Gradually drop and apply a third voltage to the second electrode during a first period of time during which the voltage of the first electrode is changed from the first voltage to the second voltage, and a second period after the first period. And applying a fourth voltage different from the third voltage to the second electrode. The method of claim 12, The voltage of the first electrode is gently dropped with at least one slope from the first voltage to the second voltage. The method of claim 12, The period of lowering the voltage of the first electrode by a predetermined voltage and the period of floating the first electrode are repeated so that the voltage of the first electrode drops from the first voltage to the second voltage. The method according to any one of claims 12 to 14, The fourth voltage is lower than the third voltage, and the second electrode is maintained at the third voltage during the first period. The method of claim 15, And a voltage of the second electrode is changed in a step form from the third voltage to the fourth voltage. The method of claim 15, And a voltage of the second electrode changes as the voltage of the first electrode gradually decreases from the first voltage to the second voltage. The method of claim 15, And a voltage of the second electrode is changed from the third voltage to a fourth voltage after the second electrode is floated.