KR100497250B1 - A plasma display panel and a diriving method of the same - Google Patents

Abstract

The present invention relates to an erase waveform of a plasma display panel.

According to the present invention, by rapidly increasing or decreasing the applied voltage to the extent that strong discharge occurs in the erasing period, by floating the electrode to reduce the magnitude of the voltage applied to the inside of the discharge space during the discharge process by discharging itself, Fine control of wall charge.

Description

Plasma display panel and driving method thereof {A PLASMA DISPLAY PANEL AND A DIRIVING METHOD OF THE SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel (PDP) and a driving method thereof, and more particularly, to a method of driving an erase waveform of a plasma display panel.

Recently, flat display devices such as liquid crystal displays (LCDs), field emission displays (FEDs), and PDPs have been actively developed. Among these flat panel display devices, PDPs have advantages of higher luminance and luminous efficiency and wider viewing angles than other flat panel display devices. Therefore, the PDP is in the spotlight as a display device to replace the conventional cathode ray tube (CRT) in a large display device of 40 inches or more.

PDPs are flat display devices that display characters or images using plasma generated by gas discharge, and dozens to millions or more of pixels are arranged in a matrix according to their size. Such PDPs are classified into a direct current type (DC type) and an alternating current type (AC type) according to the shape of the driving voltage waveform applied and the structure of the discharge cell.

In the DC-type PDP, since the electrode is exposed to the discharge space as it is, the current flows in the discharge space while voltage is applied, and there is a disadvantage in that a resistance for current limitation must be made for this purpose. On the other hand, in the AC type PDP, the electrode covers the dielectric layer, so the current is limited by the formation of a natural capacitance component, and the electrode is protected from the impact of ions during discharge.

1 is a partial perspective view of an AC plasma display panel.

As shown in FIG. 1, the scan electrode 4 and the sustain electrode 5 covered with the dielectric layer 2 and the protective film 3 are arranged in parallel on the first substrate 1. A plurality of address electrodes 8 covered with the insulator layer 7 are provided on the second substrate 6. A partition 9 is formed on the insulator layer 7 between the address electrodes 8 in parallel with the address electrode 8. In addition, the phosphor 10 is formed on the surface of the insulator layer 7 and on both side surfaces of the partition wall 9. The first substrate 1 and the second substrate 6 may be arranged with the discharge space 11 therebetween so that the scan electrode 4 and the address electrode 8 and the sustain electrode 5 and the address electrode 8 are orthogonal to each other. It is arranged toward. The discharge space at the intersection of the address electrode 8 and the pair of the scanning electrode 4 and the sustain electrode 5 forms a discharge cell 12.

2 shows an electrode arrangement diagram of the plasma display panel.

As shown in Fig. 2, the PDP electrode has a matrix structure of m × n. Specifically, the address electrodes A1 to Am are arranged in the column direction, and the scan electrodes Y1 to n rows in the row direction. Yn) and sustain electrodes X1 to Xn are arranged in a zigzag. Hereinafter, the scanning electrode will be referred to as "Y electrode" and the sustain electrode as "X electrode". The discharge cell 12 shown in FIG. 2 corresponds to the discharge cell 12 shown in FIG.

According to a general driving method of the PDP, one frame is divided into a plurality of subfields, and each subfield includes an erase period, a reset period, an address period, and a sustain (sustain) period.

The erase section serves to erase the wall charge state of the previous sustain discharge.

The reset section (initialization section) serves to set up wall charges in order to stably perform subsequent address discharges. That is, the reset section serves to create an optimal wall charge state for the address operation in the subsequent address section.

In the address period, the wall charges are accumulated on the turned on cells (addressed cells) by selecting the turned on cells and the turned off cells on the panel.

The sustain section performs discharge for actually displaying an image on the addressed cells.

3 is a diagram showing waveforms applied to each electrode according to a conventional method of driving a plasma display panel.

As shown in Fig. 3, according to the conventional driving method of the PDP, the ground electrode is slowly moved from the ground potential to the predetermined potential Ve at the X electrode while the Y electrode is kept at a constant potential (ground potential in Fig. 3) in the erase period. A rising ramp was applied to remove wall charges formed in the previous holding section.

However, in order to erase the wall charges by applying the ramp waveform as in the related art, since the control accuracy of the wall charges is strongly dependent on the inclination of the lamp (that is, it must be gradually raised), a considerable time is required to accurately erase the wall charges. There was a problem.

SUMMARY OF THE INVENTION The present invention has been made in an effort to solve the problems of the prior art, and to provide a plasma display panel and a driving method thereof for precisely erasing wall charges within a short time.

A driving method of a plasma panel according to one feature of the present invention is

A method of driving a plasma display panel including a first space defined by a first electrode and a second electrode,

In the erasure interval,

(a) applying a falling voltage to the first electrode to which the last sustain discharge voltage is applied and applying a first voltage to the second electrode to perform a first discharge in a first space;

(b) floating the first electrode to reduce wall charges accumulated in the dielectric formed on the first electrode or the second electrode;

(c) applying a falling voltage to the first electrode again to perform a second discharge; And

(d) floating the first electrode to reduce wall charges accumulated in the dielectric formed on the first electrode or the second electrode.

On the other hand, the driving method of the plasma display panel according to another aspect of the present invention

A method of driving a plasma display panel including a first space defined by a first electrode and a second electrode,

In the erasure interval,

(a) performing a first discharge in a first space by applying a rising voltage to the second electrode while applying a bias voltage to the first electrode to which the last sustain discharge voltage is applied;

(b) floating the second electrode to reduce wall charges accumulated in the dielectric formed on the first electrode or the second electrode;

(c) applying a rising voltage to the second electrode to perform a second discharge; And

(d) floating the second electrode to reduce wall charges accumulated in the dielectric formed on the first electrode or the second electrode.

On the other hand, the plasma display panel according to the features of the present invention

First and second substrates;

First and second electrodes formed side by side on the first substrate;

An address electrode formed on the second substrate;

A first space defined by the first electrode and the second electrode;

A driving circuit which transmits a driving signal to the first electrode, the second electrode and the address electrode during an erase period, a reset period, an address period, and a sustain discharge period;

During the erase period, the driving circuit

After discharging the first space by applying a rising or falling voltage to the first electrode, the first electrode is floated.

Hereinafter, a driving method according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

According to the driving method of the plasma display panel according to the embodiment of the present invention, the discharge voltage is quickly increased and decreased to the extent that strong discharge occurs in the erase period, and the discharge is performed by reducing the magnitude of the voltage applied inside the discharge space during discharge. By self-quenching, the wall charges are finely controlled and erased. At this time, according to an embodiment of the present invention, the self-quenching of the discharge is implemented using the floating state of the electrode.

Hereinafter, a driving method of the plasma display panel according to the first embodiment of the present invention will be described.

4 illustrates a plasma display panel according to an exemplary embodiment of the present invention.

As shown in FIG. 4, the plasma display panel according to an exemplary embodiment of the present invention includes a plasma panel 100, a controller 200, an address driver 300, an X electrode driver 400, and a Y electrode driver 500. Include.

The plasma panel 100 includes a plurality of address electrodes A1 to Am arranged in a column direction, a plurality of sustain electrodes X1 to Xn arranged in a row direction, and a scan electrode Y1 to Yn. .

The control unit 200 receives an image signal from the outside and outputs an address driving control signal, an X electrode driving control signal, and a Y electrode driving control signal.

The address driver 300 receives an address driving control signal from the controller 200 and applies a display data signal for selecting a discharge cell to be displayed to each address electrode.

The X electrode driver 400 receives the X electrode driving control signal from the controller 200 to apply a driving voltage to the X electrode, and the Y electrode driver 500 receives the Y electrode driving control signal from the controller 200 to Y. A driving voltage is applied to the electrode. In this case, as described below, the X electrode driver 400 or the Y electrode driver 500 applies the lamp voltage to the X electrode or the Y electrode in the erasing period, and then makes the electrode float. In addition, the X electrode driver 400 and the Y electrode driver 500 apply a sustain discharge voltage to the X electrode and the Y electrode in the sustain period, respectively.

5 is a diagram illustrating an erase waveform according to a first exemplary embodiment of the present invention.

As shown in FIG. 5, according to the erase waveform according to the first exemplary embodiment of the present invention, the sustain electrode discharges the Y electrode (the last sustain discharge voltage is applied) while the X electrode is maintained at the sustain discharge voltage Vs. A falling ramp / floating voltage is applied that repeats the falling ramp and plotting from voltage Vs to ground voltage 0V.

FIG. 6A is an enlarged view of an erase period (region I) shown in FIG. 5, FIG. 6B is an enlarged view of region a of FIG. 6A, and FIG. 6C shows a voltage applied to two electrodes and a current in a discharge space. Drawing.

6B and 6C, the time t _{f_a} for applying the falling ramp voltage to the Y electrode is preferably set smaller than the time t _{f_f} for floating the Y electrode.

As shown in FIG. 5, after the last sustain discharge is completed in the sustain period, positive wall charges are formed at the X electrode and negative wall charges are formed at the Y electrode.

As shown in FIGS. 5 to 6C, in the erasing period, a falling / floating voltage in which the floating state is repeated while decreasing from the Vs voltage to the reference voltage at the Y electrode while maintaining the X electrode at the Vs voltage. Is applied. That is, the voltage applied to the Y electrode is rapidly reduced by a predetermined amount during the t _fa period, and then the Y electrode is floated by cutting off the voltage supplied to the Y electrode during the f _ff period. Then repeat this operation (t _fa , t _ff ).

When the voltage difference between the voltage Vx of the X electrode and the voltage Vy of the Y electrode becomes equal to or higher than the discharge start voltage Vf during the repeated operation, discharge occurs between the X electrode and the Y electrode. That is, the discharge current Id flows in the discharge space. When the Y electrode floats after the discharge is started between the X electrode and the Y electrode, the wall charges formed in the X and Y electrodes decrease, and the voltage in the discharge space rapidly decreases, causing strong discharge quenching in the discharge space. ) Occurs. Then, when a falling voltage is applied to the Y electrode again to form a discharge and then in a floating state, the wall charge decreases as before, and strong discharge disappears inside the discharge space. When the falling voltage application and the floating state are repeated a predetermined number of times, a desired amount of wall charges is formed on the X electrode and the Y electrode.

At this time, in order to properly control the wall charge, it is preferable to set the falling voltage application period t _fa shorter than the floating period t _ff . That is, when the voltage application period t _fa is long, the discharge is formed too large, and the amount of wall charges that can be controlled by one discharge and floating becomes large. As such, when the amount of wall charges controlled at one time increases, the wall charges cannot be controlled in a desired state.

In the following, strong discharge dissipation due to floating will be described in detail with reference to FIGS. 7A to 7E. Since discharge occurs between the X electrode and the Y electrode, the discharge cell will be described based on the X electrode and the Y electrode.

FIG. 7A is a model of a discharge cell formed by an X electrode and a Y electrode, and FIG. 7B is an equivalent circuit diagram of FIG. 7A. FIG. 7C is a diagram illustrating a case where no discharge occurs in the discharge cell of FIG. 7A. FIG. 7D is a diagram illustrating a state in which a voltage is applied when a discharge occurs in the discharge cell of FIG. 7A, and FIG. 7E is a diagram illustrating a floating state when a discharge occurs in the discharge cell of FIG. 7A. In FIG. 7A, the Y electrode 10 and the X electrode 20 are initially − for convenience of explanation. And + It is assumed that a charge of is formed. The charge is formed on the dielectric layer of the electrode, but will be described below as being formed on the electrode for convenience of description.

As shown in FIG. 7A, the Y electrode 10 is electrically connected to the current source I _in through the switch SW, and the X electrode 20 is electrically connected to the V _e voltage. Dielectric layers 30 and 40 are formed inside the Y electrode 10 and the X electrode 20, respectively. Discharge gas (not shown) is injected between the dielectric layers 30 and 40, and a region between the dielectric layers 30 and 40 forms a discharge space 50.

In this case, since the Y and X electrodes 10 and 20, the dielectric layers 30 and 40, and the discharge space 50 form a capacitive load, they may be equivalently represented by the panel capacitor Cp as shown in FIG. 7B. . And the dielectric constants of the two dielectric layers 30 and 40 The voltage across the discharge space 50 is referred to as V _g . In addition, the thicknesses of the two dielectric layers 30 and 40 are equal (d ₁ ), and the distance (distance of the discharge space) between the two dielectric layers 30 and 40 is d ₂ .

The switch SW is turned on and the voltage Vy applied to the Y electrode 10 of the panel capacitor Cp decreases in proportion to the time when the switch SW is turned on, as shown in Equation 1 below. That is, when the switch SW is turned on, the falling voltage is applied to the Y electrode 10.

Here, Vy (0) is the Y electrode voltage Vy when the switch SW is turned on, and C _p is the capacitance of the panel capacitor Cp.

Referring to FIG. 7C, when no discharge occurs while the switch SW is turned on, the voltage V _g applied to the discharge space 50 is calculated. In addition, the voltage applied to the Y electrode 10 in the state of FIG. 7C is assumed to be V _in .

As such, when the V _in voltage is applied to the Y electrode 10, As much charge is applied to the X electrode 20 as + As much charge is applied. In this case, the Gauss's law (Gaussian theorem) to when the dielectric 30 and 40, the interior of the electric field (electric field) (E ₁₎ and the discharge space 50 of the internal electric field (E ₂₎ is as shown in the respective formula 2 and 3 apply Is given.

here, Represents the amount of charge applied to the Y electrode and the X electrode, Is the dielectric constant inside the discharge space.

The voltage V _e -V _y applied to the outside is given by Equation 4 by the relationship between the electric field and the distance, and similarly, the voltage V _g of the discharge space 50 is expressed by Equation 5.

The amount of charge applied to the Y or X electrodes 10 and 20 from Equations 2 to 5 ) And the voltage V _{g in the} discharge space 50 are represented by Equations 6 and 7, respectively.

Where V _w is the wall charge in the discharge space 50 ( Is the voltage formed by

In fact, the length d ₂ inside the discharge space 50 is a very large value compared to the thickness d ₁ of the dielectrics 30 and 40. Is close to one. That is, it can be seen from Equation 7 that the voltage V _e -V _in applied from the outside is directly applied to the discharge space 50.

Next, the discharge occurs due to the voltage V _e -V _in applied from the outside with reference to FIG. 7D, and the wall charges formed on the Y electrode 10 and the X electrode 20 The voltage V _{g1 in} the discharge space 50 at the time of extinction is calculated. In FIG. 7D, since the charge is supplied from the power supply V _in to maintain the potential of the electrode during the formation of the wall charge, the amount of charge applied to the Y electrode 10 and the X electrode 20 is To increase.

When the Gaussian theorem is applied in FIG. 7D, the electric field E _{1 in} the dielectrics 30 and 40 and the electric field E _{2 in the} discharge space 50 are represented by Equations 8 and 9, respectively.

From equations (8) and (9), the amount of charges applied to the Y electrode 10 and the X electrode 20 ( ) And the voltage V _{g1 in the} discharge space are as shown in Equations 10 and 11, respectively.

In equation (11) Since is nearly 1, when a voltage V _in is applied from the outside, only a very small voltage drop occurs inside the discharge space 50 when discharge occurs. Thus, the amount of wall charge dissipated by the discharge ( ) Is large enough to reduce the internal voltage (V _g1 ) of the discharge space 50 to dissipate the discharge.

Next, the discharge is generated by the voltage V _in applied from the outside with reference to FIG. 7E, and the wall charges formed on the Y electrode 10 and the X electrode 20 The voltage V _{g2 in the} discharge space 50 after quenching is calculated. At this time, since there is no charge flowing from the outside, the amount of charge applied to the Y electrode 10 and the X electrode 20 is the same as that of FIG. 4C. Becomes Similarly, applying the Gaussian law of the dielectric (30, 40) of the internal electric field (E ₁₎ and the electric field in the discharge space (50), (E ₂₎ are each such as equation (2) and Equation (12).

From equations (12) and (6), the voltage V _g2 of the discharge space 50 is given by equation (13).

As can be seen from Equation 13, it can be seen that there is a large voltage drop due to the wall charge which disappears in the state in which the switch SW is turned off (floating state). That is, in the equations (12) and (13), the voltage drop due to the wall charge is 1 / (1- It can be seen that it is larger by). As a result, in the floating state, even if the wall charges are slightly dissipated, the voltage in the discharge space 50 decreases rapidly, so that the voltage between the electrodes becomes less than or equal to the discharge start voltage, and the discharge is extinguished rapidly. That is, it can be seen that the floating state of the electrode after the start of discharge serves as a sudden quenching mechanism of the discharge. When the voltage inside the discharge space 50 decreases, the X electrode is fixed at the Vs voltage, and thus the voltage Vy of the floating Y electrode is increased by a predetermined voltage as shown in FIG. 6C.

Referring again to FIG. 6C, when the Y electrode voltage drops and the Y electrode floats when discharge occurs, the discharge disappears while the wall charges formed on the Y and X electrodes are slightly dissipated by the discharge dissipation mechanism described above. By repeating this operation, it is possible to control the wall charges to a desired state while gradually erasing the wall charges formed on the Y and X electrodes. In other words, it is possible to precisely control the desired wall charge state in the erase period.

8 is a diagram illustrating an erase waveform according to a second exemplary embodiment of the present invention.

As shown in FIG. 8, according to the erasing waveform according to the second embodiment of the present invention, the rising and ramping of the X electrode from the ground voltage (0V) to the voltage Ve is performed while the Y electrode is maintained at the ground voltage. Apply rising ramp / floating voltage to repeat.

FIG. 9A is an enlarged view of an erasing section II region shown in FIG. 8, and FIG. 9B is an enlarged view of region b of FIG. 9A.

In Fig. 9B, the time t _{r_a} for applying the rising ramp voltage to the X electrode is preferably set smaller than the time t _{r_f} for floating the X electrode.

As shown in FIGS. 9A and 9B, when the rising ramp / floating voltage is applied to the X electrode and the rising ramp and the floating voltage are repeated, a predetermined wall charge is accumulated as described above, and the strong discharge disappears inside the discharge space. (quenching) occurs. As the discharge space disappears, the voltage of the X electrode also decreases. Then, when a discharge is generated by applying a lamp voltage to the X electrode again and then in a floating state, the predetermined wall charges disappear as described above, and strong discharge disappears inside the discharge space. Then, the ramp voltage application and the repetition of the floating state are repeated a predetermined number of times.

As described above, the erasing method according to the embodiment of the present invention has the following advantages because it controls the wall charges formed on the electrodes by floating the electrodes after applying the voltage.

First, according to the embodiment of the present invention, since the discharge is extinguished by erasing much less wall charge than before, wall charge erasure based on fine control is possible.

Second, the conventional erasing method using the lamp voltage has a disadvantage in that the time required for erasure of the wall charge is long because the lamp voltage slope constraint for the wall charge control is very strong because the intensity of the discharge is controlled by the slope of the lamp. On the contrary, in the case of erasing using the floating according to the embodiment of the present invention, since the voltage drop principle according to the wall charge is used as the intensity of the discharge, the required time can be shortened.

Although the embodiments of the present invention have been described in detail above, the present invention is not limited only to the above-described embodiments, and various other changes and modifications are, of course, possible.

As described above, according to the present invention, fine wall charge control is possible, and the time required for the erasing section can be shortened.

1 is a partial perspective view of an AC plasma display panel.

2 is an arrangement diagram of electrodes of a plasma display panel.

3 is a view showing a driving waveform of a conventional plasma display panel.

4 is a diagram illustrating a plasma display panel according to an exemplary embodiment of the present invention.

5 is a view showing a driving waveform according to the driving method of the first embodiment of the present invention.

6A to 6C are diagrams showing erase waveforms in the driving method of the first embodiment of the present invention.

7A to 7E are diagrams illustrating a driving principle according to an embodiment of the present invention.

8 is a view showing a driving waveform according to the driving method of the second embodiment of the present invention.

9A and 9B are diagrams showing an erase waveform in the driving method of the second embodiment of the present invention.

Claims (18)

A method of driving a plasma display panel including a first space defined by a first electrode and a second electrode, In the erasure interval, (a) applying a falling voltage to the first electrode to which the last sustain discharge voltage is applied and applying a first voltage to the second electrode to perform a first discharge in a first space; (b) floating the first electrode to reduce wall charges accumulated in the dielectric formed on the first electrode or the second electrode; (c) applying a falling voltage to the first electrode again to perform a second discharge; And (d) floating the first electrode to reduce wall charges accumulated in the dielectric formed on the first electrode or the second electrode. The method of claim 1, And the step (c) and the step (d) are repeated a predetermined number of times. The method according to claim 1 or 2, And the first voltage is biased at a constant voltage. The method according to claim 1 or 2, And said falling voltage is a ramp voltage. The method according to claim 1 or 2, And wherein the first electrode is a scan electrode and the second electrode is a sustain electrode. The method according to claim 1 or 2, And a section for floating the first electrode longer than a section for applying the falling voltage to the first electrode. A method of driving a plasma display panel including a first space defined by a first electrode and a second electrode, In the erasure interval, (a) performing a first discharge in a first space by applying a rising voltage to the second electrode while applying a bias voltage to the first electrode to which the last sustain discharge voltage is applied; (b) floating the second electrode to reduce wall charges accumulated in the dielectric formed on the first electrode or the second electrode; (c) applying a rising voltage to the second electrode to perform a second discharge; And (d) floating the second electrode to reduce wall charges accumulated in the dielectric formed on the first electrode or the second electrode. The method of claim 7, wherein And the step (c) and the step (d) are repeated a predetermined number of times. The method according to claim 7 or 8, And said rising voltage is a lamp voltage. The method according to claim 7 or 8, And wherein the first electrode is a scan electrode and the second electrode is a sustain electrode. The method according to claim 7 or 8, And a section for floating the second electrode longer than a section for applying the rising voltage to the second electrode. First and second substrates; First and second electrodes formed side by side on the first substrate; An address electrode formed on the second substrate; A first space defined by the first electrode and the second electrode; A driving circuit which transmits a driving signal to the first electrode, the second electrode and the address electrode during an erase period, a reset period, an address period, and a sustain discharge period; During the erase period, the driving circuit And discharging the first space by applying a rising or falling voltage to the first electrode, and then floating the first electrode. The method of claim 12, The first electrode is a scan electrode, And the driving circuit lowers and floats the first electrode from the second voltage to the third voltage while biasing the second electrode to the first voltage. The method of claim 13, And said second voltage is a sustain discharge voltage and said third voltage is a ground voltage. The method of claim 13, The driving circuit And driving the first electrode so that the application and floating of the falling voltage is repeated a predetermined number of times. The method of claim 12, The first electrode is a sustain electrode, And the driving circuit raises and floats the first electrode from the second voltage to the third voltage while biasing the second electrode to the first voltage. The method of claim 16, And the first voltage and the second voltage are ground voltages. The method of claim 16, The driving circuit And driving the first electrode such that the application and floating of the rising voltage is repeated a predetermined number of times.