KR100502800B1 - Thin film transistor substrate for liquid crystal display - Google Patents
Thin film transistor substrate for liquid crystal display Download PDFInfo
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- KR100502800B1 KR100502800B1 KR1019980010698A KR19980010698A KR100502800B1 KR 100502800 B1 KR100502800 B1 KR 100502800B1 KR 1019980010698 A KR1019980010698 A KR 1019980010698A KR 19980010698 A KR19980010698 A KR 19980010698A KR 100502800 B1 KR100502800 B1 KR 100502800B1
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- 239000000758 substrate Substances 0.000 title claims abstract description 16
- 239000010409 thin film Substances 0.000 title claims abstract description 13
- 239000004973 liquid crystal related substance Substances 0.000 title claims description 11
- 239000002184 metal Substances 0.000 claims abstract description 21
- 239000010408 film Substances 0.000 claims abstract description 20
- 239000004065 semiconductor Substances 0.000 claims abstract description 14
- 230000001681 protective effect Effects 0.000 claims abstract description 5
- 238000002161 passivation Methods 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 3
- 238000004519 manufacturing process Methods 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13458—Terminal pads
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134336—Matrix
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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Abstract
투명한 절연 기판 위에 게이트선 및 게이트 전극이 가로로 형성되어 있으며, 그 위에 게이트 절연막이 전면에 걸쳐 형성되어 있다. 그 위에 게이트 전극 상부에 반도체층이 형성되어 있고, 그 위에 데이터선이 게이트선과 교차하도록 세로로 형성되어 있고, 데이터선에서 연장된 소스 전극이 반도체층의 가장자리와 겹치도록 형성되어 있으며, 소스 전극의 맞은편에 드레인 전극이 반도체층의 가장자리와 겹치도록 형성되어 있다. 이 때, 드레인 전극은 게이트선과 평행하게 가로로 길게 형성되어 있다. 또한, 게이트선 상부의 게이트 절연막 위에는 데이터 금속층이 형성되어 있다. 그 위에 드레인 전극의 일부를 노출시키는 제1 접촉구와 데이터 금속층의 일부를 노출시키는 제2 접촉구를 가지는 보호막 및 유기 절연막이 차례로 형성되어 있고, 그 위에 화소 전극이 제1 및 제2 접촉구를 통하여 드레인 전극 및 데이터 금속층과 연결되어 형성되어 있다. 이 때, 화소 전극은 데이터선, 자신의 드레인 전극의 가장자리 및 인접하는 상부 화소 영역의 드레인 전극의 가장자리와 겹치도록 형성되어 있다.The gate line and the gate electrode are formed horizontally on the transparent insulating substrate, and the gate insulating film is formed over the entire surface. The semiconductor layer is formed on the gate electrode thereon, the data line is formed vertically to intersect the gate line, and the source electrode extending from the data line overlaps the edge of the semiconductor layer. On the opposite side, the drain electrode is formed so as to overlap the edge of the semiconductor layer. At this time, the drain electrode is formed long horizontally in parallel with the gate line. In addition, a data metal layer is formed on the gate insulating film above the gate line. A protective film and an organic insulating film having a first contact hole exposing a portion of the drain electrode and a second contact hole exposing a portion of the data metal layer are sequentially formed thereon, and a pixel electrode is formed thereon through the first and second contact holes. It is formed in connection with the drain electrode and the data metal layer. At this time, the pixel electrode is formed so as to overlap the edge of the data line, its drain electrode, and the drain electrode of the adjacent upper pixel region.
이와 같은 구조의 박막 트랜지스터 기판에서는 게이트선과 화소 전극 사이의 간격을 제거하여 빛샘을 방지할 수 있고 개구율을 높일 수 있으며, 5매 마스크를 사용함으로써, 공정을 단순화할 수 있다. In the thin film transistor substrate having such a structure, light leakage can be prevented by increasing the distance between the gate line and the pixel electrode, the aperture ratio can be increased, and the process can be simplified by using five masks.
Description
본 발명은 박막 트랜지스터 액정 표시 장치에 관한 것으로서, 더욱 상세하게는 높은 개구율을 갖는 액정 표시 장치용 박막 트랜지스터 기판 및 그 제조 방법에 관한 것이다.The present invention relates to a thin film transistor liquid crystal display device, and more particularly, to a thin film transistor substrate for a liquid crystal display device having a high aperture ratio and a method of manufacturing the same.
액정 표시 장치의 전기적 신호는 게이트 신호와 데이터 신호로 크게 나누어지며, 이러한 신호는 금속 등의 물질로 이루어진 신호 배선을 통하여 이동한다.The electrical signal of the liquid crystal display is largely divided into a gate signal and a data signal, and the signal moves through a signal wire made of a material such as metal.
신호 배선에는 게이트 전극, 게이트 패드 및 게이트선을 포함하는 게이트 배선과 소스 및 드레인 전극 및 데이터선을 포함하는 데이터 배선이 있는데, 게이트선은 단락을 방지하기 위해 일반적으로 두껍게 또는 넓게 형성하거나 링 게이트선 구조로 형성한다. The signal wiring includes a gate wiring including a gate electrode, a gate pad, and a gate line, and a data wiring including a source and drain electrode and a data line. The gate line is generally formed thick or wide to prevent a short circuit, or a ring gate line. Form into a structure.
그러면, 종래 기술에 따른 박막 트랜지스터 액정 표시 장치에 대하여 설명한다. Next, the thin film transistor liquid crystal display device according to the related art will be described.
투명한 절연 기판 위에 게이트선이 상하에 가로 방향으로 길게 형성되어 있고, 게이트 전극이 게이트선과 연결되어 형성되어 있다. 게이트선 및 게이트 전극 위에는 게이트 절연막이 형성되어 있으며, 그 위의 게이트 전극 상부에는 반도체층이 형성되어 있다. 게이트 절연막 위에 데이터선이 게이트선과 교차하며 세로로 길게 형성되어 있고, 데이터선으로부터 연장된 소스 전극이 게이트 전극 상부의 반도체층 위에 형성되어 있으며, 그 맞은편에 반도체층 가장자리 위에 드레인 전극이 겹쳐 있다. 또한, 데이터 금속층이 게이트선의 가장자리와 일부 겹치도록 형성되어 있다. 소스, 드레인 전극, 데이터 금속층 및 데이터선 위에는 드레인 전극의 일부를 노출시키는 접촉구를 가지는 보호막과 유기 절연막이 전면에 걸쳐 차례로 형성되어 있다. 유기 절연막은 1㎛ 이상의 두께로 형성되어 있어, 화소 전극과 데이터선 사이에 기생 용량의 형성을 최소화한다. 그 위에는 화소 전극이 접촉구를 통하여 드레인 전극과 연결되며 형성되어 있는데, 이 때, 화소 전극은 데이터선의 가장자리 및 전단 게이트선 상부의 데이터 금속층과 겹치도록 넓게 형성되어 있어 데이터 금속층과 화소 전극 사이에 유지 축전기가 형성된다.Gate lines are formed long in the horizontal direction on the transparent insulating substrate, and gate electrodes are formed in connection with the gate lines. A gate insulating film is formed on the gate line and the gate electrode, and a semiconductor layer is formed on the gate electrode thereon. The data line intersects the gate line and is formed long vertically on the gate insulating film. A source electrode extending from the data line is formed on the semiconductor layer above the gate electrode, and the drain electrode overlaps the edge of the semiconductor layer on the opposite side. In addition, the data metal layer is formed to partially overlap the edge of the gate line. On the source, drain electrode, data metal layer and data line, a protective film having a contact hole for exposing a part of the drain electrode and an organic insulating film are sequentially formed over the entire surface. The organic insulating film is formed to a thickness of 1 μm or more, thereby minimizing the formation of parasitic capacitance between the pixel electrode and the data line. The pixel electrode is connected to the drain electrode through the contact hole, and the pixel electrode is formed wide so as to overlap the data metal layer on the edge of the data line and the upper gate line, and is maintained between the data metal layer and the pixel electrode. Capacitors are formed.
이러한 구조의 액정 표시 장치에서는 화소 전극과 게이트선 사이에 일정한 간격이 형성되어 빛샘이 발생하게 된다. 이 부분에서의 빛샘을 방지하기 위하여 상판의 대응하는 영역에 블랙 매트릭스를 형성할 경우, 개구율이 감소하는 단점이 있다. 또한, 간격이 형성되는 것을 방지하기 위해 화소 전극이 하단 게이트선과 겹치도록 형성할 경우에는, 기생 용량이 증가하여 누설 전류가 발생할 수 있다.In the liquid crystal display having such a structure, a constant gap is formed between the pixel electrode and the gate line to generate light leakage. When the black matrix is formed in the corresponding area of the upper plate to prevent light leakage in this portion, there is a disadvantage that the aperture ratio is reduced. In addition, when the pixel electrode is formed to overlap the lower gate line in order to prevent the gap from being formed, the parasitic capacitance may increase and leakage current may occur.
본 발명이 이루고자 하는 과제는 화질의 열화를 방지하며 높은 개구율을 가지는 액정 표시 장치용 박막 트랜지스터 기판 및 그 제조 방법을 제공하는 것이다.SUMMARY OF THE INVENTION An object of the present invention is to provide a thin film transistor substrate for a liquid crystal display device and a method of manufacturing the same, which prevent deterioration of image quality and have a high aperture ratio.
이러한 문제점을 해결하기 위하여 본 발명에서는 투명한 절연 기판 임의의 단위 화소 내에 게이트 전극을 포함하는 게이트선이 가로로 길게 형성되어 있고, 그 위에 게이트 절연막이 전면에 걸쳐 형성되어 있으며, 게이트 전극 상부의 게이트 절연막 위에는 반도체층이 형성되어 있다. 그 위에 데이터선이 게이트선과 교차하도록 세로로 형성되어 있고, 반도체층 위에는 소스 및 드레인 전극이 반도체층의 가장자리와 겹치도록 형성되어 있으며, 드레인 전극이 게이트선과 평행하게 가로로 길게 형성되어 있다. 또한, 게이트선 상부의 게이트 절연막 위에는 데이터 금속층이 형성되어 있고, 그 위에 보호막 및 유기 절연막이 차례로 형성되어 있으며, 드레인 전극의 일부를 노출시키는 제1 접촉구 및 데이터 금속층을 노출시키는 제2 접촉구를 가지고 있다. 그 위에 화소 전극이 드레인 전극의 가장자리 및 인접하는 상부 화소의 드레인 전극의 가장자리와 겹치도록 형성되어 있다. In order to solve this problem, in the present invention, a gate line including a gate electrode is formed horizontally long in an arbitrary unit pixel of a transparent insulating substrate, a gate insulating film is formed over the entire surface, and a gate insulating film over the gate electrode is formed. The semiconductor layer is formed on it. The data lines are formed vertically so as to intersect the gate lines, the source and drain electrodes are formed so as to overlap the edges of the semiconductor layers, and the drain electrodes are formed long horizontally in parallel with the gate lines. Further, a data metal layer is formed on the gate insulating film above the gate line, and a protective film and an organic insulating film are sequentially formed thereon, and a first contact hole for exposing a part of the drain electrode and a second contact hole for exposing the data metal layer. Have. The pixel electrode is formed thereon to overlap the edge of the drain electrode and the edge of the drain electrode of the adjacent upper pixel.
그러면, 본 발명이 속하는 기술 분야에서 통상의 지식을 가진 자가 용이하게 실시할 수 있도록 본 발명의 실시예에 대하여 도면을 참고로 하여 상세히 설명한다.Then, embodiments of the present invention will be described in detail with reference to the drawings so that those skilled in the art can easily implement the present invention.
도 1은 본 발명의 실시예에 따른 액정 표시 장치용 박막 트랜지스터 기판의 배선 구조를 도시한 배치도이고, 도 2는 도 1에서 Ⅱ-Ⅱ'선을 따라 도시한 단면도이다. FIG. 1 is a layout view illustrating a wiring structure of a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along line II-II 'of FIG. 1.
도 1 및 도 2를 참고로 하여 본 발명의 실시예에 따른 액정 표시 장치용 박막 트랜지스터 기판의 배선 구조에 대하여 상세히 설명한다.A wiring structure of a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 1 and 2.
투명한 절연 기판(100) 위에 게이트선(110)이 가로로 형성되어 있고, 게이트선(110)에서 연장된 게이트 전극(111)이 위로 돌출되어 형성되어 있으며, 그 위에 게이트 절연막(120)이 전면에 걸쳐 형성되어 있다. 게이트 전극(111) 상부의 게이트 절연막(120) 위에는 반도체층(121)이 형성되어 있다. 게이트 절연막(120) 위에 데이터선(130)이 게이트선(110)과 교차하며 세로로 형성되어 있다. 여기에서, 게이트선과 데이터선으로 둘러싸인 영역은 다수의 화소 영역이 된다. 데이터선(130)에서 연장된 소스 전극(131)이 반도체층(121)의 가장자리와 겹치도록 형성되어 있다. 또한, 게이트 전극(111)에 대하여 소스 전극(131)의 맞은편에 드레인 전극(132)이 반도체층(121)의 가장자리와 겹치며 가로로 길게 게이트선(110)과 거리를 두고 형성되어 있다. 게이트선(110) 상부의 게이트 절연막(120) 위에는 데이터 금속층(140)이 형성되어 있어 게이트선(111)과 유지 축전기를 형성하게 된다. 그 위에 드레인 전극(132)의 일부를 노출시키는 제1 접촉구(C) 및 데이터 금속층(140)의 일부를 노출시키는 제2 접촉구(C')를 가지는 보호막(150) 및 유기 절연막(160)이 차례로 형성되어 있으며, 그 위에는 화소 전극(170)이 형성되어 있다. 이 때, 화소 전극(170)은 데이터선(130) 및 자신과 연결된 드레인 전극(132)의 가장자리와 일부 겹치고 인접하는 화소 영역의 드레인 전극(132')의 가장자리와도 겹치도록 넓게 형성되어 있어 게이트선(110)과 화소 전극(170) 사이에 빛샘이 발생할 수 있는 간격이 형성되는 것을 방지한다. 또한, 화소 전극(170)은 제1 접촉구(C)를 통하여 드레인 전극(132)과 연결되고, 제2 접촉구(C')를 통하여 데이터 금속층(140)에 연결되므로 데이터 금속층(140)과 게이트선(110) 사이에 유지 용량이 형성된다.The gate line 110 is formed horizontally on the transparent insulating substrate 100, and the gate electrode 111 extending from the gate line 110 protrudes upward, and the gate insulating layer 120 is formed on the entire surface thereof. It is formed over. The semiconductor layer 121 is formed on the gate insulating layer 120 on the gate electrode 111. The data line 130 is vertically formed on the gate insulating layer 120 to intersect the gate line 110. Here, the area surrounded by the gate line and the data line becomes a plurality of pixel areas. The source electrode 131 extending from the data line 130 is formed to overlap the edge of the semiconductor layer 121. In addition, the drain electrode 132 is formed on the opposite side of the source electrode 131 with respect to the gate electrode 111 so as to overlap the edge of the semiconductor layer 121 with a distance from the gate line 110. The data metal layer 140 is formed on the gate insulating layer 120 on the gate line 110 to form the gate line 111 and the storage capacitor. The passivation layer 150 and the organic insulating layer 160 having a first contact hole C exposing a portion of the drain electrode 132 and a second contact hole C ′ exposing a portion of the data metal layer 140 thereon. These are formed in this order, and the pixel electrode 170 is formed on it. In this case, the pixel electrode 170 is formed to be partially overlapped with the edge of the data line 130 and the drain electrode 132 connected thereto and also overlaps the edge of the drain electrode 132 ′ of the adjacent pixel region. A gap in which light leakage may occur is prevented from being formed between the line 110 and the pixel electrode 170. In addition, the pixel electrode 170 is connected to the drain electrode 132 through the first contact hole C, and is connected to the data metal layer 140 through the second contact hole C ′, so that the pixel electrode 170 is connected to the data metal layer 140. A storage capacitor is formed between the gate lines 110.
이와 같이, 드레인 전극(132)을 가로로 길게 형성하고 화소 전극(170)이 인접한 상부 화소 영역의 드레인 전극(132')의 상부에서 드레인 전극(132')의 가장자리와 겹치도록 함으로써, 빛샘 현상을 방지할 수 있다. As described above, the light leakage phenomenon is formed by forming the drain electrode 132 horizontally and overlapping the edge of the drain electrode 132 'at the top of the drain electrode 132' of the adjacent upper pixel region. You can prevent it.
이와 같은 구조의 박막 트랜지스터의 제조 방법에 대하여 설명하면 다음과 같다.The manufacturing method of the thin film transistor of such a structure is as follows.
먼저, 투명 절연 기판 위에 금속층을 증착한 후 패터닝하여, 게이트 전극 및 게이트선을 형성한다. 그 위에 게이트 절연막을 전면에 걸쳐 증착한 후, 게이트 전극 상부에 반도체층을 형성한다. 그 위에 데이터 금속층을 증착한 후, 패터닝하여 데이터선, 소스 및 드레인 전극 및 게이트선 상부의 데이터 금속층을 형성한다. 그 위에 보호막과 유기 절연막을 차례로 증착한 후, 패터닝하여 드레인 전극의 일부를 노출시키는 제1 접촉구와 데이터 금속층을 노출시키는 제2 접촉구를 형성한다. 다음, 그 위에 ITO층을 증착, 패터닝하여 화소 전극을 형성한다. 이 때, 화소 전극은 드레인 전극의 가장자리와 겹치고 위에 이웃한 화소의 드레인 전극과도 겹치도록 넓게 형성하여 화소 전극과 게이트선 사이에 빛샘의 발생을 방지한다. First, a metal layer is deposited on a transparent insulating substrate and then patterned to form a gate electrode and a gate line. After depositing a gate insulating film over the whole surface, a semiconductor layer is formed on the gate electrode. The data metal layer is deposited thereon, and then patterned to form a data metal layer on the data line, the source and drain electrodes, and the gate line. A protective film and an organic insulating film are sequentially deposited thereon, and then patterned to form a first contact hole for exposing a portion of the drain electrode and a second contact hole for exposing the data metal layer. Next, an ITO layer is deposited and patterned thereon to form a pixel electrode. In this case, the pixel electrode is formed to be wider to overlap the edge of the drain electrode and to overlap the drain electrode of the neighboring pixel thereon to prevent light leakage between the pixel electrode and the gate line.
이와 같은 제조 방법에서는 박막 트랜지스터 기판을 5매의 마스크를 이용하여 제조할 수 있어 공정을 단순화시키고 생산성을 향상시킬 수 있으며, 종래 기술에서보다 개구율을 2∼3% 정도 높일 수 있다.In such a manufacturing method, the thin film transistor substrate can be manufactured using five masks, which simplifies the process and improves the productivity, and can increase the aperture ratio by 2 to 3% than in the prior art.
위에서 언급한 바와 같이, 드레인 전극을 게이트선과 평행하게 길게 형성하고, 화소 전극을 자신의 드레인 전극 뿐만 아니라 이웃하는 상부 화소의 드레인 전극의 가장자리와 겹치도록 넓게 형성하여 게이트선과 화소 전극 사이의 간격을 제거하여 빛샘을 방지할 수 있고 개구율을 높일 수 있으며, 5매 마스크를 사용함으로써, 공정을 단순화할 수 있다. As mentioned above, the drain electrode is formed long in parallel with the gate line, and the pixel electrode is formed wide so as to overlap not only its own drain electrode but also the edge of the drain electrode of the neighboring upper pixel, thereby eliminating the gap between the gate line and the pixel electrode. The light leakage can be prevented, the aperture ratio can be increased, and the process can be simplified by using five masks.
도 1은 본 발명의 실시예에 따른 액정 표시 장치용 박막 트랜지스터 기판의 배선 구조를 도시한 배치도이고,1 is a layout view illustrating a wiring structure of a thin film transistor substrate for a liquid crystal display according to an exemplary embodiment of the present invention.
도 2는 도 1에서 Ⅱ-Ⅱ'선을 따라 도시한 단면도이다.FIG. 2 is a cross-sectional view taken along the line II-II 'of FIG. 1.
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