KR100482345B1 - Method for driving plasma display panel using liquid crystal - Google Patents

Abstract

The present invention relates to a method of driving a plasma display panel employing a liquid crystal shutter to achieve white balance without loss of an image signal.

The driving method of the plasma display panel according to the present invention is characterized in that the emission time of the light emitted from the red discharge cell, the green discharge cell and the blue discharge cell is set differently during the sustain period for expressing the gray scale.

Description

Method of driving plasma display panel using liquid crystal {METHOD FOR DRIVING PLASMA DISPLAY PANEL USING LIQUID CRYSTAL}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to a method of driving a plasma display panel in which a white balance can be achieved by using a liquid crystal shutter without losing an image signal.

Plasma Display Panels (hereinafter referred to as "PDPs") are characterized by emitting phosphors by 147 nm ultraviolet rays generated during discharge of inert mixed gases such as He + Xe, Ne + Xe and He + Ne + Xe. An image containing graphics is displayed. Such a PDP is not only thin and easy to enlarge, but also greatly improved in quality due to recent technology development. In particular, the three-electrode AC surface discharge type PDP has advantages of low voltage driving and long life because wall charges are accumulated on the surface during discharge and protect the electrodes from sputtering caused by the discharge.

1 is a perspective view illustrating a discharge cell structure typically arranged in an alternating-type PDP in a matrix form, and FIG. 2 is a cross-sectional view of the discharge cell shown in FIG. 1.

1 and 2, the discharge cells of the three-electrode AC surface discharge type PDP are formed on the scan electrode Y and the sustain electrode Z formed on the upper substrate 10, and the lower substrate 18. The address electrode X is provided. Each of the scan electrode Y and the sustain electrode Z has a line width smaller than that of the transparent electrodes 12Y and 12Z and the transparent electrodes 12Y and 12Z, and the metal bus electrode 13Y is formed at one edge region of the transparent electrode. , 13Z).

The transparent electrodes 12Y and 12Z are usually formed on the upper substrate 10 by indium tin oxide (hereinafter, referred to as “ITO”). The metal bus electrodes 13Y and 13Z are usually formed of metals such as chromium (Cr) and formed on the transparent electrodes 12Y and 12Z to reduce voltage drop caused by the transparent electrodes 12Y and 12Z having high resistance. The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the scan electrode Y and the sustain electrode Z side by side. In the upper dielectric layer 14, wall charges generated during plasma discharge are accumulated. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used. The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode X is formed, and the phosphor layer 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode X is formed in the direction crossing the scan electrode Y and the sustain electrode Z. The partition wall 24 is formed in parallel with the address electrode X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. An inert mixed gas such as He + Xe, Ne + Xe, and He + Ne + Xe for discharging is injected into the discharge space of the discharge cells provided between the upper and lower substrates 10 and 18 and the partition wall 24.

The three-electrode AC surface discharge type PDP is driven by dividing one frame into several subfields having different emission counts in order to realize gray levels of an image. Each subfield is further divided into a reset period for uniformly generating discharge, an address period for selecting a discharge cell, and a sustain period for implementing gray levels according to the number of discharges. For example, when the image is to be displayed with 256 gray levels, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8. In addition, each of the eight subfields SF1 to SF8 is divided into a reset and an address period and a sustain period. Here, the reset and address periods of each subfield are the same for each subfield, while the sustain period increases at a rate of 2 ⁿ (n = 0,1,2,3,4,5,6,7) in each subfield. do. As described above, since the sustain period is changed in each subfield, gray levels of an image can be realized.

4 is a waveform diagram illustrating a method of driving a plasma display panel according to the related art.

Referring to FIG. 4, the first subfield SF1 included in one frame of the PDP is divided into a reset period RPD, an address period APD, and a sustain period SPD.

In the reset period RPD, the reset pulse RP is supplied to the scan electrode Y. The reset pulse RP has a form of ramp wave in which the voltage increases when set up and the voltage decreases when set down. In the set-up, reset discharge is generated to form wall charge in the upper dielectric layer 14. Subsequently, the charged voltage is partially erased by the decreasing voltage during set down so that the wall charge is reduced enough to help the next address discharge without causing an erroneous discharge. In order to reduce the wall charge, a positive DC voltage is supplied to the sustain electrode Z when the reset pulse RP is set down. Since the reset pulse RP is supplied in a gradually decreasing form with respect to the positive DC voltage, the scan electrode Y becomes a negative polarity relative to the sustain electrode Z at the time of set down, that is, the polarity is reduced. This inversion reduces the wall charges generated during set-up.

In the address period APD, a scan pulse SP having a negative scan voltage Vy is supplied to the scan electrode Y, and data corresponding to the address voltage Va is supplied to the address electrode X. The address discharge is generated by supplying the pulse DP. The wall charge formed by this address discharge is maintained for the period during which the other discharge cells are addressed.

In the sustain period SPD, the triggering pulse TP is supplied to the scan electrode Y at the start so that the sustain discharge is started in the discharge cells 1 in which the wall charges are sufficiently formed in the address period APD. Subsequently, sustain pulses SUSPz and SUSPy corresponding to the sustain voltage Vs are alternately supplied to the sustain electrode Z and the scan electrode Y to maintain the sustain discharge during the sustain period SPD.

In the erase period EPD subsequent to the sustain period SPD, the discharge pulse EP is supplied to the sustain electrode Z to stop the discharge. The erasing pulse EP has a ramp wave shape so that the light emission size is small, or a short pulse width of about 1 ms for the discharge erasing. The charged particles are erased by the short erase discharge by the erase pulse EP to stop the discharge.

Many PDPs have been made in various fields to realize natural images. Among them, in particular, research on the method of controlling white balance and contrast is being actively conducted. Here, contrast is an important factor for evaluating the image quality, which is defined as the brightness of the brightest and darkest parts of the screen, and is recognized as the most important factor in improving the image quality of the PDP in the future. In addition, the contrast is determined by the brightness and luminance of the background such as a lamp, and in order to increase the contrast, not only the background needs to be darkened but also the brightness needs to be increased. Ideally, the input signal-to-image signal should be mapped to a linear value, but since the input image signal has nonlinearity in reality, the contrast is improved by using gamma-corrected data to obtain clear image quality.

5 is a blur diagram schematically showing a driving apparatus of a plasma display panel according to the related art.

Referring to FIG. 5, analog / digital converters (hereinafter referred to as "A / D converters") (1, 3, 5) connected to input lines of red, green, and blue signals, respectively, and A / First gamma / white balance correction unit 2, second gamma / white balance correction unit 4, and third gamma / white balance correction unit 6 connected to the output terminals of the D converters 1, 3, 5, respectively. It is provided. The A / D converters 1, 3, and 5 convert the input red, green, and blue analog signals into digital data. The first gamma correction unit 2 gamma corrects the red signal, the second gamma correction unit 4 gamma corrects the green signal, and the third gamma correction unit 6 performs gamma correction of the blue signal. Here, the gamma correction is as follows. When displaying a television (TV) signal with a PDP, gamma correction must be performed on the input television signal. This means that the monitor characteristics of the CRT (Cathode Ray Tube), which are currently used, have a proportional relationship between the input signal and the output signal. This is because the broadcasting station sends a pre-corrected television signal in consideration of this when the broadcasting station transmits a broadcasting signal. Unlike the CRT, since the luminance of the output is linearly proportional to the input signal, the PDP does not need to be inversely corrected. However, since the inversely corrected signal is transmitted, the broadcast signal has to be corrected again. You will get This is called gamma correction, and since gamma correction usually requires exponential operation, it is difficult to implement it as a logic operation circuit. Therefore, a method of mapping an input signal and a corrected signal using a look-up table is used. do. This correction value is implemented using the memory 2a (ie, ROM).

The overall configuration is as shown in FIG. 5 and the input image signals are red (Red: hereinafter referred to as "R"), Green (hereinafter referred to as "G") and Blue (hereinafter referred to as "B") color signal Each color signal is separated and converted into digital data by the A / D converters 1, 3 and 5, and transmitted to the gamma correction unit 1, 3 and 5 as a digital value having the number of bits according to a desired gray scale value. The gamma correction units 1, 3, and 5 correct and output the reference values stored in the memory 2a. In addition, one of the necessary output corrections in addition to gamma correction in the PDP driver is white balance. In general, the red signal has higher luminous efficiency than the green and blue signals. I want to balance. In other words, the luminance level of the upper side of the red side is adjusted downward in comparison with the other two color signals to perform output correction to achieve the overall color balance. In addition, in the lower level part, since it is difficult to adjust downward any more, the white balance is adjusted by adjusting the green and blue signals upward compared to the red signals.

However, in this method, a problem arises in that the upper and lower levels are not fully represented by the output correction. In order to use 256 tones of 0-255 levels to display full colors, data is input to the inverse gamma correction unit with 8 bits of data. When the upper and lower levels are adjusted for white balance correction, Since the level of the corrected portion cannot be displayed, a problem of not being able to sufficiently express 256 gray scales has been derived. As a result, white balance cannot be achieved without loss of the R, G, and B video signals.

Accordingly, it is an object of the present invention to provide a method of driving a plasma display panel that adopts a liquid crystal shutter to achieve white balance without loss of an image signal.

In order to achieve the above object, a driving method of a plasma display panel according to an embodiment of the present invention comprises a panel layer including a pixel cell composed of red, green and blue discharge cells and a liquid crystal shutter for controlling the amount of light. The liquid crystal shutter controls the time for which light is emitted from the red, green, and blue discharge cells to be emitted for each of the red, green, and blue discharge cells.

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The liquid crystal shutter may be controlled to set the light emission time of the green discharge cell to be longer than the light emission time of the red and blue discharge cells.

The liquid crystal shutter is controlled to set the light emission time of the red discharge cell longer than the light emission time of the blue discharge cell.

The video signals input to the red, green, and blue discharge cells from the outside are gamma-corrected and then supplied to the panel layer.

The white balance is adjusted by adjusting the light emission time of the red, green and blue discharge cells.

The liquid crystal shutters emit light only in the sustain period, and block light emission in other periods.

Other objects and features of the present invention in addition to the above objects will be apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 6 to 11.

6 is a view schematically showing a driving apparatus of a plasma display panel for adjusting white balance according to the present invention.

6, the A / D converter 11 connected to the input lines of the R, G, and B signals, respectively, and the R, G, and B gamma correction units connected to the output terminals of the A / D converter 11, respectively. 12). The A / D converter 11 converts the inputted R, G, and B analog signals into digital data. The gamma correction unit 12 performs gamma correction of R, G, and B. The corrected R, G and B data are input to the scan (Y) driver.

In the prior art, the white balance unit corrected the white balance. That is, output correction is performed to achieve the overall color balance by adjusting the luminance level of the upper side of the red side downward compared to the other two color signals. In addition, since it is difficult to adjust downward in the lower level part, the white balance is adjusted by adjusting the green (G) and blue (B) signals up than the red (R) signal. However, in this method, a problem arises in that the upper and lower levels are not fully represented by the output correction. This prevents white balance from being lost without loss of the R, G and B video signals.

Therefore, in the present invention, the white balance is adjusted by employing a liquid crystal shutter on the PDP instead of the conventional white balance unit. In other words, by adjusting the light emitted from the PDP by using the liquid crystal shutter, white balance can be achieved without losing the R, G, and B signals.

7 is a diagram illustrating a plasma display panel employing a liquid crystal shutter according to an exemplary embodiment of the present invention, and FIG. 8 is a view for explaining driving of the liquid crystal shutter 60 in a perspective view of a PDP shown in FIG. 7.

7 and 8, a plasma display device employing a liquid crystal shutter according to an exemplary embodiment of the present invention is formed on a panel layer 80 and a panel layer 80 and driven using a liquid crystal 60b. The liquid crystal shutter 60 is provided.

The panel layer 80 includes a plurality of red, green, and blue discharge cells arranged in a matrix form, and the plurality of discharge cells include scan electrodes Y and sustain electrodes Z formed on the upper substrate 40. And an address electrode X formed on the lower substrate 50. Each of the scan electrode Y and the sustain electrode Z includes a transparent electrode (not shown) and a metal bus electrode (not shown) having a line width smaller than that of the transparent electrode and formed at one edge region of the transparent electrode. do.

The liquid crystal shutter 60 includes an upper electrode 60a supplied with a pixel voltage, a lower electrode 60c supplied with a common voltage, and a liquid crystal 60b injected between the upper electrode 60a and the lower electrode 60c. do. At this time, the upper electrode 60a is divided into the R electrode 61, the G electrode 62, and the B electrode 63 along the R, G, and B discharge cells of the panel layer 80, and each electrode has one voltage. It is tied to the pattern and then patterned. The lower electrode 60c forms one substrate so as to correspond to the entire panel of the panel layer 80. The liquid crystal shutter 60 controls the amount of light emitted from the panel layer 80 according to the arrangement state of the liquid crystal 60b to display a desired image on the screen. To this end, the liquid crystal 60b changes the liquid crystal arrangement state according to the voltage difference between the upper electrode 60a and the lower electrode 60c and serves to block or pass light. The amount of light generated between the upper plate and the lower plate can be controlled according to the light transmission and blocking of the liquid crystal shutter 60.

8, the PDP employing the liquid crystal shutter according to the present invention places the liquid crystal shutter 60 on the panel layer 80. An upper electrode 60a and a lower electrode 60c are disposed above and below the liquid crystal 60b, and the orientation of the liquid crystal 60b is changed by the voltage difference between the two electrodes. Here, the lower electrode 60c is a surface electrode and covers the entire upper panel of the panel layer 80 like the liquid crystal 60b. In addition, the upper electrode 60a corresponds one-to-one along the R, G, and B discharge cells of the panel layer 80 and is divided into an R electrode 61, a G electrode 62, and a B electrode 63. The electrodes are grouped into one voltage and patterned. In other words, the R electrodes 61 of the liquid crystal shutter 60 are tied together and controlled by the R driving voltage Rsw, and the G electrodes 62 are tied together and controlled by the G driving voltage Gsw, and the B electrode 63 is connected. They are tied together and controlled by the B drive voltage Bsw. Accordingly, the alignment angle of the liquid crystal 60b injected into the liquid crystal shutter 60 by applying a common voltage to the lower surface electrode 60c and adjusting the voltage applied to the respective electrodes to the patterned R, G, and B electrodes. Since this is changed, the light from the panel layer 80 can be adjusted and sent out. That is, since the voltages may be supplied separately according to the R, G, and B discharge cells, the white balance may be adjusted by adjusting the amount of light emitted from the panel layer 80.

The driving method of the PDP will be described with reference to FIG. 4. The first subfield SF1 included in one frame of the PDP is divided into a reset period RPD, an address period APD, and a sustain period SPD. .

During the reset period RPD, a reset discharge occurs during set-up of all the discharge cells in the PDP to form wall charges in the upper dielectric layer 14. Subsequently, the charged voltage is partially erased by the decreasing voltage at set-down so that the wall charge is reduced enough to help the next address discharge without causing an erroneous discharge. An address discharge is generated in the address period APD. The wall charge formed at this time is maintained for a period during which the other discharge cells are addressed. In the sustain period SPD, sustain discharge is generated in the discharge cells selected in the address period APD.

After the cell is selected by the opposite discharge between the scan electrode Y and the address electrode X, the discharge is maintained by the surface discharge between the scan electrode Y and the sustain electrode Z. In the discharge cell of the panel layer 80, visible light is emitted to the outside of the cell by emitting the phosphor 58 by ultraviolet rays generated during the sustain discharge, and the visible light is emitted by the liquid crystal 60b of the liquid crystal shutter 60. It can be controlled to achieve white balance. In other words, an image is displayed by blocking and passing light generated by plasma discharge. In this case, the PDP adjusts the number of discharge sustain periods of the discharge cells according to the video data and implements gray scale using the ON / OFF characteristic of the liquid crystal 60c.

FIG. 9 is a diagram illustrating a plan view of the PDP illustrated in FIG. 7.

Referring to FIG. 9, a PDP employing a liquid crystal according to an embodiment of the present invention includes an upper electrode 60a of the liquid crystal shutter 60 so as to correspond to a plurality of R, G, and B chambers arranged in the panel layer 80. (61), G electrodes 62 and B electrodes (63) is characterized in that it is patterned.

In the configuration as described above, the PDP employing the liquid crystal shutter 60 according to the present invention has the R electrode 61 as the R electrode, the B electrode 62 as the B electrode, and the G electrode 63 as the G electrode. By controlling the voltage to be controlled by being tied up, the white balance can be adjusted by controlling the time for the light to pass through the liquid crystal shutter 60.

On the other hand, the R electrode 61, the G electrode 62, and the B electrode 63 of the liquid crystal shutter 60 receive the base signal GND to be synchronized with the reset period RPD and the address period APD of each subfield. It applies to turn off the liquid crystal 60b, and applies the high signal high to turn on the liquid crystal 60b in the sustain period SPD to display the gray scale. At this time, the reset period RPD and the address period APD are equally allocated to each subfield period. In the reset period RPD, light generated by the reset discharge is generated in the entire panel regardless of the address discharge, thereby reducing the contrast. Therefore, the light generated in the panel layer 80 is blocked by turning off the liquid crystal 60b of the liquid crystal shutter 60 during the reset period RPD. In addition, in the sustain period SPD, the liquid crystal is turned on to allow light from the panel layer 80 to pass through. Accordingly, the PDP according to the present invention can block the unnecessary light during the reset period RPD and can improve the contrast since the light during the reset period RPD does not affect the sustain period SPD. In addition, the amount of light emitted from the panel layer 80 may be controlled by adjusting the time for turning on the liquid crystal during the sustain period SPD. Thus, the white balance can be adjusted by adjusting the amount of red, green and blue light.

FIG. 10 illustrates the effect of the driving method of the present invention for achieving white balance, and FIGS. 11A, 11B, and 10C are diagrams visually showing the effect shown in FIG. 10.

Referring to FIGS. 10 and 11 (a), (b) and (c), in the plasma display panel employing the liquid crystal shutter 60 according to the present invention, the liquid crystal 60b includes the upper electrode 60a and the lower electrode ( According to the voltage difference of 60c), the arrangement of the liquid crystals changes and serves to block or pass light. The amount of light generated between the upper plate and the lower plate can be controlled according to the light passing and blocking of the liquid crystal shutter 60. That is, the R electrodes 61 of the liquid crystal shutter 60 are bundled to receive adjustment of one voltage, the G electrodes 62 are bundled to receive adjustment of one voltage, and the B electrodes 63 are bundled to adjust one voltage. Get it. Here, by adjusting the time each voltage is applied to pass and block the light coming from the panel layer (80).

In detail, the composition of the red (R) phosphor generally used in PDP is YGdBO ₃ : Eu ³⁺ , and the composition of the green (G) phosphor is Zn ₂ SiO ₄ : Mn ²⁺ . The composition of the blue (B) phosphor is BaMgAl ₁₀ O ₁₇ : Eu ²⁺ . According to the experimental results, the saturation characteristic of the luminance is different in the phosphors of red (R), green (G), and blue (B) according to the experiment results. That is, the blue (B) phosphor is almost proportional to the number of discharges, whereas the red (R) phosphor is approximately (proportional) ^0.9 and the green (G) is approximately ^0.85 (discharge). Proportional. The luminance saturation characteristic of the blue (B) phosphor is linear with respect to the number of discharges, whereas the luminance saturation characteristic of the red (R) phosphor and the green (G) phosphor is nonlinear. Therefore, if gamma correction is applied to 2.2 (R), green (G), and blue (B) video data with theoretical 2.2 gamma, the grayscale value should be normally expressed, but in fact, red (R), green (G) and The gradation can be accurately expressed only by gamma-raising to the optimal value for each of the red (R), green (G), and blue (B) data due to different saturation characteristics of different phosphors for each blue (B).

As described above, since the saturation characteristics of the phosphor are different for each of red (R), green (G), and blue (B), the white balance does not match with the number of discharges. Accordingly, the white balance may be adjusted by adjusting the amount of light from the panel layer 80 using the ON-OFF characteristic of the liquid crystal 6b in the liquid crystal panel 60. That is, as shown in FIGS. 10 and 11 (a), (b) and (c), each of the upper electrodes patterned as shown in (a) of FIG. 11 is formed from each subfield to the first point n1 during the sustain period. When the voltage is applied to each of the bundles by the voltage, the liquid crystal is controlled to pass all the light. Meanwhile, the liquid crystal is controlled as shown in FIG. 11B by shorting the voltage applied to the B electrodes of the liquid crystal shutter 60 that is patterned to correspond to the B discharge cells so that B light does not pass at the first point n1. B light is blocked. Thereafter, R and G light, except for B light, pass through the liquid crystal to the second point. On the other hand, the liquid crystal is controlled as shown in FIG. R light is blocked. After that, only G light passes through the liquid crystal to the third point n3. The liquid crystal is controlled by shorting all voltages applied to the R electrode, the G electrode, and the B electrodes of the liquid crystal shutter 60 patterned at the third point n3 to block all the light. That is, B having the highest luminance applies the B driving voltage Bsw for less time than other lights, and R having a luminance lower than B applies the R driving voltage Rsw for more time than B, and the luminance is high. The lowest G controls the light by applying the G driving voltage Gsw for the most time compared to other lights. The upper electrodes of the patterned liquid crystal panel are bundled into one voltage to adjust the time for which the voltage is applied to achieve white balance without losing the R, G, and B image signals.

Compared with the conventional one, the upper and lower levels have not been fully represented by the output correction. In order to use 256 tones of 0-255 levels to display full colors, data is input to the inverse gamma correction unit with 8 bits of data. When the upper and lower levels are adjusted for white balance correction, Since the level of the corrected portion cannot be displayed, 256 gray levels could not be sufficiently represented. However, the present invention can control the amount of light from the panel layer 80 using the liquid crystal shutter 60, so that the R, G, and B images can be adjusted. White balance can be achieved without loss of signal.

The time for which each driving voltage is applied is limited to the sustain period. Therefore, since the red (R), green (G), and blue (B) driving voltages are not applied in the reset period and the address period, even if light generated by the reset discharge is generated in the entire panel, the liquid crystal shutter 60 blocks the image. This does not lower the contrast. That is, the light generated in the panel layer 80 is blocked by turning off the liquid crystal of the liquid crystal shutter 60 during the reset period.

As described above, in the method and apparatus for driving a plasma display panel according to the present invention, a liquid crystal shutter formed on the panel layer is divided into an R electrode, a G electrode, and a B electrode, each of which is controlled by being bundled with one voltage and emitted from the panel layer. The amount of light can be adjusted to achieve white balance without loss of the R, G and B video signals.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a perspective view showing a discharge cell of a conventional three-electrode AC surface discharge plasma display panel.

FIG. 2 is a cross-sectional view of the plasma display panel shown in FIG. 1.

3 is a diagram illustrating a method of driving the plasma display panel shown in FIG. 1.

4 is a driving waveform diagram of the plasma display panel shown in FIG. 1.

5 is a block diagram schematically illustrating a driving apparatus of a conventional plasma display panel.

6 is a block diagram schematically illustrating an apparatus for driving a plasma display panel according to an exemplary embodiment of the present invention.

7 is a diagram illustrating a plasma display panel employing liquid crystal according to an exemplary embodiment of the present invention.

8 is a diagram illustrating a three-dimensional perspective view of the PDP shown in FIG. 7.

FIG. 9 is a diagram illustrating a plan view of the PDP illustrated in FIG. 7.

10 is a view showing the effect of the driving method of the present invention for achieving white balance.

11 (a), (b) and (c) are views showing the effects shown in FIG. 10 visually.

<Description of Symbols for Main Parts of Drawings>

10: upper substrate 18: lower substrate

Y: scan electrode Z: sustain electrode

X: address electrode 12Y, 12Z: transparent electrode

13Y, 13Z: metal bus electrode 14: upper dielectric layer

16: protective film 22: lower dielectric layer

24: partition 26: phosphor layer

1,3,5,11: Analog-to-digital converter 12: Gamma correction unit

2,4,6: gamma and white balance correction unit

Claims (10)

delete delete delete delete A plasma display panel having a panel layer including a pixel cell consisting of red, green and blue discharge cells and a liquid crystal shutter for controlling the amount of light, And the liquid crystal shutter controls the time at which light is emitted from the red, green, and blue discharge cells to be emitted for each of the red, green, and blue discharge cells. The method of claim 5, And the liquid crystal shutter is controlled to set the light emission time of the green discharge cell to be longer than the light emission time of the red and blue discharge cells. The method of claim 5, And the liquid crystal shutter is controlled to set the light emission time of the red discharge cell to be longer than the light emission time of the blue discharge cell. The method of claim 5, And a video signal input to each of the red, green, and blue discharge cells from the outside is supplied to the panel layer after gamma correction. The method of claim 8, And a white balance by adjusting the light emission time of the red, green and blue discharge cells. The method of claim 5, And the liquid crystal shutter emits light only in the sustain period, and blocks light emission in other periods.