KR100475534B1 - 반도체 소자의 금속 배선 형성 방법 - Google Patents
반도체 소자의 금속 배선 형성 방법 Download PDFInfo
- Publication number
- KR100475534B1 KR100475534B1 KR10-2002-0085496A KR20020085496A KR100475534B1 KR 100475534 B1 KR100475534 B1 KR 100475534B1 KR 20020085496 A KR20020085496 A KR 20020085496A KR 100475534 B1 KR100475534 B1 KR 100475534B1
- Authority
- KR
- South Korea
- Prior art keywords
- forming
- layer
- copper
- plasma
- aluminum
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02362—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment formation of intermediate layers, e.g. capping layers or diffusion barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/7685—Barrier, adhesion or liner layers the layer covering a conductive structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02167—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (11)
- 소정의 구조가 형성된 반도체 기판 상부에 층간 절연막을 형성한 후 다마신 패턴을 형성하는 단계;상기 다마신 패턴을 포함한 전체 구조 상부에 확산 방지막 및 시드층을 형성한 후 상기 다마신 패턴이 매립되도록 구리층을 형성하는 단계;상기 구리층, 시드층 및 확산 방지막을 연마하여 구리 배선을 형성하는 단계;알루미늄이 포함된 전해질을 이용한 도금 공정으로 상기 구리 배선 상부에만 알루미늄층을 형성하는 단계; 및상기 알루미늄층 상부에 캐핑층을 형성하는 단계를 포함하여 이루어진 것을 특징으로 하는 반도체 소자의 금속 배선 형성 방법.
- 제 1 항에 있어서, 상기 도금 공정은 디에틸에테르에 AlCl3 및 LiAlH4을 각각 10 내지 1000g/ℓ및 1 내지 100g/ℓ정도 용해시켜 만든 전해질을 이용하여 -10 내지 80℃의 온도와 0.1 내지 500A/㎠의 전위를 인가하여 실시하는 것을 특징으로 하는 반도체 소자의 금속 배선 형성 방법.
- 제 1 항에 있어서, 상기 알루미늄층은 상기 구리 배선 상부에만 1 내지 1500Å의 두께로 형성하는 것을 특징으로 하는 반도체 소자의 금속 배선 형성 방법.
- 제 1 항에 있어서, 상기 캐핑층은 산화 처리 또는 질화 처리를 실시하여 형성된 Al2O3막 또는 AlN막인 것을 특징으로 하는 반도체 소자의 금속 배선 형성 방법.
- 제 4 항에 있어서, 상기 산화 처리 또는 질화 처리는 플라즈마 처리, 반응로 열처리 또는 자연 산화법으로 실시하는 것을 특징으로 하는 반도체 소자의 금속 배선 형성 방법.
- 제 5 항에 있어서, 상기 플라즈마 처리는 리모트 플라즈마를 사용하거나 플라즈마 식각을 실시하는 것을 특징으로 하는 반도체 소자의 금속 배선 형성 방법.
- 제 5 항에 있어서, 상기 리모트 플라즈마는 리액션 처리를 이용하고, 상기 플라즈마 식각은 싱글 또는 듀얼 주파수 식각을 실시하는 것을 특징으로 하는 반도체 소자의 금속 배선 형성 방법.
- 제 5 항에 있어서, 상기 플라즈마 처리는 O2나 O3 가스 또는 그 혼합 기체를 이용하여 실시하며, 각 플라즈마 처리시 단일 스텝 또는 1 내지 10회의 다단계 스텝으로 실시하는 것을 특징으로 하는 반도체 소자의 금속 배선 형성 방법.
- 제 7 항에 있어서, 상기 O2를 이용한 플라즈마 처리는 O2 가스를 1.0 내지 1000sccm 유입시키고 -50 내지 400℃의 온도에서 0.1 내지 10kW의 전력을 인가하여 1초 내지 10분동안 실시하는 것을 특징으로 하는 반도체 소자의 금속 배선 형성 방법.
- 제 7 항에 있어서, 상기 O3를 이용한 플라즈마 처리는 O3 가스를 1.0 내지 1000sccm 유입시키고 -50 내지 400℃의 온도에서 0.1 내지 10kW의 전력을 인가하여 1초 내지 10분동안 실시하는 것을 특징으로 하는 반도체 소자의 금속 배선 형성 방법.
- 제 1 항에 있어서, 상기 캐핑층을 형성한 후 DI와 산을 이용한 클리닝을 실시하는 단계를 더 포함하는 것을 특징으로 하는 반도체 소자의 금속 배선 형성 방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2002-0085496A KR100475534B1 (ko) | 2002-12-27 | 2002-12-27 | 반도체 소자의 금속 배선 형성 방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2002-0085496A KR100475534B1 (ko) | 2002-12-27 | 2002-12-27 | 반도체 소자의 금속 배선 형성 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20040058974A KR20040058974A (ko) | 2004-07-05 |
KR100475534B1 true KR100475534B1 (ko) | 2005-03-10 |
Family
ID=37351025
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR10-2002-0085496A KR100475534B1 (ko) | 2002-12-27 | 2002-12-27 | 반도체 소자의 금속 배선 형성 방법 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100475534B1 (ko) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100703973B1 (ko) * | 2005-07-20 | 2007-04-06 | 삼성전자주식회사 | 이중 캡핑막을 갖는 반도체 소자의 배선 및 그 형성 방법 |
-
2002
- 2002-12-27 KR KR10-2002-0085496A patent/KR100475534B1/ko active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
KR20040058974A (ko) | 2004-07-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6660634B1 (en) | Method of forming reliable capped copper interconnects | |
US7405157B1 (en) | Methods for the electrochemical deposition of copper onto a barrier layer of a work piece | |
US6348410B1 (en) | Low temperature hillock suppression method in integrated circuit interconnects | |
US6734101B1 (en) | Solution to the problem of copper hillocks | |
KR100538633B1 (ko) | 반도체 소자의 금속 배선 형성 방법 | |
JP2001053077A (ja) | 半導体集積回路装置およびその製造方法 | |
KR100475534B1 (ko) | 반도체 소자의 금속 배선 형성 방법 | |
KR100667905B1 (ko) | 반도체 소자의 구리 금속배선 형성방법 | |
KR100888199B1 (ko) | 반도체 소자의 금속배선 형성방법 | |
JP2001144094A (ja) | 半導体素子の金属配線形成方法 | |
KR20010003614A (ko) | 반도체 소자의 상감형 금속배선 형성방법 | |
KR100456259B1 (ko) | 반도체 소자의 구리 배선 형성방법 | |
KR100399909B1 (ko) | 반도체 소자의 층간 절연막 형성 방법 | |
KR20100011799A (ko) | 반도체 소자의 제조방법 | |
KR100623332B1 (ko) | 반도체소자의 금속배선 형성방법 | |
KR100701675B1 (ko) | 반도체 소자의 구리배선 형성방법 | |
KR100467495B1 (ko) | 반도체 소자의 금속 배선 형성 방법 | |
KR100720401B1 (ko) | 반도체 소자의 구리 배선 형성 방법 | |
KR101158059B1 (ko) | 반도체 소자의 금속 배선 형성 방법 | |
KR100338102B1 (ko) | 반도체 소자의 구리 배선 형성 방법 | |
KR100252886B1 (ko) | 반도체소자의 배선형성방법 | |
KR101048002B1 (ko) | 반도체 소자의 장벽 금속층 형성방법 | |
KR100451767B1 (ko) | 반도체 소자의 금속 배선 형성방법 | |
KR20080088093A (ko) | 반도체 소자의 금속배선 형성방법 | |
KR100451766B1 (ko) | 반도체 소자의 금속 배선 형성방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
N231 | Notification of change of applicant | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20130122 Year of fee payment: 9 |
|
FPAY | Annual fee payment |
Payment date: 20140116 Year of fee payment: 10 |
|
FPAY | Annual fee payment |
Payment date: 20150116 Year of fee payment: 11 |
|
FPAY | Annual fee payment |
Payment date: 20160119 Year of fee payment: 12 |
|
FPAY | Annual fee payment |
Payment date: 20170117 Year of fee payment: 13 |
|
FPAY | Annual fee payment |
Payment date: 20180116 Year of fee payment: 14 |
|
FPAY | Annual fee payment |
Payment date: 20190117 Year of fee payment: 15 |
|
FPAY | Annual fee payment |
Payment date: 20200116 Year of fee payment: 16 |