KR100438767B1 - Line drawing device using dda algorithm, resulting in increase of performance and processing speed - Google Patents

Abstract

PURPOSE: A line drawing device using DDA(Digital Differential Analyzer) algorithm is provided to apply decimal arithmetic to one of x-axis and y-axis with a slope between a start point and an end point, and to perform overflow and round-off for the decimal arithmetic, thereby improving correctness. CONSTITUTION: A data input unit(20) compares inputted data in a start point or data in a current point incremented from the data of the start point with inputted data in an end point, to output the data in the start point or the current point smaller than the data in the end point. An increment processing unit(40) adds an output of the data input unit(20) and bits of a fixed number according to increment of the fixed number bits to output an added result as data in the current point, or adds an output of the data input unit(20) and overflow of accumulated bits of a decimal point to output an added result as data in the current point. A data output unit(60) outputs a result of the increment processing unit(40) intactly, or rounds off one decimal place of the accumulated bits of a decimal point to add to the output of the increment processing unit(40). If the increment for the x-axis is bits of the fixed number, the increment for the y-axis becomes bits of the decimal point, and vice versa.

Description

D.D.A. Line Drawing Device Using Algorithm

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to computer graphics, and more particularly, to a line drawing device using a DDA (Digital Differential Analyzer) algorithm for performing line drawing in a graphic accelerator.

In recent years, with the development of the field of computer graphics, the importance of the graphics accelerator which determines the speed of graphics processing is increasing. Among other things, the line drawing engine, which determines how fast a line is drawn in a limited time, plays an important role in evaluating the performance of the graphics accelerator.

Bresenham and DDA algorithms are the main methods for implementing the line drawing engine used to draw shapes based on lines.

Conventionally, the line drawing engine is implemented by using the Bressenham algorithm. However, this algorithm does not process numerical values below the decimal point as x, y coordinate values, and also does not know the end point in advance. There was this.

As a result, D.D.A. Attention has been paid to the implementation of line drawing engines using algorithms, especially when used in 3D graphics. D.D.A. In short, the algorithm finds a slope between two points from the starting point and the ending point on the x and y coordinates, and performs line drawing from the starting point to the end point according to the slope.

However, these D.A. In implementing the algorithm as a line drawing engine, the processing speed is lowered if the decimal point processing method is used on both the x-axis and the y-axis when dealing with the gradient below the decimal point.

The technical problem to be achieved by the present invention is to improve the performance and processing speed by performing a decimal point processing on one axis of the x-axis or y-axis using the slope between the starting point and the end point, and the overflow generated during the decimal point processing with a simple circuit configuration De-D.C improves accuracy by performing overflow and rounding. The present invention provides a line drawing apparatus using an algorithm.

1 is a detailed block diagram of a line drawing apparatus using a D.A. algorithm according to the present invention.

FIG. 2 is a detailed block diagram of a line drawing apparatus implemented by applying the apparatus shown in FIG. 1 to both the x-axis and the y-axis.

In order to achieve the above object, it is preferable that the line drawing apparatus using the D.A. algorithm according to the present invention comprises a data input unit, an incremental processing unit, and a data output unit. The data input unit compares the data of the current point incremented from the data of the start point or the data of the start point with the data of the end point and outputs if it is smaller than the data of the end point. The increment processing unit adds the output of the data input unit and the integer bit according to the increment value, which is an integer bit, and outputs the data as the current point, or adds the overflow of the output of the data input unit and the accumulated decimal point bits according to the increment value, which is the decimal point bit. Output as data of the current point. The data output section outputs the output of the increment processing section as it is, or adds the bits of the decimal point first digits of the decimal point bits accumulated in the output of the increment processing section by rounding them up. Here, the line drawing apparatus performs line drawing on each of the x and y axes, and if the increment value on the x axis is an integer bit, the increment value on the y axis is a decimal point bit and vice versa.

Hereinafter, D.D.A. according to the present invention. The configuration and operation of the line drawing apparatus using the algorithm will be described as follows with reference to the accompanying drawings.

1 is a detailed block diagram of a line drawing apparatus using a D.A. algorithm according to the present invention, which includes a data input unit 20 including a multiplexer (MUX) 22, a comparator 24, and a register 26, Incremental processing section 40 consisting of first to third adders 42, 46, 50 and registers 44, 48, 52 and data output section consisting of fourth adder 64 and registers 62, 66 It consists of 60.

In order to perform the line drawing, the apparatus shown in FIG. 1 must first input data of a start point and an end point on x and y coordinates. For each of the x-axis and y-axis, the data at the starting point is called xa, ya, the data at the end point is called xb, yb, and the incremental value representing the interval between the data at the starting point and the data at the end point is called x_inc, y_inc. . For the sake of simplicity, the apparatus shown in FIG. 1 is supposed to perform line drawing on the y axis, but the same on the x axis.

The above-mentioned increments (x_inc, y_inc) are values corresponding to the slope between the starting point and the ending point and may be expressed as follows.

1) If slope is greater than or equal to 1: y_inc = 1

x_inc = 0.xxx ...

2) If the slope is less than 1: y_inc = 0.xxx ...

x_inc = 1

In other words, if the slope is greater than or equal to 1, since the inclination is inclined to the y-axis much on the basis of 45 ° on the x and y coordinates, the increment value of the y-axis is 1, whereas the increment value of the x-axis is represented by the decimal point, while the slope is If is less than 1, since the inclination is inclined much on the x-axis, the increment value of the x-axis may be 1, whereas the increment value of the y-axis may be represented by a decimal point.

In this way, when the increment is expressed using the slope, the increment value of one axis of the x-axis and the y-axis needs only one integer bit, and the increment value of the other axis is determined by the decimal point bits for accuracy. The device of the present invention shown in FIG. 1 is implemented with 16 decimal points as an example to increase accuracy. However, the present invention is not limited to these numerical values.

The operation of the line drawing apparatus of the present invention will now be described with reference to FIG.

First, the data input unit 20 initially inputs the data ya of the starting point and the data yb of the ending point, and outputs the data ya of the starting point to the incremental processing unit 40. In addition, the data of the current point incrementally processed from the data ya of the starting point is input again and compared with the data yb of the end point. The above operation is repeated, and if the data yb of the end point is output, the output terminal y_out is output.

Specifically, the multiplexer 22 selectively outputs the data ya of the starting point and the data yi of the incremented current point by the selection signal y_sel. That is, according to the selection signal y_sel, it is discriminated whether it is data ya of the starting point or data yi of the current point.

The comparator 24 compares the data selected in the multiplexer 22 with the data yb of the endpoint. As a result of the comparison, if the data ya of the starting point or the data yi of the current point is smaller than the data yb of the end point, the data is output to the register 26 as it is, otherwise the data at this time is the final value, that is, the data of the end point. It is regarded as (yb) and printed through the output terminal y_out.

The register 26 latches the output of the comparator 24 in synchronization with the clock signal gclk, and outputs the latched result. The use of such a register 26 has a high operating frequency (e.g., the clock signal is at least 80 MHz or more at this point in time) and a large number of bits are used to obtain a larger and more accurate value. Because there is. In addition, the other registers described below play the same role.

Next, the increment processing unit 40 adds the output of the data input unit 20 and the increment value y_inc according to the increment value y_inc, which is an integer bit, and adds the added result to the data of the current point of incremental processing described above ( yi) is fed back to the data input unit 20, or the output of the data input unit 20 and the overflow of the accumulated decimal point bits are added according to the increment value y_inc, which is a decimal point bit, and the added result is fed back as well.

Here, the increment y_inc depends on the slope as described above, and the slope is obtained in advance in a set-up engin in a microprocessor or graphics accelerator. The increment value y_inc is composed of an integer part of 1 bit, which is the most significant bit, and a decimal point part of 16 bits, which is the remaining bit.

Specifically, the first adder 42 is an integer adder and inputs an incremental value y_inc of the most significant 1 bit to add to the output of the register 26. The register 44 latches the output of the first adder 42 in synchronization with the clock signal gclk, and outputs the latched result.

On the other hand, the second adder 46 is a decimal point adder, and adds the remaining 16-bit increment value y_inc to the initial value or the previous 16-bit increment value. The register 48 latches the output of the second adder 46 in synchronization with the clock signal gclk, and feeds back the remaining 16 bits except the most significant 1 bit from the latched result back to the second adder 46. That is, the register 48 is composed of 17 bits to latch the overflow generated at the output of the second adder 46, and outputs the most significant 1 bit corresponding to the overflow to the third adder 50.

The third adder 50 is an integer adder, which adds the outputs of the register 44 and the register 48, where the output of the register 48 corresponds to the aforementioned overflow. The register 52 latches the output of the third adder 50 in synchronization with the clock signal gclk, and feeds back the latched result to the multiplexer 22 as the above-mentioned incremental current data yi.

There is only one adder that actually adds in the first and second adders 42 and 46 of the incremental processing section 40 described above.

That is, when the increment y_inc is 1, since there are no 16-bit decimal point bits input to the second adder 46, no overflow is output from the register 48, and thus, the third adder 50 is generated. There is no overflow entered. In this case, the actually operated first adder 42 adds the output of the data input unit 20 by 1, which is an increment value y_inc. The added result is fed back to the data input unit 20 and the adding operation of the first adder 42 is repeated until the data yi of the current point is eventually equal to the data yb of the end point.

On the contrary, if the increment y_inc is less than one decimal point bit, 1 is not input to the first adder 42, so that the output of the register 44 is the same as the output of the data input unit 20. At this time, the second adder 46, which is actually operating, continuously accumulates 16-bit decimal point bits, which is an increment value y_inc, with the previous value, and the register 48 latches the overflow when an overflow occurs. The third adder 50 adds the output of the register 44 and the most significant one bit, i.e., overflow, latched in the register 48. The added result is fed back to the data input unit 20 and the adding operation of the second and third adders 46 and 50 is repeated until the data yi of the current point is eventually equal to the data yb of the end point. .

Finally, the data output unit 60 simultaneously inputs the data yi of the current point fed back from the increment processing unit 40 to the data input unit 20 and outputs the data through the output terminal y_out as it is, or the decimal point of accumulated decimal point bits. The bit of the first digit is added to the data yi of the current point and output through the output terminal y_out.

Specifically, the register 62 stores the 15th bit value of the output of the register 48 that latches the output of the second adder 46 by the increment processor 40, that is, the bit value of the decimal point first digit. In synchronization with gclk), the latched result is output.

The fourth adder 64 is a round adder, which adds the data yi of the current point and the output of the register 62. That is, when the fourth adder 64 inputs the output of the register 62, the second adder 46 when the increment value y_inc is less than one decimal point in relation to the second adder 46 described above. To round off more than 0.5 at the output of.

Therefore, while the operation of the register 48 has been omitted earlier, the most significant one bit [16] corresponding to the overflow in the output of the register 48 is output to the third adder 50, and the next 15th bit [ 15] is output to the register 62, and the 16-bit decimal point bits [15: 0] are fed back to the second adder 46.

The register 66 latches the output of the fourth adder 64 in synchronization with the clock signal gclk, and outputs the latched result through the output terminal y_out.

According to the line drawing device of the present invention described so far, the data of the current point (yi) of the starting point, the data of the end point (yb) and the increment value (y_inc) are input and incremented according to the increment value (y_inc). ) Is output until it is the same as the data (yb) of the end point.

FIG. 2 is a detailed block diagram of a line drawing apparatus implemented by applying the apparatus shown in FIG. 1 to both the x-axis and the y-axis, where 100 represents a line drawing portion for the y-axis, and 200 represents a line drawing portion for the x-axis. Indicates.

Since the configuration and operation of each unit illustrated in FIG. 2 are the same as those described with reference to FIG. 1, the description thereof will be omitted. However, if the increment x_inc input to the line drawing unit 100 for the x-axis is 1, the increment y_inc input to the line drawing unit 200 for the y-axis becomes less than one decimal point bit. And vice versa.

As a result, when the first adder 42 'actually adds in the line drawing unit 100 for the x-axis according to the increment value x_inc, the second adder 46 in the line drawing unit 200 for the y-axis. ) Will actually add up according to the increment (y_inc), and vice versa.

As described above, D.D.A. according to the present invention. The line drawing device using the algorithm improves performance and processing speed by performing the decimal point processing on one of the x-axis or the y-axis using the slope between the starting point and the end point, and the overflow that occurs during the decimal point processing with a simple circuit configuration ( The accuracy is improved by performing overflow) and rounding.

Claims (6)

A graphics accelerator that performs line drawing by entering data at the start point, data at the end point, and increments. In the line drawing apparatus using an algorithm, Data input means for outputting the data of the inputted starting point or the current point incremented from the data of the starting point and comparing the data of the inputted end point with the data of the inputted end point; Add the output of the data input means and the integer bit according to the increment value, which is an integer bit, and output the data as the data of the current point, or output of the data input means and accumulated decimal point bits according to the increment value, which is a decimal point bit. Increment processing means for adding an overflow and outputting the data as the current point; And A data output means for outputting the output of the increment processing means as it is, or adding the output of the incremental decimal means by rounding the bits of the first decimal place of the accumulated decimal point bits, The line drawing apparatus performs the line drawing for each of the x and y axes, and if the increment value for the x axis is the integer bit, the increment value for the y axis is the decimal point bit and vice versa. D.D.A, characterized in that Line drawing device using algorithm. The method of claim 1, wherein the increment value is dependent on the slope between the data of the start point and the data of the end point, and when the slope is greater than or equal to 1, the increment value is represented by the integer bit, and the slope is less than 1. And the incremental value is represented by the decimal point bit. The line drawing apparatus using the D.D.algorithm. The method of claim 1, wherein the data input means, Selection means for selectively outputting data of the starting point and data of the current point in response to a selection signal; Comparing the output of the selecting means with the data of the end point; outputting the selecting means to the incremental processing means if the output of the selecting means is smaller than the data of the end point; and if the output of the selecting means is greater than or equal to the data of the end point, Comparison means for outputting as an output of the line drawing apparatus; And And a register for latching an output of said comparing means outputted to said incremental processing means in response to a clock signal. The method of claim 1, wherein the incremental processing means, A first adder for adding an output of said data input means and said integer bit; A first register for latching an output of the first adder in response to a clock signal; A second adder that adds the decimal point bit and the previous decimal point bit and outputs the accumulated decimal point bits; A second register for latching the accumulated decimal point bits and outputting the remaining bits except the overflow in the latched result as the previous decimal point bits; A third adder for adding the output of the first register and the overflow; And And a third register for latching an output of the third adder in response to the clock signal. Line drawing device using algorithm. The method of claim 4, wherein the second register, Output the overflow to the third adder, output the remaining bits to the second adder as the previous decimal point bits, and round the bits of the first decimal place of the remaining bits to the data output means. Line drawing apparatus using a D. D. algorithm, characterized in that the output. The method of claim 1, wherein the data output means, The fourth register for latching a bit of a decimal point first digit of the accumulated decimal point bits in response to a clock signal as the rounding; A fourth adder for adding the output of said incremental processing means and the output of said fourth register; And And a fifth register configured to latch the output of the fourth adder in response to the clock signal. Line drawing device using algorithm.

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