KR100433499B1 - 동적 디스플레이 메모리를 구현하기 위한 방법 및 장치 - Google Patents

동적 디스플레이 메모리를 구현하기 위한 방법 및 장치 Download PDF

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Publication number
KR100433499B1
KR100433499B1 KR10-2001-7008948A KR20017008948A KR100433499B1 KR 100433499 B1 KR100433499 B1 KR 100433499B1 KR 20017008948 A KR20017008948 A KR 20017008948A KR 100433499 B1 KR100433499 B1 KR 100433499B1
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South Korea
Prior art keywords
memory
graphics
operand
address
control component
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Expired - Fee Related
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KR10-2001-7008948A
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English (en)
Korean (ko)
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KR20020013832A (ko
Inventor
도일피터
스리니바스아디탸
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인텔 코오퍼레이션
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/363—Graphics controllers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/122—Tiling

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Graphics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Image Input (AREA)
  • Image Processing (AREA)
KR10-2001-7008948A 1999-01-15 2000-01-12 동적 디스플레이 메모리를 구현하기 위한 방법 및 장치 Expired - Fee Related KR100433499B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/231,609 1999-01-15
US09/231,609 US6362826B1 (en) 1999-01-15 1999-01-15 Method and apparatus for implementing dynamic display memory

Publications (2)

Publication Number Publication Date
KR20020013832A KR20020013832A (ko) 2002-02-21
KR100433499B1 true KR100433499B1 (ko) 2004-05-31

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-2001-7008948A Expired - Fee Related KR100433499B1 (ko) 1999-01-15 2000-01-12 동적 디스플레이 메모리를 구현하기 위한 방법 및 장치

Country Status (9)

Country Link
US (2) US6362826B1 (https=)
EP (1) EP1141930B1 (https=)
JP (1) JP4562919B2 (https=)
KR (1) KR100433499B1 (https=)
CN (1) CN1135477C (https=)
AU (1) AU3470700A (https=)
DE (1) DE60038871D1 (https=)
TW (1) TWI250482B (https=)
WO (1) WO2000042594A1 (https=)

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US6828977B2 (en) * 2001-02-15 2004-12-07 Sony Corporation Dynamic buffer pages
US7205993B2 (en) * 2001-02-15 2007-04-17 Sony Corporation Checkerboard buffer using two-dimensional buffer pages and using memory bank alternation
US6803917B2 (en) 2001-02-15 2004-10-12 Sony Corporation Checkerboard buffer using memory bank alternation
US6795079B2 (en) * 2001-02-15 2004-09-21 Sony Corporation Two-dimensional buffer pages
US7379069B2 (en) 2001-02-15 2008-05-27 Sony Corporation Checkerboard buffer using two-dimensional buffer pages
US20030058368A1 (en) * 2001-09-24 2003-03-27 Mark Champion Image warping using pixel pages
US9058292B2 (en) 2004-12-29 2015-06-16 Intel Corporation System and method for one step address translation of graphics addresses in virtualization
US7444583B2 (en) * 2005-05-27 2008-10-28 Microsoft Corporation Standard graphics specification and data binding
US7512752B2 (en) 2005-05-31 2009-03-31 Broadcom Corporation Systems, methods, and apparatus for pixel fetch request interface
US7831780B2 (en) * 2005-06-24 2010-11-09 Nvidia Corporation Operating system supplemental disk caching system and method
US7616218B1 (en) * 2005-12-05 2009-11-10 Nvidia Corporation Apparatus, system, and method for clipping graphics primitives
US8593474B2 (en) * 2005-12-30 2013-11-26 Intel Corporation Method and system for symmetric allocation for a shared L2 mapping cache
US8601223B1 (en) * 2006-09-19 2013-12-03 Nvidia Corporation Techniques for servicing fetch requests utilizing coalesing page table entries
US8543792B1 (en) 2006-09-19 2013-09-24 Nvidia Corporation Memory access techniques including coalesing page table entries
US8352709B1 (en) 2006-09-19 2013-01-08 Nvidia Corporation Direct memory access techniques that include caching segmentation data
US8347064B1 (en) 2006-09-19 2013-01-01 Nvidia Corporation Memory access techniques in an aperture mapped memory space
US7840732B2 (en) * 2006-09-25 2010-11-23 Honeywell International Inc. Stacked card address assignment
US8700883B1 (en) 2006-10-24 2014-04-15 Nvidia Corporation Memory access techniques providing for override of a page table
US8707011B1 (en) 2006-10-24 2014-04-22 Nvidia Corporation Memory access techniques utilizing a set-associative translation lookaside buffer
US8504794B1 (en) 2006-11-01 2013-08-06 Nvidia Corporation Override system and method for memory access management
US8347065B1 (en) 2006-11-01 2013-01-01 Glasco David B System and method for concurrently managing memory access requests
US8533425B1 (en) 2006-11-01 2013-09-10 Nvidia Corporation Age based miss replay system and method
US8706975B1 (en) 2006-11-01 2014-04-22 Nvidia Corporation Memory access management block bind system and method
US8607008B1 (en) 2006-11-01 2013-12-10 Nvidia Corporation System and method for independent invalidation on a per engine basis
US8700865B1 (en) 2006-11-02 2014-04-15 Nvidia Corporation Compressed data access system and method
US20080276067A1 (en) * 2007-05-01 2008-11-06 Via Technologies, Inc. Method and Apparatus for Page Table Pre-Fetching in Zero Frame Display Channel
US8719547B2 (en) * 2009-09-18 2014-05-06 Intel Corporation Providing hardware support for shared virtual memory between local and remote physical memory
US10146545B2 (en) 2012-03-13 2018-12-04 Nvidia Corporation Translation address cache for a microprocessor
US9880846B2 (en) 2012-04-11 2018-01-30 Nvidia Corporation Improving hit rate of code translation redirection table with replacement strategy based on usage history table of evicted entries
US10241810B2 (en) 2012-05-18 2019-03-26 Nvidia Corporation Instruction-optimizing processor with branch-count table in hardware
US20140189310A1 (en) 2012-12-27 2014-07-03 Nvidia Corporation Fault detection in instruction translations
US10108424B2 (en) 2013-03-14 2018-10-23 Nvidia Corporation Profiling code portions to generate translations
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Cited By (2)

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Publication number Priority date Publication date Assignee Title
US9619860B2 (en) 2014-12-24 2017-04-11 Inte Corporation Hybrid on-demand graphics translation table shadowing
KR101751629B1 (ko) * 2014-12-24 2017-06-27 인텔 코포레이션 하이브리드 온디맨드 그래픽 변환 테이블 쉐도잉

Also Published As

Publication number Publication date
US6362826B1 (en) 2002-03-26
KR20020013832A (ko) 2002-02-21
WO2000042594A1 (en) 2000-07-20
US6650332B2 (en) 2003-11-18
CN1135477C (zh) 2004-01-21
EP1141930B1 (en) 2008-05-14
JP4562919B2 (ja) 2010-10-13
DE60038871D1 (de) 2008-06-26
TWI250482B (en) 2006-03-01
WO2000042594A9 (en) 2002-03-28
JP2002535763A (ja) 2002-10-22
US20020075271A1 (en) 2002-06-20
HK1038091A1 (en) 2002-03-01
CN1347545A (zh) 2002-05-01
EP1141930A1 (en) 2001-10-10
AU3470700A (en) 2000-08-01

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