KR100420241B1 - Method and apparatus for testing a semiconductor chip for a image sensor - Google Patents

Abstract

The present invention enables the optical test of a plurality of semiconductor chips for image sensors on the wafer can be performed simultaneously in units of N chips. To this end, the present invention performs an optical test in units of one semiconductor chip on a wafer. Unlike the conventional method described above, a test pad is used to form an available pad (driving power supply voltage (Vcc) pad, ground voltage (Vss) pad, data input / output pad, control pad, clock pad, etc.) on each semiconductor chip on the wafer. Multiple test pads for use are formed simultaneously on two or three sides of each chip, and the test probes are connected to pads (available pads and test pads) formed on two or three sides of each chip, so that N or By simultaneously performing optical tests in units of N × N semiconductor chips, the time required for optical testing of semiconductor chips for image sensors can be reduced. In addition, the productivity of the semiconductor chip for image sensor can be increased and the manufacturing cost can be reduced.

Description

Method for testing semiconductor chip for image sensor and apparatus therefor {METHOD AND APPARATUS FOR TESTING A SEMICONDUCTOR CHIP FOR A IMAGE SENSOR}

The present invention relates to a method for testing a manufactured semiconductor chip, and more particularly, to a test method suitable for testing a semiconductor chip for an image sensor.

As is well known, when the semiconductor chip is manufactured, the semiconductor chip is tested for quality of each semiconductor chip in a wafer state and the final quality is determined through the test process.

On the other hand, the wafer test of the image sensor, unlike the general semiconductor products, consists of a process of testing the electrical failure and the optical test, the optical test is to irradiate the semiconductor chip for the image sensor with light generated from the light source By testing the degree of light response of the pixels to determine whether good quality.

Conventionally, wafer testing of an image sensor is not performed on a wafer basis, but on a semiconductor chip basis (that is, one test for each chip), which is performed by manufacturing a probe card to test chips on a wafer. This is because the multi-chip test technique used in general semiconductor products cannot be used because the light source must be positioned so that the shadow of the probe card's probe (Prober) does not occur on the pixel of the sensor.

That is, in order to perform optical tests on several chips at the same time, a light source must be separately configured for each chip. In this case, a shadow with a light source by a probe (prover) is generated on the sensor, thereby causing optical defects for each chip. This is because it cannot be distinguished accurately.

Therefore, as described above, the conventional method of testing the image sensor semiconductor chip on a chip-by-chip basis inevitably consumes a lot of time for the test of the semiconductor chip, and this problem may eventually reduce the productivity of the image sensor semiconductor chip. In addition, it is a situation that acts as a major factor to increase the manufacturing cost (manufacturing cost) of the semiconductor chip for image sensor.

Unlike the above, by configuring a plurality of chips at the same time (optical test) by using a separate probe card and a separate light source for each chip on the wafer, it is possible to solve the problems of the prior art described above, In this case, not only does the economic cost increase due to the use of multiple light sources, but also a new problem of the volume and expensiveness of the test equipment, and it is technically very difficult to place a separate light source in a spatially narrow area itself There is a problem.

Accordingly, the present invention is to solve the above problems of the prior art, an optical chip test method for an image sensor that can perform an optical test for a plurality of image sensor semiconductor chip on the wafer at the same time unit of N chip. And an apparatus thereof.

According to one aspect of the present invention for achieving the above object, there is provided a method of performing an optical test of a semiconductor chip for an image sensor on a wafer using light from a light source, wherein each semiconductor on the wafer is provided. Forming a plurality of available pads and test pads on predetermined portions of three sides of the chip; Mounting the wafer on an optical test equipment, and connecting a test probe to the plurality of available pads and test pads positioned at three sides which are not adjacent to each other in two adjacent semiconductor chips; And irradiating light provided from the light source to two adjacent semiconductor chips to simultaneously perform an optical test.

According to another aspect of the present invention for achieving the above object, there is provided a method of performing an optical test of a semiconductor chip for an image sensor on a wafer using light from a light source, each semiconductor on the wafer Forming a plurality of available pads and test pads on predetermined portions of two sides of the chip; After mounting the wafer on the optical test equipment, a process of connecting a test probe to the plurality of available pads and test pads located in two adjacent sides of each other in four adjacent semiconductor chips in a 2 × 2 form ; And irradiating the light provided from the light source to the four adjacent semiconductor chips to simultaneously perform an optical test.

According to still another aspect of the present invention, there is provided a method of performing an optical test of a semiconductor chip for an image sensor on a wafer using light from a light source, the method comprising: Forming a plurality of available pads and test pads on a predetermined portion of one or two sides of the semiconductor chip; After placing the wafer on the optical test equipment, the plurality of available pads and test pads located on one side or two sides of each of the six semiconductor chips adjacent in the form of 2 × 3 or 3 × 2 are not adjacent to each other. Connecting a test probe; And irradiating light provided from the light source to the six adjacent semiconductor chips to simultaneously perform an optical test.

According to another aspect of the present invention, there is provided an apparatus for performing an optical test of a semiconductor chip for an image sensor on a wafer using light from a light source, wherein a part of the light provided from the light source is transmitted. Light separation means for reflecting the remaining portion; A second irradiation system for performing an optical test by focusing the transmitted light onto a lens and irradiating a chip group including at least one semiconductor chip having a soluble pad and a test pad simultaneously formed on at least one side thereof; A reflection mirror reflecting the transmitted light at a predetermined angle; And a second irradiation system configured to perform an optical test by focusing the reflected light to another lens to irradiate another chip group including at least one semiconductor chip having a soluble pad and a test pad formed on at least one side thereof. A semiconductor chip test apparatus is provided.

1 is a schematic configuration diagram of a semiconductor chip test apparatus for an image sensor according to an embodiment of the present disclosure;

2 is a plan view from above of a probe card when testing a semiconductor chip for an image sensor according to an embodiment of the present invention;

3 is an enlarged plan view of a semiconductor chip for an image sensor tested according to an embodiment of the present disclosure;

4 is a schematic configuration diagram of a semiconductor chip test apparatus for an image sensor according to another exemplary embodiment of the present disclosure;

5 is a plan view from above of a probe card when testing a semiconductor chip for an image sensor according to another exemplary embodiment of the present disclosure;

6 is an enlarged plan view of a semiconductor chip for an image sensor tested according to another embodiment of the present disclosure;

7 is a schematic configuration diagram of a semiconductor chip test apparatus for an image sensor according to another embodiment of the present invention;

<Description of the code | symbol about the principal part of drawing>

102, 702: light source 104, 706, 718: focusing lens

106, 708, 720: probe card 106a, 708a, 720a: through hole

108, 710, 722: probe

110a-110d, 712a-712d, 724a-724d: semiconductor chip

112a-112d: Pixel Array 704: Optical Separator

714: shutter 716: reflective mirror

The above and other objects and various advantages of the present invention will become more apparent from the preferred embodiments of the present invention described below with reference to the accompanying drawings by those skilled in the art.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

A key technical aspect of the present invention is that, unlike the above-described conventional method of performing an optical test on a wafer by one semiconductor chip, an available pad (driving power supply voltage (Vcc) pad, ground voltage (Vss) is applied to each semiconductor chip on the wafer. ) When forming pads, data input / output pads, control pads, clock pads, etc.), a plurality of test pads for testing can be formed simultaneously on two or three sides of each chip, and on two or three sides of each chip. By connecting test probes to the formed pads (available pads and test pads), optical tests (i.e., DC test, AC test, image test, etc.) can be performed simultaneously in units of N or N × N multi-chips. Through this technical means, it is possible to easily achieve the object of the present invention.

Example 1

1 is a schematic configuration diagram of a semiconductor chip test apparatus for an image sensor according to an exemplary embodiment of the present disclosure, including a light source 102, a focusing lens 104, a probe card 106 having a through hole 106a, and a plurality of devices. Probe 108 (or prober).

Here, each probe 108 withdrawn from the probe card 106 has a corresponding pad in the image sensor semiconductor chip 110a, 110b to be subjected to the optical test, for example, as shown in FIG. Each of the semiconductor chips 110a and 110b is connected to pads formed on three sides except for neighboring sides. The pads formed on each of the three sides may include at least one driving power supply voltage (Vcc) pad and at least one ground voltage (Vss). And at least one control pad, at least one clock pad, and at least one test pad. In Fig. 2, reference numerals 112a and 112b denote pixel arrays formed on the semiconductor chips 110a and 110b, respectively.

That is, in this embodiment, the optical test is simultaneously performed on two semiconductor chips. As an example, as illustrated in FIG. 3, the test probes may be applied to all pads formed around four pads of the two semiconductor chips 110a and 110b. 108 are not connected to each other to perform an optical test of the two semiconductor chips 110a and 110b. Instead of connecting the test probes to the pads located on the neighboring sides between the two semiconductor chips 110a and 110b, An optical test is performed by connecting a test probe only to pads positioned at three sides of the semiconductor chips 110a and 110b.

To this end, a plurality of available pads, that is, at least one driving power supply voltage (Vcc) pad, at least one ground voltage (Vss) pad, at least one data input / output pad, at least four around each of the semiconductor chips 110a and 110b, at least One control pad, at least one clock pad, and at the same time a plurality of test pads for use in the test are formed at the same time, each available pad is connected to the lead frame, the test pads are not connected to the lead frame or as needed Can be. Here, the test pads are formed in a number suitable for testing the optical characteristics of the semiconductor chip product, and it is preferable to form the test pads at positions where shadows are not generated by probes connected to peripheral pads.

Accordingly, the semiconductor chip test apparatus for an image sensor according to the present exemplary embodiment having the above-described configuration includes forming an available pad and test pads on each semiconductor chip on a wafer, and placing the wafer on a test stage of a test equipment (not shown). When the chips are connected to each of the pads (ie, pads positioned at each of three sides of the two semiconductor chips 110a and 110b except for the neighboring sides of the two semiconductor chips), the power is turned on and generated from the light source 102. The focused light is focused through the focusing lens 104, and the focused light is pixel arrays 112a and 112b of the two semiconductor chips 110a and 110b located below through the through hole 106a in the probe card 106. Is irradiated (ie uniformly and symmetrically in the center of the two chips). In this case, the focused light is positioned at the center of the two semiconductor chips 110a and 110b so that the light irradiation of the two chips is uniform and symmetrical.

As a result, the photoelectrically converted signals through each pixel are output to the outside through the respective pads and transmitted to the control and analyzer (not shown), so that optical characteristics of the two semiconductor chips 110a and 110b are simultaneously performed. The analysis determines whether the optical characteristics of the two semiconductor chips 110a and 110b are good or bad.

Here, the detailed description thereof is omitted since it is a conventional technique well known in the art, but in brief, optical characterization means analyzing the DC test, the AC test, the image test, and the like. In the DC test, open-short test, operating current and standby current test are performed, and in the AC test, functional tests for various design driving are performed.In the image test, dark, normal, saturation light In the irradiation environment, all the pixels and defects are tested for all the pixels in the irradiation environment. Thus, according to the present embodiment, an optical test is performed on a wafer as one semiconductor chip as in the conventional method described above. Rather, form as many test pads as necessary around each of the four semiconductor chips, and the neighboring sides of the two semiconductor chips. Since the test probes are connected to the pads (available pads and test pads) located on the other three sides, and the optical test is performed simultaneously on the two semiconductor chips, the time required to perform the optical test of the semiconductor chip for the image sensor is reduced. In addition to increasing the productivity of the semiconductor chip for image sensor, the manufacturing cost can be effectively reduced.

Meanwhile, in the present exemplary embodiment, the optical test is performed simultaneously on two semiconductor chips for image sensors that are adjacent to each other in the left and right directions, but the present invention is not necessarily limited thereto. The optical test can be performed simultaneously on two semiconductor chips for an image sensor. Even in this case, substantially the same result can be obtained.

Example 2

4 is a schematic configuration diagram of a semiconductor chip test apparatus for an image sensor according to another exemplary embodiment, and FIG. 5 is a plan view seen from a probe card when testing a semiconductor chip for an image sensor according to another exemplary embodiment. 6 is an enlarged plan view of a semiconductor chip for an image sensor tested in accordance with another embodiment of the present invention.

4 to 6, the semiconductor chip test apparatus for an image sensor according to the present embodiment differs from the above-described conventional method of performing an optical test by a single semiconductor chip on a wafer, as required for each semiconductor chip. It is almost similar to that in Example 1 described above in terms of forming optical test pads together with available pads and then performing optical tests in units of N (ie, four) semiconductor chips, but not four but four. The difference is that optical tests (ie, DC test, AC test, image test, etc.) are performed on each of the semiconductor chips. Therefore, the same constituent members are denoted by the same reference numerals as the constituent members of the above-described first embodiment for better understanding.

That is, as shown in FIG. 5 and FIG. 6, in the present exemplary embodiment, two neighboring sides of four neighboring semiconductor chips 110a, 110b, 110c, and 110d except for two neighboring sides of each other (that is, not adjacent to each other). The test probes 108 are connected to the pads positioned at the two sides, respectively, to perform optical tests on the four semiconductor sensor chips 110a, 110b, 110c, and 110d at the same time. At this time, the focused light irradiated from the focusing lens 104 is located at the center portion of the four semiconductor chips 110a, 110b, 110c, and 110d, and the light is focused on the four semiconductor chips 110a, 110b, 110c, and 110d. To ensure uniform and symmetrical irradiation.

Of course, also in this embodiment, as in the first embodiment described above, a plurality of available pads, that is, at least one driving power supply voltage (Vcc) pad, at least one ground voltage (Vss) on two non-neighboring sides of each semiconductor chip ) Pad, at least one data input / output pad, at least one control pad, at least one clock pad, and one or more test pads. Here, each of the available pads is connected to the lead frame, and the test pads are not connected to the lead frame or may be connected as necessary.

Therefore, according to the present embodiment, unlike the first embodiment described above, in which the optical test is performed simultaneously on two neighboring semiconductor chips, the first embodiment is performed because the optical test is simultaneously performed on four neighboring semiconductor chips. Compared to the above, a more enhanced effect can be obtained. That is, in this embodiment, compared with the above-described embodiment 1, the time required for the optical test of the semiconductor chip for image sensor can be further reduced, and the productivity of the image sensor semiconductor chip can be further increased and the manufacturing cost can be further reduced. can do.

Meanwhile, in the present exemplary embodiment, four semiconductor chips having neighboring 2 × 2 shapes are simultaneously optically tested in one test process, but the present invention is not limited thereto. Of course, it can be designed to perform an optical test on the semiconductor chip of the three types or 3 × 2) at the same time. In this case, the four semiconductor chips at the corners of 2x3 or 3x2 are the sides that are not tested in the two neighboring sides, and the two semiconductor chips in the middle part are the sides tested in the side unless they are adjacent.

Example 3

FIG. 7 is a schematic configuration diagram of a semiconductor chip test apparatus for an image sensor according to another exemplary embodiment. The semiconductor chip test apparatus for an image sensor according to the present embodiment may include a light source 702, an optical separator 704, and a shutter. 714, a reflection mirror 716, a first irradiation system A, and a second irradiation system B.

Referring to FIG. 7, light generated from the light source 702 is transmitted to the light separator 704, which transmits, for example, approximately 50% of the light and reflects the remaining 50% of the light. Here, the reflected light is transmitted to the first irradiation system A, and the transmitted light is transmitted to the reflective mirror 716 through the opening of the shutter 714 and then reflected at an approximately 90 degree angle to the second irradiation. Delivered to system (B).

Here, the shutter 714 is opened and closed in response to the opening and closing control signal provided from the controller of the test apparatus (not shown), and when the first and second irradiation systems A and B are to be used in the optical test process. If you want to stay open and use only the first irradiation system A in the optical test process (i.e. if you want to test 8 semiconductor chips simultaneously in one process) If you want to test the chip simultaneously, keep it closed. In this case, using only the first irradiation system A may be necessary at the last right part, for example, assuming that the optical test process is sequentially performed from the left side to the right side of the wafer.

Next, the first and second irradiation lines A and B have a structure substantially the same as those of the constituent members shown in the above-described second embodiment.

That is, the first irradiation system A includes a first focusing lens 706, a first probe card 708 having a through hole 708a and a plurality of probes 710 (or probers), and a second The irradiation system B includes a second focusing lens 718, a second probe card 720 having a through hole 720a, and a plurality of probes 722 (or probers). Therefore, in order to avoid unnecessary duplication description and simplify description, the detailed description here is abbreviate | omitted.

Therefore, in the present embodiment, the light generated from one light source 702 is separated into two lights through the light splitter 704, and each of N pieces (for example, four pieces of light) is used using the separated light. Optical test of the semiconductor chip, i.e., the light reflected from the optical separator 704 passes through the optical path through the through hole 708a of the first focusing lens 706 and the first probe card 708. The light irradiated by the four semiconductor chips 712a-712d and transmitted through the light separator 704 passes through the opening of the shutter 714, the reflection mirror 716, the second focusing lens 718, and the second probe card 720. By irradiating the four semiconductor chips 724a-724d through the optical path through the through hole 720a of), optical tests on a total of eight semiconductor chips 712a-712d, 724a-724d are simultaneously performed.

Therefore, according to the present exemplary embodiment, unlike the above-described Embodiments 1 and 2, which simultaneously perform optical tests on two or four neighboring semiconductor chips, optical tests are performed on eight neighboring semiconductor chips simultaneously. Compared with Examples 1 and 2 described above, a more enhanced effect can be obtained. That is, in this embodiment, compared to the above-described embodiments 1 and 2, the time required for the optical test (that is, DC test, AC test, image test, etc.) of the semiconductor chip for image sensor can be further significantly reduced. As a result, the productivity of the semiconductor chip for image sensor can be increased and the manufacturing cost can be further reduced.

Meanwhile, in the present embodiment, the light from the light source is separated into two, and using the separated light, two sets of semiconductor chips, each of four units, are described by simultaneously performing an optical test in one test process. However, the present invention is not necessarily limited thereto, and the number of sets may be set to one, two, or six, and the optical test of N sets of semiconductor chips is performed simultaneously in one test process by separating the light into N sequentially. In this case, the time required for the optical test of the semiconductor chip for the image sensor may be further shortened.

As described above, according to the present invention, in contrast to the above-described conventional method of performing an optical test on a wafer in units of one semiconductor chip, an available pad (driving power supply voltage (Vcc) pad, ground voltage) is applied to each semiconductor chip on the wafer. (Vss) pads, data input / output pads, control pads, clock pads, etc.) to form a plurality of test pads for use in a test on two or three sides of each chip simultaneously, and two or three sides of each chip. By connecting the test probes to the pads (available pads and test pads) formed in the circuit board, the optical test is performed simultaneously in units of N or N × N semiconductor chips, thereby performing the optical test of the semiconductor chip for the image sensor. This can save time, increase productivity of semiconductor chips for image sensors, and reduce manufacturing costs. There.

Claims (12)

A method of performing an optical test of a semiconductor chip for an image sensor on a wafer using light from a light source, the method comprising: Forming a plurality of available pads and test pads on predetermined portions of three sides of each semiconductor chip on the wafer; Mounting the wafer on an optical test equipment, and connecting a test probe to the plurality of available pads and test pads positioned at three sides which are not adjacent to each other in two adjacent semiconductor chips; And And conducting an optical test simultaneously by irradiating the light provided from the light source to two adjacent semiconductor chips. The pad of claim 1, wherein the available pad includes at least one driving power supply voltage (Vcc) pad, at least one ground voltage (Vss) pad, at least one data input / output pad, at least one control pad, and at least one clock pad. Semiconductor chip test method for an image sensor comprising a. A method of performing an optical test of a semiconductor chip for an image sensor on a wafer using light from a light source, the method comprising: Forming a plurality of available pads and test pads on predetermined portions of two sides of each semiconductor chip on the wafer; After mounting the wafer on the optical test equipment, a process of connecting a test probe to the plurality of available pads and test pads located in two adjacent sides of each other in four adjacent semiconductor chips in a 2 × 2 form ; And And conducting an optical test at the same time by irradiating four adjacent semiconductor chips with light provided from the light source. The pad of claim 3, wherein the available pad includes at least one driving power supply voltage (Vcc) pad, at least one ground voltage (Vss) pad, at least one data input / output pad, at least one control pad, and at least one clock pad. Semiconductor chip test method for an image sensor comprising a. A method of performing an optical test of a semiconductor chip for an image sensor on a wafer using light from a light source, the method comprising: Forming a plurality of available pads and test pads on a predetermined portion of one or two sides of each semiconductor chip on the wafer; After placing the wafer on the optical test equipment, the plurality of available pads and test pads located on one side or two sides of each of the six semiconductor chips adjacent in the form of 2 × 3 or 3 × 2 are not adjacent to each other. Connecting a test probe; And And irradiating light provided from the light source to the six adjacent semiconductor chips to simultaneously perform an optical test. The method of claim 5, wherein the available pad includes at least one driving power supply voltage (Vcc) pad, at least one ground voltage (Vss) pad, at least one data input / output pad, at least one control pad, and at least one clock pad. Semiconductor chip test method for an image sensor comprising a. An apparatus for performing an optical test of a semiconductor chip for an image sensor on a wafer using light from a light source, Light separation means for transmitting a portion of the light provided from the light source and reflecting the remaining portion; A second irradiation system for performing an optical test by focusing the transmitted light onto a lens and irradiating a chip group including at least one semiconductor chip having a soluble pad and a test pad simultaneously formed on at least one side thereof; A reflection mirror reflecting the transmitted light at a predetermined angle; And A second irradiation system configured to perform an optical test by focusing the reflected light onto another lens and irradiating another chip group including at least one semiconductor chip having a soluble pad and a test pad formed on at least one side thereof simultaneously. Semiconductor chip testing device. 8. The semiconductor chip test apparatus according to claim 7, wherein the test apparatus further comprises a shutter connected to a rear end of the optical separation means to open and close the propagation of the transmitted light. The semiconductor chip test apparatus according to claim 7 or 8, wherein the chip group and the other chip group are two semiconductor chips neighboring each other. The semiconductor chip test apparatus according to claim 7 or 8, wherein the chip group and the other chip group are four semiconductor chips neighboring each other in a 2x2 form. The semiconductor chip test apparatus according to claim 7 or 8, wherein the chip group and the other chip group are six semiconductor chips neighboring each other in the form of 2x3 or 3x2. 10. The method of claim 7 or 8, wherein the available pad includes at least one driving power supply voltage (Vcc) pad, at least one ground voltage (Vss) pad, at least one data input / output pad, at least one control pad, and at least Semiconductor chip test apparatus for an image sensor comprising a clock pad.