KR100397432B1 - Self-Scan Plasma Display Panel and Driving Method thereof - Google Patents

Abstract

The present invention relates to a self-scanning plasma display panel which minimizes the number of driving circuits and enables high speed driving.

The self-scanning plasma display panel of the present invention includes a display area for displaying an image by arranging data electrodes and scan / sustain electrodes at right angles; A dielectric layer and a passivation layer sequentially stacked to cover the scan / sustain electrodes formed on the display area; A scan / sustain electrode is formed and includes a scan area for causing a scan discharge to sequentially select the scan / sustain electrode.

Description

Self-Scan Plasma Display Panel and Driving Method

The present invention relates to a self-scanning plasma display panel and a driving method thereof, and more particularly, to a self-scanning plasma display panel and a driving method thereof capable of minimizing the number of driving circuits and enabling high-speed driving.

Recently, a plasma display panel (hereinafter referred to as "PDP"), which is easy to manufacture a large panel, has attracted attention as a flat panel display device. As a PDP, a three-electrode AC surface discharge type PDP having three electrodes and driven by an alternating voltage is typical.

Referring to FIG. 1, a discharge cell of a three-electrode alternating surface discharge type PDP is formed on a scan / sustain electrode 12Y and a common sustain electrode 12Z formed on an upper substrate 10, and a lower substrate 18. An address electrode 20X is provided.

The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the scan / sustain electrode 12Y and the common sustain electrode 12Z side by side. Wall charges generated during plasma discharge are accumulated in the upper dielectric layer 14.

The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge, and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used.

The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode 20X is formed in the direction crossing the scan / sustain electrode 12Y and the common sustain electrode 12Z.

The partition wall 24 is formed in parallel with the address electrode 20X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper and lower plates and the partition wall.

These discharge cells are arranged in a matrix form as shown in FIG. In FIG. 2, the discharge cells 1 are provided at the intersections of the scan / sustain electrode lines Y1 to Ym, the common sustain electrode lines Z1 to Zm, and the address electrode lines X1 to Xn. The scan / sustain electrode lines Y1 to Ym are sequentially driven, and the common sustain electrode lines Z1 to Zm are commonly driven. The address electrode lines X1 to Xn are driven by being divided into odd-numbered lines and even-numbered lines.

The three-electrode AC surface discharge type PDP is driven by being divided into a plurality of subfields, and gray scale display is performed by emitting light a number of times proportional to the weight of video data in each subfield period.

For example, when an image is displayed in 256 gray scales using 8-bit video data, one frame display period (for example, 1/60 second = about 16.7 msec) in each discharge cell 1 is shown in FIG. As shown, the data is divided into eight subfields SF1 to SF8.

Each subfield SF1 to SF8 is further divided into a reset period, an address period and a sustain period, and 1: 2: 4: 8:... The weight is given at the ratio of 128. Here, the reset period is a period for initializing the discharge cells, the address period is a period for causing selective address discharge according to the logic value of the video data, and the sustain period is such that discharge is maintained in the discharge cells in which the address discharge has occurred. It is a period. The reset period and the address period are equally assigned to each subfield period.

4 is a view showing a waveform diagram according to a conventional method for driving a PDP.

Referring to FIG. 4, first, all discharge cells are initialized by causing discharge to occur in all discharge cells in a reset period (not shown).

Following the reset period, in the address period, the scan pulse SP is sequentially supplied to the scan / sustain electrode lines Y1 to Ym, and the data pulse DP synchronized with the scan pulse SP is applied to the address electrode lines. Supplying to (X1 to Xn) causes selective address discharge to occur.

Subsequently, in the sustain period, the discharge cells in which the address discharge is generated by alternately supplying sustain pulses SUSPy and SUSPz to the scan / sustain electrode lines Y1 to Ym and the common sustain electrode lines Z1 to Zm. At the sustain discharge is maintained for a predetermined period of time.

However, in the conventional three-electrode AC surface discharge type PDP, since the scanning pulse SP is sequentially supplied, high voltage switching elements are provided for each of the scan / sustain electrode lines Y1 to Ym. Such high voltage switching elements consume a lot of power and require a large installation cost.

On the other hand, PDP utilizing the characteristics of gas discharge in addition to the conventional surface discharge PDP has been studied.

5 and 6, the PDP utilizing the characteristics of the conventional gas discharge includes first and second electrodes A and B formed on the upper substrate 32 and first and second electrodes on the lower substrate 34. Third and fourth electrodes C and D formed in a direction crossing the second electrodes A and B are provided. Discharge cells 30 and 36 are positioned at the intersections of the first to fourth electrodes A to D. FIG.

The first to fourth electrodes A to D are formed by electrically connecting three sub-electrodes formed in the plasma display panel. In other words, when the driving voltage is supplied to the A1 electrode of the first electrode A, the driving voltage is supplied to the three sub-electrodes electrically connected to the A1 electrode. As such, when the first to fourth electrodes A to D are connected to three sub-electrodes, the number of switching elements installed for each electrode may be minimized, that is, the number of driving circuits may be reduced.

Only the discharge cells to which the driving voltage is supplied to all of the first to fourth electrodes A to D are selected in the address period. For example, when voltage is supplied to the A1 electrode, the D1 electrode, the C1 electrode, and the B3 electrode, the first discharge cell 36 is selected. That is, only the first discharge cell 36 receives the driving voltage from the four electrodes A, B, C, and D. In this way, the discharge cells to be turned off are selected. In other words, the PDP has a logic function of discharge cells having four input AND gates. That is, the discharge cells to be turned off are selected only when voltage is applied to all four electrodes.

However, in the PDP utilizing the characteristics of the conventional gas discharge, since the logic function of the AND gate is performed in the display area of the panel, the electrode structure must be complicated and the electrodes must have low impedance.

7 is a diagram illustrating a plasma display panel according to another exemplary embodiment.

Referring to FIG. 7, a PDP according to another exemplary embodiment includes first and second electrodes A and B formed on an upper substrate 40 and a third electrode formed on a lower substrate 42. C).

An upper dielectric layer 50 and a passivation layer 48 are stacked on the upper substrate 40 on which the first electrode A and the second electrode B are arranged side by side.

The partition wall 44 is formed on the lower substrate 42 on which the third electrode C is formed, and the phosphor 46 is coated on the surfaces of the lower substrate 42 and the partition wall 44. The third electrode C is formed in the direction crossing the first and second electrodes A and B. Discharge cells are formed at the intersections of the first electrode A, the second electrode B, and the third electrode C. FIG.

The partition wall 44 is formed in parallel with the third electrode C to prevent the ultraviolet rays and the visible light generated by the discharge from leaking to the adjacent discharge cells. Inert gas for gas discharge is injected into the discharge space provided between the upper substrate 40, the lower substrate 42, and the partition wall 44.

The first electrode A is formed by electrically connecting three sub electrodes sequentially formed. In other words, the A1 electrode is formed by electrically connecting the first to third sub-electrodes, and the A2 electrode is formed by electrically connecting the fourth to sixth sub-electrodes. The A3 electrode is formed by electrically connecting the seventh to ninth sub-electrodes.

The second electrode B is formed by electrically connecting 1 + 3i (i is an integer of 1 or more), 2 + 3i, and 3 + 3i sub-electrodes. In other words, the B1 electrode is formed by electrically connecting 1 + 3i sub-electrodes, that is, the first sub-electrode, the fourth sub-electrode, and the seventh sub-electrode, and the B2 electrode is formed by the 2 + 3i sub-electrodes, i.e. The second sub electrode, the fifth sub electrode and the eighth sub electrode are electrically connected to each other. In addition, the B3 electrode is formed by electrically connecting 3 + 3i sub-electrodes, that is, the third sub-electrode, the sixth sub-electrode, and the ninth sub-electrode.

As such, when the first and second electrodes A and B are formed of three sub-electrodes, the number of switching elements installed for each electrode can be minimized, that is, the number of driving circuits can be reduced. In particular, such a PDP can be applied to the three-electrode alternating current surface discharge type PDP shown in FIG. 1 to drastically reduce the number of driving circuits controlling the address discharge of the three-electrode alternating current surface discharge type PDP.

8 is a view showing a waveform diagram according to a method of driving a PDP according to another exemplary embodiment of the present invention.

Referring to FIG. 8, the PDP according to another exemplary embodiment is driven by being divided into a reset period, an address period, and a sustain period.

The reset pulses R2 and R1 are supplied to the first and second electrodes A and B in the reset period. When the reset pulses R2 and R1 are supplied to the first and second electrodes A and B, reset discharges occur in all discharge cells, thereby discharging the discharge cells.

In the address period, the second scan pulse SP2 is sequentially applied to the first electrode A, and the first scan pulse is sequentially and repeatedly applied to the second electrode B so as to be synchronized with the second scan pulse SP2. SP1) is supplied. In other words, the first electrode A may be synchronized with the first scan pulse SP1 supplied to the B1 electrode, the B2 electrode, and the B3 electrodes because the three sub electrodes sequentially formed are electrically connected to each other. Three second scanning pulses SP2 are sequentially supplied. Similarly, the first scan pulse SP1 is sequentially and repeatedly supplied to the B1 to B3 electrodes so that the second electrodes B may be synchronized with the second scan pulse SP2 supplied to the first electrodes A. FIG. .

In detail, the address period is first supplied with the second and first scan pulses SP2 and SP1 to the A1 electrode and the B1 electrode. When the second and first scan pulses SP2 and SP1 are supplied to the A1 electrode and the B1 electrode, the first to third sub-electrodes of the first electrode A, the first sub-electrode of the second electrode B, and the first Scanning pulses SP1 and SP2 are supplied to the fourth sub electrode and the seventh sub electrode. At this time, only the first sub-electrode of the A1 electrode and the first sub-electrode of the B1 electrode of the sub-electrodes forming the discharge cell are simultaneously supplied with the scanning pulses SP1 and SP2.

As such, when the scan pulses SP1 and SP2 are supplied to the first sub-electrode of the A1 electrode and the first sub-electrode of the B1 electrode, the scan discharge is generated by the first sub-electrode of the A1 electrode and the first sub-electrode of the B1 electrode. do. On the other hand, in the discharge cells supplied with the scan pulse SP1 or SP2 to only one sub-electrode, a voltage lower than the discharge start voltage is applied so that scan discharge does not occur.

In the discharge cells in which the scan discharge is generated, space charge and wall charge are generated by the scan discharge. The space charge acts as a priming to lower the discharge start voltage of the discharge space. The wall charge is formed with a polarity that prevents the address discharge generated after the scan discharge. The erase pulse E is supplied to the first electrode A so that the wall charge is removed and only the space charge remains.

Thereafter, the data pulse DP is supplied to the discharge cells to be turned on to select the discharge cells to be turned on. Then, scan discharge occurs and address discharge occurs in the discharge cells supplied with the data pulse DP. Thereafter, the above process is repeated to select the discharge cells to be turned on.

In the sustain period, the sustain pulses SUSP2 and SUSP1 are alternately supplied to the first and second electrodes A and B to maintain the sustain discharge in the discharge cells in which the address discharge is generated for a predetermined period.

The PDP according to another exemplary embodiment of the present invention performs an AND logic function by adding a scan discharge that is distinguished from an address discharge to a conventional method of driving a three-electrode surface discharge type PDP.

However, in the PDP according to another conventional embodiment, a scan discharge for the AND logic function is generated in the display area. Accordingly, light generated by the scanning discharge is generated, and the light decreases the contrast of the PDP. In addition, since the driving waveform is supplied to the negative electrodes irrelevant to the address discharge, power consumption is high. In addition, when the AND logic function is used, the impedance of the electrode is increased, and thus it is difficult to obtain an accurate function due to the disparity of discharge characteristics in the case of a large display.

Accordingly, an object of the present invention is to provide a self-scanning plasma display panel and a driving method thereof which minimize the number of driving circuits and enable high-speed driving.

1 is a perspective view showing a conventional three-electrode AC surface discharge type plasma display panel.

FIG. 2 is an overall electrode layout of the plasma display panel including the discharge cells shown in FIG.

3 is a frame configuration diagram for explaining a conventional subfield driving method.

4 is a waveform diagram showing a method of driving a conventional plasma display panel.

5 and 6 illustrate a plasma display panel utilizing the characteristics of a conventional gas discharge.

7 is a perspective view showing a plasma display panel according to another conventional embodiment.

FIG. 8 is a waveform diagram illustrating a method of driving the plasma display panel shown in FIG. 7.

9 illustrates a self scanning plasma display panel according to an embodiment of the present invention.

FIG. 10 is a diagram illustrating electrodes formed on a lower substrate of the plasma display panel shown in FIG. 9; FIG.

FIG. 11 illustrates electrodes formed on an upper substrate of the plasma display panel shown in FIG. 9;

12 and 13 illustrate driving principles of the plasma display panel shown in FIG. 9;

14 is a view showing a driving process of the plasma display panel shown in FIG. 9;

FIG. 15 is a waveform diagram illustrating a method of driving the plasma display panel shown in FIG. 9;

16 illustrates a self scanning plasma display panel according to another embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

1,30,36: discharge cell 10,32,40: upper substrate

12Y: scan / sustain electrode 12Z: common sustain electrode

14,22,50 dielectric layer 16,48 protective film

18,34,44: lower substrate 20X: address electrode

24, 44, 56, 60: partition 26, 46: phosphor layer

52: Scanning Area 54: Display Area

In order to achieve the above object, the self-scanning plasma display panel of the present invention comprises a display area for displaying an image by arranging data electrodes and scan / sustain electrodes at right angles; A dielectric layer and a passivation layer sequentially stacked to cover the scan / sustain electrodes formed on the display area; A scan / sustain electrode is formed and includes a scan area for causing a scan discharge to sequentially select the scan / sustain electrode.

In the method of driving a self-scanning plasma display panel according to the present invention, a data region, a scan / sustain electrode and a common sustain electrode are orthogonally arranged to form a display area for displaying an image, a scan / sustain electrode is formed, and intersects the scan / sustain electrode. Three power supply electrodes formed in a direction to be formed, and a scanning region in which a common electrode is formed in parallel with the scan / sustain electrodes; Causing a scanning discharge in the scanning area to sequentially select the scanning / sustaining electrodes in an address period for displaying an image.

The driving method of the self-scanning plasma display panel according to the present invention is to generate a scanning discharge in an invalid display area where an image is not displayed, and to perform a scan / sustain electrode and address discharge selected by scanning discharge in an effective display area where an image is displayed. Includes steps that produce.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 9 to 16.

9 illustrates a self scanning plasma display panel according to an embodiment of the present invention.

Referring to FIG. 9, the self-scanning plasma display panel according to an embodiment of the present invention is driven by dividing the scan area 52 and the display area 54. The display area 54 is an area for displaying an image. The scanning area 52 is an area for sequentially supplying scanning pulses in the address period. The display area 54 is formed in the same structure as the conventional three-electrode AC surface discharge type PDP shown in FIG. That is, the display area 54 discharges AC. On the other hand, the scan area 52 performs direct current discharge. For this purpose, the dielectric layer and the passivation layer are not provided in the scan area 52.

In the display area 54, a scan / sustain electrode Y, a common sustain electrode Z, and a data electrode X are formed. The data electrode X is formed in a direction crossing the scan / sustain electrode and the common sustain electrodes Y and Z. In the scan area 52, a power electrode F, a start electrode S, bridge electrodes B, a common electrode E, and a scan / sustain electrode Y are formed. The power supply electrode F is formed in a direction crossing the common electrode E and the scan / sustain electrode Y. The scan / sustain electrode Y is provided in both the scan area 52 and the display area 54. Diodes D are provided between the scan / sustain electrode Y and an external scan voltage source (not shown). The diodes D are installed to allow current to flow from the panel toward the external scan voltage source to prevent current reverse flow of the scan / sustain electrode Y during scan discharge. Further, diodes not shown are also provided between the scan / sustain electrode Y and an external sustain voltage source (not shown). These diodes are installed so that current can flow from the sustain voltage source to the panel. These diodes are commonly connected and connected to a sustain voltage source.

An electrode structure of an upper substrate and a lower substrate of a self scanning plasma display panel according to an embodiment of the present invention will be described in detail with reference to FIGS. 10 and 11.

10 is a view showing in detail the electrodes formed on the lower substrate.

Referring to FIG. 10, a power electrode F, a start electrode S, a bridge electrode B, and a data electrode X are formed on a lower substrate. The power electrode F, the start electrode S, and the bridge electrode B are formed in the scan area 52, and the data electrode X is formed in the display area 54. The partition wall 56 is formed in the display area 54 in parallel with the data electrode X. The partition wall 56 prevents ultraviolet rays and visible light generated by the discharge from leaking into adjacent discharge cells. In addition, the partition wall formed at the boundary between the scan area 52 and the display area 54 serves to distinguish the scan area 52 and the display area 54.

The bridge electrodes B are formed to be adjacent to the power electrodes F1, F2 and F3 between the power electrodes F1, F2 and F3. Such bridge electrodes B are formed at a predetermined angle, and both ends 58 of the bridge electrodes B are formed parallel to the power electrodes F1, F2, and F3. When the upper and lower substrates are bonded, one end of the bridge electrodes B crosses the common electrode E, and the other end of the bridge electrodes B crosses the scan / sustain electrode Y. The bridge electrodes B are formed of a high resistance conductive material to have a current-limiting function.

The starting electrode S is installed to be adjacent to the first power electrode F1 at one end of the panel. The start electrode S is applied with a starting voltage from the outside.

11 is a view illustrating in detail the electrodes formed on the upper substrate.

Referring to FIG. 11, a common electrode E, a common sustain electrode Z, and a scan / sustain electrode Y are formed on an upper substrate. The common electrode E is formed in the scan area 52, and the common sustain electrode Z is formed in the display area 54. The scan / sustain electrode Y is formed in both the scan area 52 and the display area 54. The common electrode E is formed in parallel with the common sustain electrode Z. That is, one end of the common electrode E and the common sustain electrode Z are formed to face each other.

All common electrodes E are electrically connected to receive driving waveforms from an external common electrode driver. Similarly, all common sustain electrodes Z are also electrically connected to receive driving waveforms from an external second electrode driver. The scan / sustain electrode Y is divided into a first scan / sustain electrode Y1 and a second scan / sustain electrode Y2. 1 + i (i is an even number equal to or greater than 0) th scan / sustain electrodes Y are electrically connected to the first scan / sustain electrode Y1. 1 + j (j is an odd number greater than 0) th scan / sustain electrodes Y are electrically connected to the second scan / sustain electrode Y2.

The first and second scan / sustain electrodes Y1 and Y2 are alternately formed on the upper substrate. The common sustain electrodes Z and the common electrodes E are formed to be adjacent to the first and second scan / sustain electrodes Y1 and Y2 between the first and second scan / sustain electrodes Y1 and Y2. do. For example, the common electrode E formed adjacent to the first scan / sustain electrode Y1 is formed adjacent to the first scan / sustain electrode Y1 at a narrow interval a. In this case, the first scan / sustain electrode Y1 has a large distance b from the common electrode E formed adjacent to the second scan / sustain electrode Y2. Therefore, when the upper and lower substrates are bonded, bridge electrodes B having one end crossing the common electrode E and the other end crossing the scan / sustain electrode Y are formed asymmetrically.

12 and 13 illustrate driving principles of a self-scanning plasma display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 12, an AA electrode, a BB electrode, a CC electrode, and a DD electrode, an EE electrode, and an FF electrode provided in the display area are shown.

The second resistor R2 and the second switch SW2 are disposed between the AA electrode and the ground potential GND. A first switch SW1, a scan voltage source Vs, and a first resistor R1 are disposed between the BB electrode and the ground potential GND. The resistance value of the second resistor R2 is set higher than the resistance value of the first resistor R1. A third switch SW3 and an address voltage source Va are provided between the EE electrode and the ground potential GND. The CC electrode and the DD electrode are electrically connected.

In detail, the first switch SW1 and the second switch SW2 are turned on. When the first and second switches SW1 and SW2 are turned on, the voltage of the scan voltage source Vs is applied between the AA electrode and the BB electrode to generate a scan discharge in the discharge space. When such a scan discharge occurs, a large amount of charged particles are generated in the discharge space, and the AA and BB electrodes are short-circuited by the charged particles. In addition, the BB electrode, the AA electrode, and the CC electrode are also short-circuited.

That is, the AA electrode and the BB electrode have approximately the same voltage value, and this voltage is displayed on the CC electrode.

At this time, when the third switch SW3 is turned on, address discharge occurs in the display area. In other words, an address discharge is generated by the scan voltage source Vs applied to the DD electrode and the address voltage source Va applied to the EE electrode. When such an address discharge occurs, the scan discharge having a higher impedance than the address discharge is erased due to the voltage drop of the second resistor R2. At this time, the discharge between the BB electrode and the CC electrode is continued to constitute a path of the address discharge. Thereafter, when the address discharge is erased, the discharge between the BB electrode and the CC electrode is also erased. On the other hand, if the third switch SW3 is not turned on, the address discharge does not occur following the scan discharge.

Referring to FIG. 13, the power electrode F and the start electrode S provided in the scan area, the data electrode X provided in the display area, and the scan / sustain electrode Y provided in the scan area and the display area, respectively. ) Is shown.

The second resistor R2 and the first switch SW1 are provided between the cathode of the scan voltage source Vs and the power supply electrode F. A third switch SW3 and a first resistor R1 are disposed between the anode of the scan voltage source Vs and the start electrode S. The second switch SW2 is provided between the anode of the address voltage source Va and the data electrode X. The resistance value of the first resistor R1 is set higher than the second resistor R2.

In detail, the first switch SW1 and the third switch SW3 are turned on. When the first and third switches SW1 and SW3 are turned on, the voltage of the scan voltage source Vs is applied between the start electrode S and the power supply electrode F to start discharging. As such, when a discharge occurs between the start electrode S and the power electrode F, a large amount of charged particles are generated in the discharge space, and the discharge start voltage of the scan / sustain electrode Y is lowered by the charged particles. .

At this time, when the second switch SW2 is turned on, discharge occurs between the power supply electrode F and the scan / sustain electrode Y. The power supply electrode F, the scan / sustain electrode Y, and the scan / sustain electrode Y and the data electrode X can be viewed as a series connection circuit of two capacitors. When the two capacitors are discharged between the power supply electrode F and the scan / sustain electrode Y, the two capacitors lose their function and their resistance is low. That is, when a discharge occurs between the power supply electrode F and the scan / sustain electrode Y, the voltages of the scan voltage source Vs and the address voltage source Va are between the data electrode X and the scan / sustain electrode Y. Is applied to. When the voltages of the scan voltage source Vs and the address voltage source Va are applied to the data electrode X and the scan / sustain electrode Y, an address discharge occurs.

When such an address discharge occurs, currents from the scan voltage source Va and the address voltage source Va flow to the data electrode X, the scan / sustain electrode Y, and the power source electrode F. No current flows through the starting electrode S by the first resistor R1 having a high resistance value. Therefore, the discharge between the start electrode S and the power supply electrode F is stopped.

On the other hand, since the address discharge is an AC discharge caused by an AC voltage, wall charges are accumulated, and the accumulated electric charges in the address discharge space are neutralized to stop the address discharge. At the same time, the scanning discharge between the power supply electrode F and the scan / sustain electrode Y is also stopped.

14 and 15 illustrate a discharging process and a driving method of a self-scanning plasma display panel according to an exemplary embodiment of the present invention.

14 and 15, a positive voltage is first applied to the start electrode S. Referring to FIG. When the positive voltage is applied to the start electrode S, the discharge is started between the first power supply electrode F1 and the start electrode S to which the negative voltage is applied. To this end, a first pulse (repeating the negative polarity and the ground potential) having a predetermined period is applied to the first power electrode F1.

When the discharge is started between the first power electrode F1 and the start electrode S, charged particles are generated, and the first particles are started between the first power electrode F1 and the common electrode E by the charged particles. To this end, a second pulse (repetitive of positive polarity and ground potential) having the same phase as that of the first pulse and having the opposite phase is applied to the common electrode E. As a result of the first discharge, a voltage similar to that of the first power source electrode F1 appears on the first bridge electrode B1.

When a predetermined voltage is applied to the first bridge electrode B1, the discharge is started between the second power electrode F2 and the first bridge electrode B1. To this end, a third pulse (repeating positive and negative polarities) is applied to the second power supply electrode F2 which has a period twice as long as the first pulse and is delayed by a predetermined time from the start time of the first pulse. That is, the high logic section of the third pulse overlaps the high logic section of the first pulse and the low logic section located before and after the first pulse.

When the discharge is started between the second power source electrode F2 and the first bridge electrode B1, charged particles are generated, and the charged particles cause the gap between the second power source electrode F2 and the first scan / sustain electrode Y1 electrode. Second discharge occurs. To this end, a fourth pulse (repetitive of negative polarity and ground potential) having the same period as that of the third pulse and having a reverse phase is applied to the first scan / sustain electrode Y1 electrode. At this time, the voltage value of the fourth pulse is set lower than the third pulse.

Meanwhile, a voltage is applied to the second bridge electrode B2 by the second discharge between the second power supply electrode F2 and the first scan / sustain electrode Y1 electrode. When a predetermined voltage is applied to the second bridge electrode B2, the discharge is started between the second bridge electrode B2 and the first power electrode F1. When discharge is started between the second bridge electrode B2 and the first power electrode F1, charged particles are generated, and the third particle is started between the first power electrode F1 and the common electrode E by the charged particles. do.

A predetermined voltage is applied to the third bridge electrode B3 by the third discharge. When a predetermined voltage is applied to the third bridge electrode B3, the discharge is started between the third bridge electrode B3 and the third power source electrode F3. To this end, a fifth pulse (repeating negative polarity and positive polarity) having the same period as that of the third pulse and having a reverse phase is applied to the third power electrode F3.

When discharge is started between the third power electrode F3 and the third bridge electrode B3, charged particles are generated, and the charged particles cause the third power electrode F3 and the second scan / sustain electrode Y2 electrode to be discharged. The fourth discharge occurs. To this end, a sixth pulse (repeating base potential and negative polarity) having the same period as that of the fourth pulse and having an opposite phase is applied to the second scan / sustain electrode Y2 electrode.

On the other hand, when the third discharge occurs, a base voltage is applied to the first scan / sustain electrode Y1 electrode, and a negative voltage is supplied to the second power source electrode F2 to erase the second discharge. When the fourth discharge occurs, the data pulse DP is applied to the data electrode X. When the data pulse DP is applied to the data electrode X, the discharge is started between the first scan / sustain electrode Y1 electrode and the second power electrode F2 by the space charge generated by the second discharge. An address discharge occurs between the first scan / sustain electrode Y1 electrode and the address electrode.

On the other hand, since the space charge disappears after a predetermined time, no discharge is caused between the first scan / sustain electrode Y1 electrode and the second power supply electrode F2 when the next data pulse DP is applied. Thereafter, this process is repeated to perform address discharge.

16 is a diagram illustrating a self scanning plasma display panel according to another embodiment of the present invention.

Referring to FIG. 16, a self-scanning plasma display panel according to another embodiment of the present invention includes a scan area 52 and a display area 54. A partition wall 60 is formed between the scan area 52 and the display area 54. The partition wall 60 has a wider width than the partition wall 56 formed in the display area 54.

In the scan area 52, the common electrodes E and the first and second scan / sustain electrodes Y1 and Y2 are formed side by side. In the display area 54, first and second scan / sustain electrodes Y1 and Y2 and common sustain electrodes Z are formed side by side.

In another embodiment of the present invention, the common electrodes E and the common sustain electrodes Z are not disposed to face each other. That is, the common electrodes E are formed at equal intervals between the first and second scan / sustain electrodes Y1 and Y2.

For example, the first scan / sustain electrode Y1 and the common electrodes E formed on both sides of the first scan / sustain electrode Y1 are formed at the same interval (c = d). Therefore, bridge electrodes B having one end crossing the common electrode E and the other end crossing the scan / sustain electrode Y are formed symmetrically. The rest of the operation and configuration is the same as the embodiment of the present invention shown in FIG.

As described above, according to the self-scanning plasma display panel and the driving method thereof according to the present invention, the number of driving circuits for applying the scanning pulse can be drastically reduced and power consumption can be minimized. In addition, by driving the plasma display panel into a scanning area and a display area, the contrast of the scanning area is prevented from being lowered and the high impedance of the scanning area does not affect the display area. Therefore, the conventional power recovery and power control method can be applied without any limitation. In addition, since the scan discharge in the scan space proceeds separately from the address discharge, the address time can be reduced.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (41)

A display area for displaying an image by arranging the data electrodes and the scan / sustain electrodes at right angles; A dielectric layer and a passivation layer sequentially stacked to cover the scan / sustain electrode formed on the display area; And a scan area in which the scan / sustain electrode is formed and which causes a scan discharge to sequentially select the scan / sustain electrode. The method of claim 1, And a common sustain electrode formed in the display area to be parallel to the scan / sustain electrode. The method of claim 2, And at least one power supply electrode formed in the scan area in a direction crossing the scan / sustain electrode. The method of claim 3, wherein And three power electrodes in the scan area. The method of claim 4, wherein And a common electrode formed in the scan area in parallel with the common sustain electrode. The method of claim 4, wherein And a common electrode formed in the scan area and formed parallel to the scan / sustain electrodes between the scan / sustain electrodes. The method of claim 6, And the common electrode is formed at the same interval as the scan / sustain electrodes formed on both sides thereof. The method according to claim 5 or 6, And at least two bridge electrodes formed between the power supply electrodes. The method of claim 8, Both ends of the bridge electrodes are formed in parallel with the power electrodes. The method of claim 8, And one end of the bridge electrodes intersects the common electrode, and the other end of the bridge electrodes crosses the scan / sustain electrode. The method of claim 8, And the bridge electrodes are formed of a high resistance conductive material. The method of claim 4, wherein And a start electrode formed at one end of the scan area so as to be adjacent to the power electrode formed at the center of the three power electrodes. The method of claim 11, The power supply electrode, the bridge electrode, the start electrode and the data electrode are formed on the lower substrate of the plasma display panel. The method of claim 2, The common sustain electrode, the scan / sustain electrode, and the common electrode are formed on an upper substrate of the plasma display panel. The method of claim 1, 1 + i (i is an even number greater than 0) th scan / sustain electrodes are commonly connected, and 1 + j (j is an odd number greater than 0) th scan / sustain electrodes are commonly connected. Magnetic scanning plasma display panel. The method of claim 1, A scan driver for supplying a drive voltage to the scan / sustain electrode in an address period for selecting a discharge cell; And a sustain driver for supplying sustain pulses to the scan / sustain electrodes in a sustain period for emitting selected discharge cells in the address period. The method of claim 16, And a diode disposed between the scan driver and the scan / sustain electrode to correspond to the scan / sustain electrode so that current can flow from the scan / sustain electrode to the scan driver. . The method of claim 16, And a diode disposed between the sustain driver and the scan / sustain electrode so as to correspond to the scan / sustain electrode so that current can flow from the sustain driver to the scan / sustain electrode. . The method according to claim 5 or 6, And all of the common electrodes are electrically connected to each other, and having a common driver for driving the common electrode. The method of claim 12, A start driver for driving the start electrode; And a power supply driver for driving the power electrodes. The method of claim 2, A data driver for driving the data electrode; And a common sustain driver for driving the common sustain electrode. delete The method of claim 1, And a plurality of first barrier ribs formed in parallel with the data electrodes. The method of claim 23, And a second partition wall formed vertically between the display area and the scan area to distinguish the display area from the scan area. The method of claim 24, And the second partition wall is formed to be wider than the second partition wall. A display area for displaying an image by arranging a data electrode, a scan / sustain electrode and a common sustain electrode at right angles, three power electrodes formed with the scan / sustain electrode formed in a direction crossing the scan / sustain electrode; And a scan area in which a common electrode is formed in parallel with the scan / sustain electrode; And causing a scan discharge in the scan area to sequentially select the scan / sustain electrodes in an address period for displaying an image. The method of claim 26, And applying a data pulse to the data electrode when the scan / sustain electrode is selected by the scan discharge. The method of claim 26, A start electrode formed at one end of the scan area to be adjacent to a power electrode formed at a center of the three power electrodes; Applying a positive voltage to the start electrode; And applying a first pulse having a predetermined period to the first power electrode formed at the center of the three power electrodes. The method of claim 28, And the first pulse repeats the negative polarity and the ground potential. The method of claim 28, Applying a second pulse having a period twice that of the first pulse to a second power electrode positioned between the first power electrode and the display area; And applying a third pulse having the same period as that of the second pulse and having a phase opposite to the third power electrode among the three power electrodes. The method of claim 30, And a high logic section and a low logic section of the third pulse overlapping a high logic section of the first pulse and a low logic section located before and after the high logic section. The method of claim 30, And the first and second pulses repeat a negative polarity and a positive polarity. The method of claim 28, And applying a fourth pulse having the same period as that of the first pulse and having a reverse phase to the common electrode. The method of claim 33, wherein And the fourth pulse repeats the positive polarity and the ground potential. The method of claim 30, Applying a fifth pulse having the same period as that of the third pulse and having a reversed phase to the 1 + i (i is an even number greater than 0) th of the scan / sustain electrodes; And a sixth pulse having the same period as that of the fifth pulse and having a phase opposite to that of the first scan / sustain electrodes of the scan / sustain electrodes, wherein j is an odd number greater than zero. A method of driving a self scanning plasma display panel. 36. The method of claim 35 wherein And the fifth and sixth pulses repeat the base potential and the negative polarity. 36. The method of claim 35 wherein And the fifth and sixth pulses have a lower voltage value than the third pulse. The method of claim 26, It has a bridge electrode formed between the plurality of power electrodes, And sequentially applying voltage to the bridge electrodes by discharge between the common electrode and the power electrode, and discharge between the scan / sustain electrode and the common electrode. Causing a scanning discharge in an invalid display area where an image is not displayed; And causing an address discharge and a scan / sustain electrode selected by the scan discharge in an effective display portion region where the image is displayed. The method of claim 39, And generating sustain discharge in the discharge cells selected by the address discharge. The method of claim 40, And generating a reset discharge to initialize the discharge cells.