KR100493436B1 - Driving Method of Plasma Display Panel - Google Patents

Abstract

The present invention relates to a plasma display panel capable of maintaining white balance.

In the plasma display panel according to the present invention, a plurality of sustain electrode pairs alternately formed side by side on an upper substrate and a plurality of intersections of a plurality of address electrodes formed to be orthogonal to the sustain electrode pairs on a lower substrate are red and green. And a plasma display panel in which discharge cells for emitting blue light are arranged in a matrix form, each of the pairs of sustain electrodes having a relatively wide width and having a high light transmittance and a transparent conductive material having a predetermined width in an edge region of each of the discharge cells. A transparent electrode patterned by the width and a metal bus electrode having a relatively narrow width than the transparent electrode and compensating for the resistive component of the transparent electrode; Address electrodes are characterized in that the electrode width is different for each of the red, green and blue discharge cells.

Description

Driving method of plasma display panel {Driving Method of Plasma Display Panel}

The present invention relates to a plasma display panel, and more particularly, to a plasma display panel capable of maintaining white balance.

Recently, a plasma display panel (hereinafter referred to as "PDP"), which is easy to manufacture a large panel, has attracted attention as a flat panel display device. The PDP normally displays an image by adjusting the discharge period of each pixel according to the digital video data. As such a PDP, an AC type PDP having three electrodes and driven by an AC voltage is typical.

1 is a perspective view illustrating a cell structure typically arranged in an alternating current PDP in a matrix form, and FIG. 2 is a cross-sectional view of the PDP shown in FIG. 1. Here, the lower plate of the PDP shown in FIG. 2 shows a sectional view rotated by 90 degrees.

1 and 2, a PDP cell includes an upper plate having sustain electrode pairs 14 and 16, an upper dielectric layer 18, and a passivation layer 20 sequentially formed on an upper substrate 10, and a lower substrate 12. ), A lower plate having an address electrode 22, a lower dielectric layer 24, a partition wall 26, and a phosphor layer 28 formed sequentially.

Each of the sustain electrode pairs 14 and 16 has a relatively wide width and a transparent electrode 14A and 16A made of a transparent electrode material (ITO) having a light transmittance of 90% or more, and a metal electrode 14B having a relatively narrow width. , 16B). Here, the transparent electrode material (ITO) has a large resistance value and thus does not transmit power efficiently. Therefore, the resistive components of the transparent electrodes 14A and 16A are formed on the transparent electrodes 14A and 16A by forming metals 14B and 16B having a good conductivity, for example, silver (Ag) or copper (Cu). To compensate. The sustain electrode pairs 14 and 16 are composed of a scan electrode and a sustain electrode. The scan signal for the panel scan and the sustain signal for maintaining the discharge are mainly supplied to the scan electrode 14, and the sustain signal is mainly supplied to the sustain electrode 16. Charges accumulate in the upper dielectric layer 18 and the lower dielectric layer 24. The protective film 20 prevents damage to the upper dielectric layer 18 by sputtering, thereby increasing the lifetime of the PDP and increasing the emission efficiency of secondary electrons. As the protective film 20, magnesium oxide (MgO) is usually used. The address electrode 22 is formed to cross the sustain electrode pairs 14 and 16. The address electrode 22 is supplied with a data signal for selecting cells to be displayed. The partition wall 26 is formed in parallel with the address electrode 22 to prevent ultraviolet rays generated by the discharge from leaking to adjacent cells. The phosphor layer 28 is applied to the surfaces of the lower dielectric layer 24 and the partition wall 26 to generate visible light of any one of red, green, and blue. Then, an inert gas for gas discharge is injected into the discharge space therein.

The PDP cell is selected by the counter discharge between the address electrode 22 and the scan electrode 14, and then sustains the discharge by the surface discharge between the sustain electrode pairs 14 and 16. In the PDP cell, the fluorescent substance 28 emits light by ultraviolet rays generated during sustain discharge, so that visible light is emitted outside the cell. As a result, the PDP having cells displays an image. In this case, the PDP implements a gray scale required for displaying an image by adjusting the discharge sustain period of the cell, that is, the number of sustain discharges, according to the video data.

The AC surface discharge type PDP is driven by being divided into a plurality of subfields in order to express gray scale of an image, and in each subfield period, gradation display is performed by performing light emission in proportion to the weight of video data. do. For example, as shown in FIG. 3, when an image is displayed in 256 gray scales using 8-bit video data, one frame display period (for example, 1/60 second = about 16.7 msec) in each discharge cell is It is divided into eight subfields SF1 to SF8. Each of the subfields SF1 to SF8 is further divided into a reset period, an address period and a sustain period, and 1: 2: 4: 8:... The weight is given at the ratio of 128. Here, the reset period is a period for initializing the discharge cells, the address period is a period during which selective address discharge occurs according to the logic value of the video data, and the sustain period is such that the discharge is maintained in the discharge cell in which the address discharge has occurred. It is a period. The reset period and the address period are equally allocated to each subfield period.

FIG. 3 is a driving waveform diagram for driving the PDP shown in FIG. 1 for one subfield period, wherein Y, Z, and X are respectively provided for the scan electrode 14, the sustain electrode 16, and the address electrode 22. FIG. The driving waveform supplied is shown.

In the reset period RPD, the reset pulse RP is supplied to the scan electrode 14. The reset pulse RP has a form of ramp wave in which the voltage increases when set-up and the voltage decreases when set-down. During setup, a reset discharge is generated between the scan electrode 14 and the sustain electrode 16 to form wall charges in the upper dielectric layer 18. Subsequently, unnecessary charged particles are partially erased by the decreasing voltage during set down, and the wall charge is reduced enough to help the next address discharge without causing an erroneous discharge. In order to reduce the wall charge, the positive DC voltage Vs is supplied to the sustain electrode 16 in the set down period of the reset pulse RP. The reset pulse RP is gradually supplied to the positive DC voltage Vs so that the scan electrode 14 becomes negative in relation to the sustain electrode 16 during set down. In other words, the polarity is reversed so that the wall charges generated in the setup period are reduced. In this way, the reset discharge is generated by the supply of the reset pulse RP, and the wall charges necessary for the address discharge are formed in the cells of all the screens.

In the address period APD, the scan pulse SP is supplied to the scan electrode 14 and the data pulse DP is supplied to the address electrode 22 to generate an address discharge. The wall charge formed by this address discharge is maintained for the period during which the other discharge cells are addressed.

The triggering pulse TP is supplied to the scan electrode 14 at the beginning of the sustain period SPD to start sustain discharge in the discharge cells 11 in which wall charges are sufficiently formed in the address period APD. Subsequently, sustain pulses SUSPz and SUSPy are alternately supplied to the sustain electrode 16 and the scan electrode 14 to maintain the sustain discharge during the sustain period SPD.

The erase period EPD is supplied with the erase pulse EP to the sustain electrode 16 following the sustain period SPD so that the discharge that has been sustained is stopped. In this case, the erasing pulse EP has a lamp wave shape in which the light emission size is small, and has a short pulse width of about 1 ms for erasing the discharge. The charged particles are erased by the short erase discharge by the erase pulse EP to stop the discharge.

It is no exaggeration to say that in the PDP driven in this way, the overall efficiency depends on how much the discharge efficiency and the luminous efficiency are improved. However, since the luminous efficiency is very difficult to improve the efficiency unless the phosphor is followed, it can be said that optimizing the discharge efficiency is a method that can achieve a quick effect unless the phosphor is improved at present.

The discharge efficiency is highest in the address period APD and the sustain period SPD among the driving periods of the PDP. The reset period RPD does not significantly affect the actual discharge efficiency. The discharge efficiency contribution of the address period APD and the sustain period SPD is 3: 7, respectively, and the discharge efficiency of the PDP is the highest in the sustain period SPD, so that the discharge efficiency is discharged during the sustain period SPD. It is most desirable to optimize the efficiency. However, depending on the degree of characteristics, the discharge efficiency may be maximized when considered together with the address period (APD), and the discharge efficiency may be maximized by not considering the address period (APD). Be careful about

At present, the driving waveform in the sustain period SPD generally used in the PDP is shown in FIG. Referring to FIG. 4, a reference voltage of 0V is supplied to the address electrode X during the sustain period SPD, and the first and second sustain pulses SUSPy, which alternately are applied to the scan electrode Y and the sustain electrode Z, respectively. SUSPz) is supplied to induce opposite discharge. In such a conventional PDP drive, since the opposite discharge is performed, the initial luminance is improved, but ultimately, the luminance is drastically reduced, thereby including instability that degrades reliability as a product.

Referring to FIG. 5, when the floating state or the ground potential (0V) is supplied to the address electrode X in the sustain period SPD, the discharge state in each discharge cell is illustrated. First, when the ground potential (0V) is supplied to the address electrode (X), a strong discharge occurs around the discharge cell by the address discharge and the sustain discharge. During the sustain discharge, a strong discharge occurs due to the opposite discharge between the sustain electrode pairs Y and Z, and thus has a high luminance, but as the discharge time passes, the emission luminance disappears instantly.

Next, when the address electrode X is in the floating state in the sustain period SPD, discharge occurs evenly in the entire discharge cell. In addition, it can be seen that the discharge holding time is longer than when the base potential (0V) is applied to the address electrode (X).

When the zero potential (0V) is supplied to the address electrode X during the sustain period SPD or the address electrode X is in the floating state, the discharge state of each discharge cell will be described in detail.

FIG. 6 is a diagram showing a discharge state according to the sustain pulse applied to the sustain electrode pair when the base potential (0 V) is supplied to the address electrode X in the sustain period.

Referring to FIG. 6, sustain pulses SUSPy and SUSPz are alternately applied to the scan electrode Y and the sustain electrode X while the ground potential 0V is maintained at the address electrode X. FIG.

First, as shown in FIG. 6A, when the sustain pulse SUSPy is supplied to the scan electrode Y, a sustain discharge due to surface discharge occurs between the scan electrode Y and the sustain electrode Z. FIG. In addition, since the sustain electrode Z and the address electrode X are coincident with each other, a counter discharge occurs between the scan electrode Y and the address electrode X. Due to the opposite discharge, strong sustain discharge due to the sustain pulse SUSPy applied to the scan electrode Y does not occur.

Thereafter, at the time (b) when the sustain pulse SUSPy supplied to the scan electrode Y is polled, a self-erasing discharge is generated so as to cancel the sustain discharge at (a). Through this self-erasing discharge, the wall charges formed by the sustain discharge are eliminated.

When the sustain pulse SSUSz is supplied to the sustain electrode Z again at the time point (c), a sustain discharge occurs due to surface discharge between the scan electrode Y and the sustain electrode Z. In addition, since the scan electrode Y and the address electrode X are coincident with each other, a counter discharge occurs between the sustain electrode Y and the address electrode X. Due to the opposite discharge, strong sustain discharge due to the sustain pulse SUSPy applied to the scan electrode Y does not occur.

As described above, a strong discharge is not generated in the center region of the discharge cell during the sustain discharge, and thus, does not have a strong luminance.

FIG. 7 is a diagram illustrating a discharge state according to a sustain pulse applied to a pair of sustain electrodes when the address electrode X is in a floating state during the sustain period.

Referring to FIG. 7, sustain pulses SUSPy and SUSPz are alternately applied to the scan electrode Y and the sustain electrode X. FIG. Since the address electrode X is in a floating state, the address electrode X has a predetermined data voltage DP in conjunction with the sustain voltage Vs applied to the scan electrode Y and the sustain electrode X. Due to the voltage difference between the sustain voltage Vs and the data voltage DP, each time 0 V is supplied to the address electrode X between the scan electrode Y and the sustain electrode X and the address electrode X, a weak discharge is generated. This will occur. As a result, a strong surface discharge is generated between the scan electrode Y and the sustain electrode X, and high luminance can be obtained.

However, in the PDP and the driving method having the configuration as described above, since the electrode ITO itself passes through the phosphor region, the phosphor attached to the partition wall has to be exposed to the discharge region. Since the same, it can cause an ion collision due to charging has a problem of sharply falling luminous efficiency.

The driving method as shown in FIG. 8 has been proposed to increase the luminance and the discharge efficiency, which are the above problems.

Referring to FIG. 8, another conventional PDP driving method is characterized in that the data pulse DP is supplied to the address electrode X in the sustain period. In detail, the data electrode DP is supplied to the address electrode X so as to be positioned at the rising time of the sustain pulses SUSPy and SUSPz supplied to the scan electrode Y and the sustain electrode Z. FIG. This is to supply a predetermined voltage to the address electrode (X) in advance and to maximize the surface discharge during discharge due to the application of the sustain pulses (SUSPy, SUSPz). In addition, as the width of the data pulse DP applied in the sustain period decreases, the luminance increases up to a predetermined threshold width. Therefore, the width of the data pulse DP applied to the address electrode X in the red, green, and blue (R, G, B) discharge cells is set in the order of green (G)> red (R)> blue (B). As a result, the blue (B) luminance can be increased and the white balance can be maintained.

However, in the conventional PDP driving method, it is difficult to determine the time point of supplying the data pulses (DP), and the circuit complexity and manufacturing are also required when the data pulses (DP) width are configured differently for the red, green, and blue discharge cells. There is a problem that the cost rises.

Accordingly, an object of the present invention relates to a plasma display panel which enables to maintain white balance.

In order to achieve the above object, the plasma display panel according to the present invention

Discharge cells for emitting red, green, and blue light at every intersection of a plurality of sustain electrode pairs alternately formed side by side on the upper substrate and a plurality of address electrodes formed to be orthogonal to the sustain electrode pairs on the lower substrate In the plasma display panel arranged in the form of a matrix, each of the sustain electrode pairs, the transparent electrode having a relatively wide width and a high light transmittance is a transparent electrode patterned by a predetermined width in the edge region of the discharge cells; And a metal bus electrode having a relatively narrow width than the transparent electrode and compensating for the resistance component of the transparent electrode; The address electrodes may vary in electrode width for each of the red, green, and blue discharge cells.

The address electrodes of the present invention are characterized by constituting electrode widths in the order of blue> green> red discharge cells.

The address electrodes of the present invention are characterized by constituting electrode widths in the order of blue> green> red discharge cells only in regions corresponding to the transparent electrodes.

In the present invention, it is characterized in that it further comprises partitions for partitioning the discharge cells for emitting the red, green and blue light.

The transparent electrodes of the present invention are patterned by a predetermined width around the partitions.

In the present invention, the width of the tops of the partitions is about 40-50 μm, and the width of the bottoms of the partitions is about twice the width of the tops.

Other objects and advantages of the present invention in addition to the above object will be apparent from the description of the preferred embodiment of the present invention with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 9 to 15.

9 is a diagram illustrating a PDP according to an embodiment of the present invention.

9, a PDP according to an embodiment of the present invention includes scan electrodes 44 and sustain electrodes 46 arranged side by side and alternately with each other; The address electrodes 52 intersect the scan electrodes 44 and the sustain electrodes 46. In addition, an upper dielectric layer (not shown) and a passivation layer (not shown) are formed on the upper substrate on which the scan electrodes 44 and the sustain electrodes 46 are disposed, and the lower substrate on which the address electrodes are disposed. A lower dielectric layer (not shown) is formed on the substrate to cover the address electrodes 52. In addition, barrier ribs 48 are formed on the lower dielectric layer to partition discharge spaces formed at the intersections of the scan electrodes 44, the sustain electrodes 46, and the address electrodes 52, and the lower dielectric layers and the barrier ribs. Phosphors (not shown) are formed on the surface of 48. The discharge cells in matrix form by the partitions 48 have the same size.

The scan electrodes 44 and the sustain electrodes 46 have a relatively wide width and transparent electrodes 44A and 46A made of a transparent electrode material (ITO) having a light transmittance of 90% or more, and have a relatively narrow width. Metal bus electrodes 44B and 46B. Here, the transparent electrode material (ITO) has a large resistance value and thus does not transmit power efficiently. Therefore, the resistive components of the transparent electrodes 44A and 46A are formed on the transparent electrodes 44A and 46A by forming metal electrodes 44B and 46B made of a good conductive material, for example, silver (Ag) or copper (Cu). To compensate. The sustain electrode pairs 44 and 46 are composed of a scan electrode and a sustain electrode. The scan signal for the panel scan and the sustain signal for maintaining the discharge are mainly supplied to the scan electrode 44, and the sustain signal is mainly supplied to the sustain electrode 46. In the present invention, the transparent electrodes 44A and 46A are patterned with a predetermined width around the partitions 48.

In addition, the address electrodes 52R, 52G, and 52B have different electrode widths for each of the red (R), green (G), and blue (B) discharge cells. These different electrode widths are intended to be applied to data pulses applied to the address electrodes X in the sustain period.

FIG. 10 is a drive waveform diagram illustrating a method of driving the PDP shown in FIG. 9.

Referring to FIG. 10, in the driving method of the PDP according to the present invention, the sustain pulse SUSPz supplied to the sustain electrodes Z during the sustain period is overlapped with the sustain pulse SUSPy supplied to the scan electrodes Y. It is supplied to overlap. In addition, the address electrodes X are supplied with a data pulse DP having a predetermined width centering on the rising and falling time points of the sustain pulse SUSPy supplied to the scan electrodes Y.

Referring to the operation through the driving waveform described above, the trigger pulse TP is first supplied to the scan electrodes Y. The trigger pulse TP causes sustain discharge to be initiated in discharge cells in which wall charge is sufficiently formed in the address period. In this case, the data electrodes DP are supplied to the address electrodes X around the polling time of the trigger pulse TP. Thereafter, the sustain pulse SSUSz is supplied to the sustain electrodes Z, and the data pulse DP having a predetermined width around the rising time of the sustain pulse SSUSz is supplied to the address electrodes X. A strong surface discharge occurs between the scan electrodes Y and the sustain electrodes Z through the data pulse DP.

Thereafter, the sustain pulse SUSPz supplied to the sustain electrodes Z during the sustain period is overlapped with the sustain pulse SUSPy supplied to the scan electrodes Y. The operation thereof will be described with reference to FIG. 11.

First, the sustain pulse SUSPy is supplied to the scan electrodes Y, and the data pulse DP centered on the rising time of the sustain pulse SUSPy is supplied to the address electrodes X. The sustain pulse SUSPy applied to the scan electrodes Y maintains the sustain voltage Vs for a predetermined time, and the period and the predetermined width of the sustain pulse Suspy applied to the scan electrodes Y are overlapped. Sustain pulse SUSPz starts to be supplied to the sustain electrodes Z as much as possible. The sustain pulses SUSPz applied to the sustain electrodes Z are subsequently turned off while the sustain pulses SUSPz applied to the scan electrodes Y are maintained while maintaining the sustain voltage Vs. In this case, the data pulse DP centered on the polling time is supplied to the address electrodes X when the sustain pulse SUSPy applied to the scan electrodes Y is turned off.

Through this driving, a strong sustain discharge occurs between the scan electrodes (Y) and the sustain electrodes (Z) together with the sustain pulse (SUSPy) applied to the scan electrodes (Y) at the time (a). A weak discharge occurs between the applied address electrodes X and the scan electrodes Y. The weak discharge generated at this time does not significantly affect the strong sustain discharge.

At the next point (b), the sustain pulses SUSPy and SUSPz are simultaneously applied to the scan electrodes Y and the sustain electrodes Z so that no discharge occurs due to the coin phase. This continues while the sustain pulses SUSPy and SUSPz applied to the scan electrodes Y and the sustain electrodes Z overlap each other.

At the time (c) when the sustain pulse SUSPy applied to the scan electrodes Y is polled, a strong sustain discharge occurs due to the voltage difference between the sustain electrodes Z and the scan electrodes Y, and the data pulse voltage A weak discharge occurs between the applied address electrodes X and the sustain electrodes Z. The weak discharge generated at this time does not significantly affect the strong sustain discharge.

Finally, when the sustain pulse (SUSPz) applied to the sustain electrodes (Z) is polled, the three electrodes are coincided with zero potential, that is, the ground potential (0V), so that no discharge occurs but rather the wall charges in the discharge cell are erased. Self-clearing discharge occurs.

As described above, when driving the PDP according to the present invention, the discharge efficiency can be improved and the luminance can be improved by reducing the discharge loss.

FIG. 12 is a diagram illustrating a degree of brightness of a discharge cell according to the width of an address electrode illustrated in FIG. 9, and FIG. 13 is a diagram of a degree of luminance according to a degree of transparent electrode pattern of the PDP illustrated in FIG. 9.

12 and 13, it can be seen that as the electrode widths of the address electrodes X increase, the luminance characteristic is improved in connection with the data pulse DP switching shown in FIG. 10. In addition, as the pattern width of the transparent electrodes ITO in the scan electrodes Y and the sustain electrodes Z increases, the luminance characteristics decrease. This is because the discharge electrode area is reduced when the pattern width of the transparent electrode is increased. When the width of the transparent electrode pattern reaches a certain critical width, the luminance is rapidly decreased.

Looking at the graphs, as the electrode width of the address electrodes X increases, the switching effect of the data pulses DP applied to the address electrodes X also increases, so that the luminance increases, or conversely, the pattern of the transparent electrode ITO. As the width increases, the luminance decreases.

The PDP shown in FIG. 9 configures the electrode widths of the address electrodes X in the order of blue (B)> green (G)> red (R) while patterning the transparent electrode ITO in accordance with the above description. For this reason, the white balance may be adjusted by increasing the luminance in the order of blue (B)> green (G)> red (R). Here, the transparent electrode (ITO) is patterned to reduce the reactive power and increase the efficiency, and to reduce the afterimage and reduce the lifespan by delaying deterioration of the partition phosphor by reducing the discharge in the discharge region adjacent to the partition due to the strong discharge at the center of the discharge cell. Can improve. In addition, by switching the data pulses between the electrodes of the address electrodes X and the sustain period, the white balance can be adjusted and the discharge efficiency can be improved.

FIG. 14 is a diagram illustrating a PDP according to a second embodiment of the present invention, in which the width of the partition wall is narrower than that of the first embodiment in FIG. 9.

In detail, the top width of the partition wall 48 is about 75 μm in the case of the WVGA (800 × 480) resolution and the conventional and the first embodiment. In the case of the present invention, it is characterized in that it is narrower, that is, about 40 to 50 μm. At this time, the bottom width of the partition wall 48 is formed to be about twice the size of the top width. As a result, the separation distance between the transparent electrode (ITO) pattern and the partition phosphor is increased to obtain a positive effect in improving afterimage and lifespan.

15 is a diagram illustrating a PDP according to a third embodiment of the present invention.

Referring to FIG. 15, the PDP according to the third embodiment of the present invention has a blue color in the transparent electrodes 44A and 46A in comparison with the first embodiment shown in FIG. 9. It consists of (B)> Green (G)> Red (R). Thus, the address electrodes 56G and 56B in the green and blue discharge cells have the same width as the main electrodes 58a and 60a and the transparent electrodes from the main electrodes 58a and 60a in the blue discharge cell. The auxiliary electrodes 59b and 60b extend only by a predetermined width only in the region where the fields 44A and 46A are formed.

Since the driving and the effects according to the above configuration are the same as in the first embodiment, description thereof will be omitted.

As described above, in the plasma display panel according to the present invention, the electrode widths of the address electrodes X are configured in the order of blue (B)> green (G)> red (R) and the address electrodes of the sustain period ( The white balance can be adjusted by applying the data switch pulse to X). In other words, the present invention has been made to solve the conventional problem of increasing efficiency at the time of patterning the transparent electrode (ITO) but reduced Hash, the patterned transparent electrode (ITO), red / green / blue The address electrode X is achieved by simultaneously improving the efficiency and luminance by using different widths of the address electrode X and increasing brightness during switching of the voltage applied to the address electrodes X during the sustain period. The conventional problems of the luminance loss caused when the white balance and the transparent electrode X are patterned according to the width (X) are simultaneously solved. In addition, the present invention can reduce the afterimage by reducing the reactive power and deterioration of the partition phosphor by patterning the transparent electrodes of the sustain electrode pairs, and also improve the discharge efficiency.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a perspective view showing a conventional three-electrode AC surface discharge plasma display panel.

FIG. 2 is a cross-sectional view illustrating the plasma display panel shown in FIG. 1. FIG.

3 is a driving waveform diagram illustrating a method of driving the plasma display panel shown in FIG. 1;

FIG. 4 is a drive waveform diagram of the sustain period shown in FIG. 3; FIG.

5 is a view showing a discharge state of a discharge cell in the address electrode in the floating state and the address electrode in the zero potential shown in FIG.

FIG. 6 is a diagram showing a discharge state when the zero potential shown in FIG. 5 is supplied to an address electrode; FIG.

FIG. 7 is a view showing a discharge state when the address electrode shown in FIG. 5 is in a floating state; FIG.

8 is a driving waveform diagram showing another driving method of the plasma display panel;

9 illustrates a plasma display panel according to a first embodiment of the present invention.

FIG. 10 is a driving waveform diagram showing a driving method of the plasma display panel shown in FIG. 9;

FIG. 11 is a view showing a discharge state according to each section in the driving waveform shown in FIG. 9; FIG.

FIG. 12 is a diagram illustrating a degree of brightness of a discharge cell according to an address electrode width illustrated in FIG. 9;

FIG. 13 is a diagram illustrating a luminance degree according to a degree of a transparent electrode pattern of the PDP illustrated in FIG. 9.

14 illustrates a plasma display panel according to a second embodiment of the present invention.

15 illustrates a plasma display panel according to a third embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

10: upper substrate 12: lower substrate

14,44 scan electrode 16,46 sustain electrode

18: upper dielectric layer 20: protective film

22, 52, 54, 56: address electrode 24: lower dielectric layer

26,48 partition wall 28 phosphor layer

Claims (6)

Discharge cells for emitting red, green, and blue light at every intersection of a plurality of sustain electrode pairs alternately formed side by side on the upper substrate and a plurality of address electrodes formed to be orthogonal to the sustain electrode pairs on the lower substrate Supplying sustain pulses to the sustain electrodes to overlap with the sustain pulses supplied to the scan electrodes during the sustain period, and supplying the address electrodes to the scan electrodes for the sustain period. In the plasma display panel using a driving method for supplying a data pulse of a predetermined width around the rising and falling time of the sustain pulse is Each of the sustain electrode pairs is A transparent electrode having a relatively wide width and a good light transmittance, wherein the transparent electrode is patterned by a predetermined width in the edge regions of the discharge cells; A metal bus electrode having a relatively narrow width than the transparent electrode and compensating for the resistance component of the transparent electrode; And the address electrodes constitute an electrode width in the order of blue> green> red discharge cells. delete The method of claim 1, And the address electrodes constitute an electrode width in the order of blue> green> red discharge cells only in a region corresponding to the transparent electrodes. The method of claim 1, And partition walls for partitioning discharge cells for emitting the red, green, and blue light. The method of claim 4, wherein And the transparent electrodes are patterned by a predetermined width around the barrier ribs. The method of claim 4, wherein The top width of the partitions is about 40 to 50㎛, And lower widths of the partition walls are about twice the width of the upper columns.