KR100377473B1 - 반도체패키지 및 그 제조방법 - Google Patents
반도체패키지 및 그 제조방법 Download PDFInfo
- Publication number
- KR100377473B1 KR100377473B1 KR10-1999-0056408A KR19990056408A KR100377473B1 KR 100377473 B1 KR100377473 B1 KR 100377473B1 KR 19990056408 A KR19990056408 A KR 19990056408A KR 100377473 B1 KR100377473 B1 KR 100377473B1
- Authority
- KR
- South Korea
- Prior art keywords
- circuit board
- semiconductor chip
- semiconductor package
- cavity
- resin layer
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 112
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 22
- 239000011347 resin Substances 0.000 claims abstract description 24
- 229920005989 resin Polymers 0.000 claims abstract description 24
- 239000011521 glass Substances 0.000 claims abstract description 15
- 230000000149 penetrating effect Effects 0.000 claims abstract description 5
- 239000000853 adhesive Substances 0.000 claims description 10
- 230000001070 adhesive effect Effects 0.000 claims description 10
- 239000008393 encapsulating agent Substances 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 5
- 230000004927 fusion Effects 0.000 claims description 2
- 230000017525 heat dissipation Effects 0.000 abstract description 6
- 238000005516 engineering process Methods 0.000 abstract description 3
- 239000010408 film Substances 0.000 description 5
- 239000002390 adhesive tape Substances 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 238000003384 imaging method Methods 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 3
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000000356 contaminant Substances 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000003566 sealing material Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/15165—Monolayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
Description
Claims (14)
- 상면에 다수의 입출력패드가 형성된 반도체칩과;상기 반도체칩의 상면에 위치되어 있되, 중앙부가 관통되어 일정 크기의 캐비티가 형성된 수지층이 구비되고, 수지층에는 본드핑거 및 랜드를 포함하는 회로패턴이 형성된 회로기판과;상기 반도체칩의 입출력패드와 회로기판의 본드핑거를 전기적으로 접속하는 접속수단과;상기 회로기판의 캐비티를 폐쇄하도록 상기 회로기판의 상면에 댐이 개재되어 부착된 글래스와;상기 회로기판의 랜드에 융착된 다수의 도전성볼을 포함하여 이루어진 것을 특징으로 하는 반도체패키지.
- 제1항에 있어서, 상기 회로기판은 수지층을 중심으로 상면에 본드핑거를 포함하는 회로패턴이 형성되고, 하면에는 랜드를 포함하는 회로패턴이 형성되며, 상기 상,하면의 회로패턴은 도전성비아홀에 의해 상호 연결된 것을 특징으로 하는 반도체패키지.
- 제2항에 있어서, 상기 접속수단은 도전성와이어인 것을 특징으로 하는 반도체패키지.
- 제2항에 있어서, 상기 반도체칩의 상면과 회로기판의 저면 사이에는 접착수단이 개재된 것을 특징으로 하는 반도체패키지.
- 제1항에 있어서, 상기 회로기판은 수지층의 하면에 본드핑거 및 랜드를 포함하는 회로패턴이 형성된 것을 특징으로 하는 반도체패키지.
- 제5항에 있어서, 상기 접속수단은 도전성범프인 것을 특징으로 하는 반도체패키지.
- 제5항 또는 제6항중 어느 한 항에 있어서, 상기 반도체칩의 측면과 회로기판의 저면 사이에는 봉지재가 충진된 것을 특징으로 하는 반도체패키지.
- 중앙에 관통되어 캐비티가 구비된 수지층과, 상기 수지층에 본드핑거 및 랜드를 포함하여 형성된 회로패턴으로 이루어진 회로기판을 제공하는 단계와;상기 회로기판의 캐비티 저면에 반도체칩을 위치시키되, 상기 반도체칩의 입출력패드가 상기 회로기판의 캐비티 또는 본드핑거를 향하도록 위치시키는 단계와;상기 반도체칩의 입출력패드와 회로기판의 본드핑거를 전기적으로 접속시키는 단계와;상기 회로기판의 상면에 캐비티를 폐쇄할 수 있도록 댐을 개재하여 글래스를부착하는 단계와;상기 회로기판의 각 랜드에 도전성볼을 융착하는 단계를 포함하여 이루어진 것을 특징으로 하는 반도체패키지의 제조 방법.
- 제8항에 있어서, 상기 회로기판 제공 단계는 수지층을 중심으로 상면에 본드핑거를 포함하는 회로패턴이 형성되고, 하면에는 랜드를 포함하는 회로패턴이 형성되며, 상기 상,하면의 회로패턴은 도전성비아홀로 상호 연결되어 이루어진 회로기판을 제공하는 것을 특징으로 하는 반도체패키지의 제조 방법.
- 제9항에 있어서, 상기 전기적 접속단계는 도전성와이어로 실시함을 특징으로 하는 반도체패키지의 제조 방법.
- 제9항에 있어서, 상기 반도체칩의 상면과 회로기판의 저면 사이에는 접착수단을 개재하여 상호 접착함을 특징으로 하는 반도체패키지의 제조 방법.
- 제8항에 있어서, 상기 회로기판 제공 단계는 수지층의 하면에 본드핑거 및 랜드를 포함하는 회로패턴이 형성되어 이루어진 회로기판을 제공함을 특징으로 하는 반도체패키지의 제조 방법.
- 제12항에 있어서, 상기 전기적 접속 단계는 도전성 범프로 실시함을 특징으로 하는 반도체패키지의 제조 방법.
- 제12항에 있어서, 상기 반도체칩의 측면과 회로기판의 저면 사이에는 봉지재를 충진함을 특징으로 하는 반도체패키지의 제조 방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-1999-0056408A KR100377473B1 (ko) | 1999-12-10 | 1999-12-10 | 반도체패키지 및 그 제조방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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KR10-1999-0056408A KR100377473B1 (ko) | 1999-12-10 | 1999-12-10 | 반도체패키지 및 그 제조방법 |
Publications (2)
Publication Number | Publication Date |
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KR20010055254A KR20010055254A (ko) | 2001-07-04 |
KR100377473B1 true KR100377473B1 (ko) | 2003-03-26 |
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KR10-1999-0056408A KR100377473B1 (ko) | 1999-12-10 | 1999-12-10 | 반도체패키지 및 그 제조방법 |
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Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
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KR100439399B1 (ko) * | 2001-07-19 | 2004-07-09 | 삼성전기주식회사 | 광픽업장치를 위한 포토다이오드 패키지 및 그 제조방법 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58178529A (ja) * | 1982-04-13 | 1983-10-19 | Mitsubishi Electric Corp | 混成集積回路装置 |
JPH02278872A (ja) * | 1989-04-20 | 1990-11-15 | Ibiden Co Ltd | 画像センサー |
KR960026906A (ko) * | 1994-12-31 | 1996-07-22 | 문정환 | 반도체 고체촬상소자 패키지 및 그 제조방법 |
KR970072373A (ko) * | 1996-04-26 | 1997-11-07 | 쯔지 하루오 | 테이프 캐리어 패키지 및 액정 표시 장치 |
JPH1098070A (ja) * | 1996-09-20 | 1998-04-14 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JPH11204565A (ja) * | 1998-01-16 | 1999-07-30 | Toshiba Corp | 半導体装置 |
JPH11354769A (ja) * | 1998-04-10 | 1999-12-24 | Matsushita Electric Ind Co Ltd | 固体撮像装置及びその製造方法 |
-
1999
- 1999-12-10 KR KR10-1999-0056408A patent/KR100377473B1/ko active IP Right Grant
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58178529A (ja) * | 1982-04-13 | 1983-10-19 | Mitsubishi Electric Corp | 混成集積回路装置 |
JPH02278872A (ja) * | 1989-04-20 | 1990-11-15 | Ibiden Co Ltd | 画像センサー |
KR960026906A (ko) * | 1994-12-31 | 1996-07-22 | 문정환 | 반도체 고체촬상소자 패키지 및 그 제조방법 |
KR970072373A (ko) * | 1996-04-26 | 1997-11-07 | 쯔지 하루오 | 테이프 캐리어 패키지 및 액정 표시 장치 |
JPH1098070A (ja) * | 1996-09-20 | 1998-04-14 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JPH11204565A (ja) * | 1998-01-16 | 1999-07-30 | Toshiba Corp | 半導体装置 |
JPH11354769A (ja) * | 1998-04-10 | 1999-12-24 | Matsushita Electric Ind Co Ltd | 固体撮像装置及びその製造方法 |
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KR20010055254A (ko) | 2001-07-04 |
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