KR100359017B1 - Method for Driving Plasma Display Panel - Google Patents

Abstract

The present invention relates to a driving method of a plasma display panel which enables high speed driving.

The present invention provides a driving method of a plasma display panel for displaying an input image on a screen including an address electrode, a scan / hold electrode crossing the address electrode, and a common sustain electrode parallel to the scan / hold electrode. Separating each scan line of the panel into at least two blocks; A reset step of simultaneously resetting the entire panel; An addressing step of sequentially scanning the blocks to select a discharge cell to display data; A display step of causing a sustain discharge in order to simultaneously display the selected discharge cells in all the addresses where the addressing is completed in all blocks; The addressing step includes generating priming discharges simultaneously in the discharge cells of each of the separated blocks; And generating an addressing discharge according to the data in turn in the scanning line of each block by using the wall charge generated in the priming discharge.

According to the present invention, when the single cells are divided into at least two blocks, the priming discharge is generated before the address discharge for each block, and the scan pulse is shortened by sufficiently forming the wall charges to assist the subsequent address discharge. Since it can be applied, high-speed addressing becomes possible.

Description

Method for Driving Plasma Display Panel {Method for Driving Plasma Display Panel}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for driving a plasma display panel, and more particularly, to a method for driving a plasma display panel that enables high speed driving.

Recently, a plasma display panel (hereinafter referred to as "PDP"), which is easy to manufacture a large panel, has attracted attention as a flat panel display device. As a PDP, a three-electrode AC surface discharge type PDP having three electrodes and driven by an alternating voltage is typical.

Referring to FIG. 1, a discharge cell of a three-electrode alternating surface discharge type PDP is formed on a scan / hold electrode 12Y and a common sustain electrode 12Z formed on an upper substrate 10, and a lower substrate 18. An address electrode 20X is provided. The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the scan / suspension electrode 12Y and the common sustain electrode 12Z side by side. Wall charges generated during plasma discharge are accumulated in the upper dielectric layer 14. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge, and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used. The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode 20X is formed in the direction crossing the scan / sustain electrode 12Y and the common sustain electrode 12Z. The partition wall 24 is formed in parallel with the address electrode 20 to prevent the ultraviolet rays and the visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper and lower plates and the partition wall.

Referring to FIG. 2, in the driving apparatus of a three-electrode alternating surface discharge type PDP, m × n discharge cells 1 have scan / hold electrode lines Y1 to Ym, common sustain electrode lines Z1 to Zm, and PDP 30 arranged in a matrix at the intersections of address electrode lines X1 to Xn, scan / hold driver 32 for driving scan / hold electrode lines Y1 to Ym, and common hold The common holding driver 34 for driving the electrode lines Z1 to Zm, the odd-numbered address electrode lines X1, X3, ..., Xn-3, Xn-1 and the even-numbered address electrode lines X2. And X4, ..., Xm-2, Xm) are provided with first and second address drivers 36A and 36B for divided driving. As illustrated in FIG. 3, the scan / sustain driver 32 and the common sustain driver 34 have a writing pulse in common with the scan / sustain electrode lines Y1 to Ym and the common sustain electrode lines Z1 to Zm. RPy and RPz) are supplied to cause discharge to occur in all discharge cells, thereby initializing all discharge cells. Following this reset period, the scan / sustain driver 32 sequentially supplies the scan pulse SP to the scan / sustain electrode lines Y1 to Ym, and the first and second address drivers 36A and 36B By supplying the data pulse DP synchronized with the scan pulse SP to the address electrode lines X1 to Xn, a selective address discharge is generated. Following the address discharge period, the scan / sustain driver 32 and the common sustain driver 34 alternately hold sustain pulses (scans / hold electrode lines Y1 to Ym and common sustain electrode lines Z1 to Zm). By alternately supplying SUSP, the discharge is maintained for a predetermined period in the discharge cells in which the address discharge has occurred.

The three-electrode AC surface discharge type PDP is driven by being divided into a plurality of subfields having the reset period, the address period, and the discharge sustain period, and in each subfield period, the number of times of light emission proportional to the weight of the video data is performed to display gradation. Will be done. For example, when an image is displayed in 256 gray scales using 8-bit video data, one frame display period (for example, 1/60 second = about 16.7 msec) in each discharge cell 1 is shown in FIG. 4. As shown in the figure, the data is divided into eight subfields SF1 to SF8. In each of the subfields SF1 to SF8, the reset period and the address period are allocated equally, while in the discharge sustain period, 1: 2: 4: 8:... It is assigned by weighting at a ratio of: 128. In such a subfield driving method, since the discharge sustain period is reduced by the time occupied by the reset period and the address period which do not contribute to the luminance, there is a problem of low luminance. For example, in the case of single scan of 480 scan lines, an address period required in one frame requires one line scan time (i.e., width of scan pulse) x 480 scan lines x 8 subfields. . When using a scanning pulse with a pulse width of about 3μs for sure address discharge, a total of 11.52ms is required for the address period and 13ms or more for including the reset period, which can be allocated to the discharge sustain period within one frame. The time is 16.67ms-13ms absolutely short, there is a problem that the brightness is low. Furthermore, when the conventional PDP driving method is used for a high-resolution PDP in which the number of scan lines is increased, the discharge sustaining period becomes shorter due to the increase in the address period, thereby making the display itself impossible. In this case, a method of reducing the width of the scanning pulse may be considered to shorten the address period. However, when the width of the scanning pulse is reduced to 2.5 μs or less, there is a possibility that erroneous discharge may occur due to the discharge delay phenomenon inherent to PDP.

In order to solve this problem of PDP, methods for reducing the address period by fast addressing have been proposed. Among the conventional high speed addressing methods, there is a method of dividing a panel up and down and double scanning to shorten an address period by half. However, in this screen division driving method, the scan / suspension electrode lines and the address electrode lines must be divided up and down to drive, so that the manufacturing cost of the PDP is increased by doubling the number of driving driver ICs.

Accordingly, it is an object of the present invention to provide a method of driving a PDP that enables high speed addressing.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge plasma display panel.

FIG. 2 is a view showing a driving device of a plasma display panel including the discharge cells shown in FIG.

3 is a frame configuration diagram for explaining a conventional subfield driving method.

4 is a driving waveform diagram of a conventional plasma display panel driving method.

5 is a view showing a driving apparatus applied to a method of driving a plasma display panel according to an embodiment of the present invention;

FIG. 6 is a drive waveform diagram of the plasma display panel driver shown in FIG. 5; FIG.

7 is a view showing a driving device applied to a method of driving a plasma display panel according to another embodiment of the present invention.

FIG. 8 is a drive waveform diagram of the plasma display panel driver shown in FIG. 7; FIG.

<Description of Symbols for Main Parts of Drawings>

10: upper substrate 12Y: scanning / holding electrode

12Z: common sustain electrode 14: upper dielectric layer

16: protective film 18: lower substrate

20X: address electrode 22: lower dielectric layer

24: partition 26: phosphor

1: discharge cell 30, 40, 50: PDP

32: scan / hold driver 34, 60: common hold drive

36A: first address driver 36B: second address driver

42, 52: first scan / hold driver 44, 54: second scan / hold driver

46: first holding part 48: second holding part

56: first priming drive unit 58: second priming drive unit

In order to achieve the above object, the PDP driving method according to the present invention includes an address electrode, a scan / hold electrode intersecting the address electrode, and a common sustain electrode parallel to the scan / hold electrode. A method of driving a plasma display panel for displaying, the method comprising: separating each scan line of the panel into at least two blocks; A reset step of simultaneously resetting the entire panel; An addressing step of sequentially scanning the blocks to select a discharge cell to display data; A display step of causing a sustain discharge in order to simultaneously display the selected discharge cells in all the addresses where the addressing is completed in all blocks; The addressing step includes generating priming discharges simultaneously in the discharge cells of each of the separated blocks; And generating an addressing discharge according to the data in turn in the scanning line of each block by using the wall charge generated in the priming discharge.

Other objects and features of the present invention in addition to the above object will be apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to FIGS. 5 to 8.

5 illustrates a driving apparatus applied to the PDP driving method according to an embodiment of the present invention, and FIG. 6 illustrates a driving waveform supplied to the PDP shown in FIG. 5 by the driving method according to the embodiment of the present invention. . The PDP driving apparatus shown in FIG. 5 includes a PDP 40 having a conventional three-electrode structure and first and second parts for separately driving the scan / sustain electrode lines Ya and Yb of the PDP 40 up and down. 2 scan / hold drivers 42 and 44 and first and second sustain drivers 46 and 48 for driving the sustain electrode lines Za and Zb of the PDP 40 up and down separately. The PDP driver further includes an address driver (not shown) for driving the address electrode lines X of the PDP 40. As shown in FIG. 6, the first and second sustain drivers 46 and 48 simultaneously apply the erase pulse EP to the sustain electrode lines Za and Zb in the reset period, thereby discharging the discharge generated in the previous subfield period. Will be erased. Next, the first and second scan / hold drivers 42 and 44 discharge the web / pulse WP simultaneously to the scan / hold electrode lines Ya and Yb as shown in FIG. 6. The reset discharge is generated in all of the cells, thereby initializing all of the discharge cells. After the reset period, the first scan / hold driver 42 and the first sustain driver 46 may prime priming pulses PPy1, PPy2, and PPz on the scan / hold electrode line Ya and the sustain electrode lines Za. Supplies priming discharges to form wall charges to be used for the address discharge. The wall charges formed by the priming discharges are added to the next address discharge voltage to easily generate an address discharge, thereby making it possible to use the scanning pulse SP having a shorter width than the conventional one during the address discharge. After the priming discharges are generated, the first scan / hold driver 42 sequentially supplies the scan pulse SP to the upper scan / hold electrode line Ya, and the address driver not shown shows the address electrode lines X. Supplying a data pulse to the device causes selective address discharge to occur. After the upper addressing, the first scan / hold driver 42 and the first sustain driver 46 have a constant DC voltage at the upper scan / hold electrode lines Ya and the sustain electrode lines Za until the sustain discharge starts. Is applied in common so that the wall charges formed by the address discharge are maintained without disappearing. When the upper addressing is completed, the second scan / sustain driver 44 and the second sustain driver 48 are identical to the first scan / sustain driver 42 and the first sustain driver 46. By driving the lines Yb and the sustain electrode lines Zb, priming discharge and address discharge are generated as described above. After the lower addressing, a constant DC voltage is applied to the lower scanning / holding electrode lines Yb and the sustaining electrode lines Zb until the sustaining discharge is started, thereby maintaining the wall charges formed by the address discharge without being lost. To be. After this address period, the first and second scan / hold drivers 42 and 44 and the first and second sustain drivers 46 and 48 are connected to the scan / hold electrode lines Ya and Yb and the sustain electrode lines Za. By alternately applying the sustain pulses SUSPy and SUSPz to Zb, the discharge is maintained in the discharge cells in which the address discharge is generated for a predetermined period of time.

In addition, in the address period, the width of the scan pulse SP is set to be short, so that stabilization discharge is additionally generated when the address is unstable, thereby stabilizing addressing. In detail, as shown in FIG. 6, after the upper addressing, the stabilization pulse SAPy is simultaneously applied to the upper scan / hold electrode lines Ya from the first scan / hold driver 42, and the first sustain driver 46 is applied. In order to stabilize the unstable addressing by applying a stabilization pulse (SAPz) to the upper sustain electrode lines Za at the same time to generate a stabilization discharge sequentially. After the lower addressing, the second scan / hold driver 44 and the second sustain driver 48 also generate stabilization discharges in the discharge cells below.

7 illustrates a driving device applied to a PDP driving method according to another embodiment of the present invention, and FIG. 8 illustrates a driving waveform supplied to the PDP shown in FIG. 7 by a driving method according to an embodiment of the present invention. will be. The PDP driving apparatus shown in FIG. 7 includes a PDP 50 having a four-electrode structure and first and second scans for driving the PDP 50 separately from the scan / sustain electrode lines Ya and Yb. / First and second priming drivers 56 and 58 for driving the holding drivers 52 and 54 and the priming electrode lines Pa and Pb of the PDP 40 up and down, and the common holding electrode line. The common holding drive part 60 for driving the field Z is provided. The PDP driver further includes an address driver (not shown) for driving the address electrode lines X of the PDP 50. In the PDP 50, n scan / sustain electrode lines Ya and Yb and n / 2 common sustain electrode lines Z and n / 2 + 1 priming electrode lines Pa formed in a row direction Discharge cells are formed at an intersection of Pb) and the address electrode lines X formed in the column direction. The scan / hold electrode lines Ya and Yb are arranged for each scan line, and the priming electrode lines Pa and Pb are arranged over two scan lines. Accordingly, the priming electrode lines Pa and Pb generate auxiliary discharges simultaneously with the scan / hold electrode lines Ya and Yb of the scan lines vertically adjacent to each other. The common holding electrode line Z is also alternately disposed between the priming electrode lines Pa and Pb to generate sustain discharge at the same time as the scanning / holding electrode lines Ya and Yb of the up and down adjacent scanning lines. Done. As shown in FIG. 8, the address driver, which is not shown, simultaneously applies the erase pulse EP to the address electrode lines X in the reset period so that the discharge generated in the previous subfield period is erased. Next, the first and second scan / hold drivers 52 and 54 simultaneously apply a weber pulse WP to the scan / hold electrode lines Ya and Yb to reset reset discharges in all of the discharge cells. By generating them, the entire discharge cells are initialized. After the reset period, the first scan / sustain driver 52 and the first priming driver 56 have priming pulses PPp1, PPp2, and PPy on the upper scan / hold electrode lines Ya and the priming electrode lines Pa. Supplies priming discharges to form wall charges to be used for the address discharge. The wall charges formed by the priming discharges are added to the next address discharge voltage to easily generate an address discharge, thereby making it possible to use the scanning pulse SP having a shorter width than the conventional one during the address discharge. After the priming discharges are generated, the first scan / sustain driver 52 sequentially supplies the scan pulse SP to the upper scan / sustain electrode line Ya, and the address driver (not shown) includes the address electrode lines X. Supplying a data pulse to the device causes selective address discharge to occur. When the upper addressing is completed, the second scan / sustain driver 54 and the second priming driver 58 are the same as the first scan / sustain driver 52 and the first priming driver 56. By driving the lines Yb and the priming electrode lines Pb, the priming discharge and the address discharge are generated as described above. After the address period, the first and second scan / hold drivers 42 and 44 and the common sustain driver 60 maintain sustain pulses in the scan / sustain electrode lines Ya and Yb and the common sustain electrode lines Z. By alternately applying SUSPy and SUSPz, the discharge is maintained in the discharge cells in which the address discharge is generated for a predetermined period of time.

During the discharge sustain period, the auxiliary pulse AP is synchronized with the auxiliary pulse AP supplied to the common sustain electrode lines Z by the first and second priming driving units 56 and 58. By supplying to the fields Pa and Pb, the amount of emitted light can be increased to improve the luminance.

In addition, by setting the width of the scan pulse SP short in the address period, when the address is unstable, one or two stabilization discharges are additionally generated between the scan / hold electrode line Y and the priming electrode line P. This will stabilize the addressing.

On the other hand, the above has been described as an example of only discharging the discharge cells up and down to address a single scan, it is possible to shorten the address period even when addressing a single scan by separating into a plurality of blocks.

As described above, according to the PDP driving method according to the present invention, when the single cells are divided into at least two blocks, the priming discharge is generated before the address discharge for each block, so that the subsequent address discharge is provided. By forming a sufficient charge, the scanning pulse can be applied shortly, thereby enabling high speed addressing. Accordingly, according to the PDP driving method according to the present invention, high-speed driving is possible with a single scan even in a high-resolution PDP in which an injection player is increased, thereby reducing manufacturing cost as compared to the conventional screen splitting method.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (7)

A driving method of a plasma display panel for displaying an input image on a screen, comprising an address electrode, a scan / hold electrode crossing the address electrode, and a common sustain electrode parallel to the scan / hold electrode. Separate each scan line of the panel into at least two blocks; A reset step of simultaneously resetting the entire panel; An addressing step of sequentially scanning the blocks to select a discharge cell to display data; A display step of causing a sustain discharge in order to simultaneously display the selected discharge cells in all of the addressed panels in all the blocks; The addressing step, Simultaneously generating priming discharges in the discharge cells of each of the separated blocks; And generating an addressing discharge according to the data in sequence in the scanning line of each block by using the wall charge generated in the priming discharge. The method of claim 1, The priming discharge And applying a corresponding voltage simultaneously between the scan / sustain electrode and the common sustain electrode. The method of claim 1, The plasma display panel further includes a priming electrode formed on two adjacent scan lines between adjacent scan / sustain electrodes. The priming discharge And applying a corresponding voltage simultaneously between the scan / hold electrode and the priming electrode. The method of claim 1, The addressing discharge step And a stabilizing discharge step for stabilizing wall charges formed by the address discharge after the addressing of each block is finished. The method of claim 1, The addressing discharge step And applying a DC voltage for stabilization of wall charges formed by the address discharge after the addressing of each block is finished. delete delete