KR100336609B1 - Method of Driving Plasma Display Panel - Google Patents

Abstract

The present invention relates to a method of driving a plasma display panel that enables stable erasing after sustain discharge.

In the driving method of the plasma display panel of the present invention, the floating voltage for compensating the voltage deviation in the discharge cell between the erase pulse and the lamp pulse by supplying the erase pulse and the lamp pulse with a predetermined time difference to the first sustain electrode during the erase period. Steps that appear.

According to the present invention, the wall charges formed in the discharge cells can be stably removed regardless of the presence / absence of sustain discharge and the number of discharges.

Description

Driving Method of Plasma Display Panel {Method of Driving Plasma Display Panel}

The present invention relates to a method for driving a plasma display panel, and more particularly, to a method for driving a plasma display panel that enables stable erasing after sustain discharge.

Plasma Display Panel (hereinafter referred to as 'PDP') is a display device using visible light generated from a phosphor when ultraviolet rays generated by gas discharge excite the phosphor. PDP is thinner and lighter than Cathode Ray Tube (CRT), which has been the mainstay of display means, and has the advantage of being able to realize high definition large screen. PDP is composed of a plurality of discharge cells arranged in a matrix form, one discharge cell constitutes a pixel of the screen.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge PDP.

Referring to FIG. 1, a discharge cell of a three-electrode alternating surface discharge type PDP is formed on a scan / sustain electrode 12Y and a common sustain electrode 12Z formed on an upper substrate 10, and a lower substrate 18. An address electrode 20X is provided. The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the scan / sustain electrode 12Y and the common sustain electrode 12Z side by side. In the upper dielectric layer 14, wall charges generated during plasma discharge are accumulated. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used. The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode 20X is formed in the direction crossing the scan / sustain electrode 12Y and the common sustain electrode 12Z. The partition wall 24 is formed in parallel with the address electrode 20X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper and lower substrates 10 and 18 and the partition wall 24.

2 is a view showing a driving apparatus of a conventional three-electrode AC surface discharge type PDP.

Referring to FIG. 2, in the conventional three-electrode alternating current surface-discharge type PDP driving apparatus, m × n discharge cells 1 have scan / sustain electrode lines Y1 to Ym and common sustain electrode lines Z1 to Zm. ) And a PDP 30 arranged in a matrix so as to be connected to the address electrode lines X1 to Xn, a scan / sustain driver 32 for driving the scan / sustain electrode lines Y1 to Ym; Common sustain driver 34 for driving common sustain electrode lines Z1 to Zm, odd-numbered address electrode lines X1, X3, ..., Xn-3, Xn-1 and even-numbered address electrode lines First and second address drivers 36A and 36B for dividing and driving (X2, X4, ..., Xn-2, Xn) are provided. The scan / sustain driver 32 sequentially supplies scan pulses and sustain pulses to the scan / sustain electrode lines Y1 to Ym so that the discharge cells 1 are sequentially scanned in line units, and m × n The discharge in each of the four discharge cells 1 is continued. The common sustain driver 34 supplies a sustain pulse to all of the common sustain electrode lines Z1 to Zm. The first and second address drivers 36A and 36B supply image data to the address electrode lines X1 through Xn in synchronization with the scan pulse. The first address driver 36A supplies image data to the odd-numbered address electrode lines X1, X3, ..., Xn-3, Xn-1, and the second address driver 36B supplies the even-numbered address electrode lines ( Image data is supplied to X2, X4, ..., Xn-2, Xn).

The three-electrode AC surface discharge type PDP is driven by dividing one frame into several subfields having different discharge times in order to express gray levels of an image. Each subfield has a reset period for uniformly discharging discharge, an address period for selecting discharge cells, a sustain period for expressing gradation according to the number of discharges, and an erasure section for removing wall charges formed in the sustain period. Divided into. For example, when the image is to be displayed with 256 gray levels, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8 as shown in FIG. In addition, each of the eight subfields SF1 to SF8 is divided into an address period and a sustain period. Here, the reset period, address period, and erase period of each subfield are the same for each subfield, while the sustain period is 2 ⁿ (n = 0,1,2,3,4,5,6,7 in each subfield). Is increased by the ratio.

4 is a waveform diagram showing a driving waveform supplied to each electrode line of the PDP in each subfield in the conventional method of driving a three-electrode AC surface discharge type PDP.

Referring to FIG. 4, one subfield may include a reset period for initializing the entire screen, an address period for writing data while scanning the entire screen in a linear order manner, a sustain period for maintaining the light emission state of cells in which data is written, and a sustain period. It is divided into an erasure section for recombining the wall charge and the space charge generated in the period. First, during the reset period, the discharge cells are initialized, and discharge is generated between the scan / sustain electrode line (Y) and the common sustain electrode line (Z) by a discharge pulse supplied to the common sustain electrode line (Z) to assist the address discharge. Priming charged particles and wall charges are formed in the cells. In the address period, scan pulses (-Vs) are sequentially applied to the scan / sustain electrode lines (Y) of the PDP, and data pulses (Vd) are synchronized with the scan pulses (-Vs) to each address electrode line (X). Supplied to. At this time, a common level DC voltage is supplied to the common sustain electrode lines Z, and the DC voltage enables stable address discharge between the address electrode line X and the scan / sustain electrode line Y. . In the sustain period, a sustain pulse is supplied to the scan / sustain electrode line Y and the common sustain electrode line Z to emit light of the selected discharge cells in the address period. In the erase period, a ramp pulse is supplied to the common sustain electrode line Z to recombine the wall charges and the space charges generated in the sustain period.

In the PDP driven as described above, the sustain discharge occurs only in the discharge cells selected in the address period. In addition, the number of discharge times of the selected discharge cells also varies according to the gray level of the image. Therefore, the wall charges and the space charges generated in the discharge cells vary depending on the presence / absence of sustain discharges and the number of discharges. However, in the erasure period, since constant erase pulses are supplied to the discharge cells regardless of the wall charges and the space charges generated, the PDP is unable to completely erase wall charges and space charges as the PDP becomes larger. The transition will occur.

Accordingly, an object of the present invention is to provide a method of driving a plasma display panel that can perform stable erasing.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode PDP.

FIG. 2 is a plan view showing an arrangement of electrode lines and discharge cells of the PDP shown in FIG. 1; FIG.

3 is a diagram illustrating gray levels of one frame in the PDP shown in FIG. 1;

FIG. 4 is a waveform diagram showing driving waveforms supplied to respective electrode lines of the plasma display panel for each subfield in the PDP driving method shown in FIG. 1;

5 is a waveform diagram showing driving waveforms supplied to respective electrode lines of the plasma display panel for each subfield in the driving method of the PDP according to the embodiment of the present invention;

<Description of Symbols for Main Parts of Drawings>

1: discharge cell 10: upper substrate

12Y: scan / sustain electrode 12Z: common sustain electrode

14,22 dielectric layer 16: protective film

18: lower substrate 20X: address electrode

24: partition 26: phosphor

30: PDP 32: scan / sustain drive unit

34: common sustain driver 36A: first address driver

36B: second address driver

In order to achieve the above object, the driving method of the plasma display panel according to the present invention supplies the erase pulses and the lamp pulses with a predetermined time difference to the first sustain electrode during the erase period, thereby providing a voltage deviation in the discharge cells between the erase pulses and the lamp pulses. In which a floating voltage for compensating appears.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIG. 5.

FIG. 5 is a waveform diagram showing a driving waveform supplied to each electrode line of the PDP in each subfield in the driving method of the three-electrode AC surface discharge type PDP according to the present invention.

Referring to FIG. 5, one subfield is divided into a reset period, an address period, a sustain period, and an erase period. First, during the reset period, a discharge pulse is supplied to the common sustain electrode line (Z) to assist the address discharge, causing a discharge between the scan / sustain electrode line (Y) and the common sustain electrode line (Z) to prime the charged particles in each discharge cell. And wall charges. In the address period, scan pulses (-Vs) are sequentially applied to the scan / sustain electrode lines (Y) of the PDP, and data pulses (Vd) are synchronized with the scan pulses (-Vs) to each address electrode line (X). Supplied to. In the sustain period, a sustain pulse is supplied to the scan / sustain electrode line Y and the common sustain electrode line Z to emit light of the selected discharge cells in the address period. In the erase period, an erase pulse is supplied to the common sustain electrode line Z to recombine the wall charges and the space charges generated in the sustain period.

When the erase pulse is described in detail, the erase pulse of the present invention may be plotted to compensate for the voltage applied to each discharge cell in the sustain period, while the auxiliary pulse T _A is applied to the common sustain electrode line Z. The floating period F _P is divided into a period in which the narrow pulse T _T is applied to the scan / sustain electrode line Y and a period in which the lamp pulse T _R is applied to the common sustain electrode line Y. The auxiliary pulse T _A and the lamp pulse T _R are applied to the common sustain electrode line Z with a predetermined time difference. The auxiliary pulse T _A applied to the common sustain electrode line Z causes an erase discharge with the scan / sustain electrode line Y to recombine the wall charges and the space charges formed in the discharge cells by the sustain discharge. The lamp pulse T _R applied to the common sustain electrode line Z gradually rises to remove residual wall charges formed in the discharge cell. The floating voltage F _V appears between the auxiliary pulse T _A and the lamp pulse T _R applied to the common sustain electrode line Z. The floating voltage F _V is different for each discharge cell by the voltage applied to the discharge cells, that is, the sustain voltage applied to each discharge cell during the sustain period. That is, the floating period F _p serves to compensate for the sustain voltage difference applied to each discharge cell in the sustain period. The floating period F _p lasts for about a period of the ramp pulse T _R. After the floating voltage F _V is applied, the narrow pulse T _T is applied to the scan / sustain electrode line Y to cause a fine discharge with the common sustain electrode line Z to erase wall charges. At this time, the lamp pulse T _R is applied to the common sustain electrode line Z so as to overlap the narrow pulse T _T to erase the residual wall charges formed in the discharge cell. The ramp pulse T _R is applied larger than the pulse width of the narrow pulse T _T by a predetermined time.

As described above, according to the driving method of the plasma display panel according to the present invention, an auxiliary pulse is applied to the front end of the lamp pulse applied to the common sustain electrode line during the erase period, and each discharge cell is provided between the lamp pulse and the auxiliary pulse. Set the floating section to compensate for the voltage difference. In addition, narrow pulses are applied to the scan / sustain electrode lines so as to overlap the lamp pulses for a predetermined time. Therefore, the wall charges formed in the discharge cells can be stably removed regardless of the presence / absence of sustain discharge and the number of discharges.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (2)

A driving method of a plasma display panel having a first sustain electrode and a second sustain electrode, and comprising an erase period for canceling light emission of a discharge cell. Supplying an erase pulse and a lamp pulse to the first sustain electrode with a predetermined time difference during the erase period, thereby displaying a floating voltage for compensating a voltage deviation in the discharge cell between the erase pulse and the lamp pulse. And a plasma display panel driving method. The method of claim 1, An erase pulse supplied to the first sustain electrode causes a primary erase discharge for erasing light emission in the discharge cell; And applying a narrow pulse to the second sustain electrode to overlap the lamp pulse for a predetermined time to cause a secondary erase discharge.