KR100334601B1 - Printed circuit board with buried resistor and method for thereof - Google Patents
Printed circuit board with buried resistor and method for thereof Download PDFInfo
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- KR100334601B1 KR100334601B1 KR1019990051134A KR19990051134A KR100334601B1 KR 100334601 B1 KR100334601 B1 KR 100334601B1 KR 1019990051134 A KR1019990051134 A KR 1019990051134A KR 19990051134 A KR19990051134 A KR 19990051134A KR 100334601 B1 KR100334601 B1 KR 100334601B1
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- South Korea
- Prior art keywords
- metal
- resistance
- photoresist
- circuit board
- resistor
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- 238000000034 method Methods 0.000 title claims abstract description 18
- 239000002184 metal Substances 0.000 claims abstract description 81
- 229910052751 metal Inorganic materials 0.000 claims abstract description 81
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 22
- 238000005530 etching Methods 0.000 claims abstract description 20
- 238000004519 manufacturing process Methods 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 238000000059 patterning Methods 0.000 claims abstract description 7
- 238000005260 corrosion Methods 0.000 claims description 12
- 230000007797 corrosion Effects 0.000 claims description 12
- 230000015572 biosynthetic process Effects 0.000 abstract description 2
- 239000004020 conductor Substances 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 229910000365 copper sulfate Inorganic materials 0.000 description 2
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- ORTQZVOHEJQUHG-UHFFFAOYSA-L copper(II) chloride Chemical compound Cl[Cu]Cl ORTQZVOHEJQUHG-UHFFFAOYSA-L 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007730 finishing process Methods 0.000 description 1
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000004753 textile Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/167—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/064—Photoresists
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/067—Etchants
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Abstract
본 발명은 인쇄회로 기판에 저항을 직접 매립제조한 인쇄회로기판 및 그 제조방법에 관한 것으로, 종래에는 인쇄회로 기판 위에 외부 저항을 실장하는 방법으로 저항을 탑재하고 있는데, 이는 저항을 실장하기 위한 패드 및 콘텍홀 형성등 등의 기판제조공정이 복잡하고, 면적을 많이 차지하는 단점이 있었다. 본 발명은 설계하고자하는 회로패턴에 의거하여 저항이 실장되어야 할 단자와 단자 사이의 연결을 직접 패터닝하여 매립된 저항금속으로 직접 인쇄회로 기판 내부에 형성하여 저항을 기판내에 매립 형성한 인쇄회로 기판을 제공한다. 또한, 본 발명은 기판(1)에 저항금속(2)을 열압착하고, 그 위에 도전금속(3) 및 포토레지스트(4)를 차례로 형성한 후, 상기 포토레지스트(4) 및 도전금속(3)과 상기 저항금속(2)을 식각하여 회로패턴에 따라 패터닝을 한다. 이후, 새로이 포토레지스트(5)를 도포후 그 포토레지스트(5)를 패터닝하여 형성하고자 하는 각 저항의 저항값에 의거하여 남겨야할 저항금속(2)의 저항영역의 상부에 있는 도전금속(3)을 식각하여 도전금속이 형성된 패드부와 패드부 사이에 저항금속으로 연결시켜 매립저항을 형성한다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board manufactured by directly embedding a resistor in a printed circuit board, and a method of manufacturing the same. In the related art, a resistor is mounted in a method of mounting an external resistor on a printed circuit board. Substrate manufacturing processes such as contact hole formation and the like are complicated and take up a lot of area. According to the present invention, a printed circuit board is formed by directly patterning a connection between a terminal on which a resistor is to be mounted and a terminal between terminals based on a circuit pattern to be designed, and formed directly inside a printed circuit board by using a buried resistance metal. to provide. In the present invention, the resistive metal 2 is thermocompressed on the substrate 1, and the conductive metal 3 and the photoresist 4 are sequentially formed thereon, and then the photoresist 4 and the conductive metal 3 ) And the resistive metal 2 are etched and patterned according to a circuit pattern. Thereafter, after newly applying the photoresist 5, the conductive metal 3 on the upper portion of the resistance region of the resistance metal 2 to be left based on the resistance value of each resistance to be formed by patterning the photoresist 5 is formed. Etching to form a buried resistor by connecting a resistance metal between the pad portion and the pad portion on which the conductive metal is formed.
Description
본 발명은 인쇄회로기판(PCB)에 매립 저항을 제조하기 위한 방법에 관한 것으로 특히, 저항 금속으로 알려진 오메가(OHMEGA) 저항금속을 이용하여 인쇄회로 기판의 도전패턴에 직접 저항을 매립 제작하기 위한 인쇄회로기판의 매립저항 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a buried resistor in a printed circuit board (PCB), and more particularly, to printing a buried resistor directly in a conductive pattern of a printed circuit board using an OHMEGA resistive metal known as a resistive metal. It relates to a method of manufacturing a buried resistor of a circuit board.
일반적으로 인쇄회로기판은 회로 설계에 따라 부품을 실장하고 부품들을 회로에 따라 결선시켜 주도록 도전패턴을 형성시키는 기판으로서, 통상 부품 실장을 위한 패드 및 콘텍부와 각 회로 패턴을 연결시키는 인쇄된 회로패턴이 형성되어 구성된다.In general, a printed circuit board is a board that forms a conductive pattern to mount a component according to a circuit design and connect the components according to a circuit. A printed circuit pattern which connects each circuit pattern with a pad and a contact part for mounting a component is generally used. It is formed and configured.
그런데, 통상의 전자회로에 있어서 다수의 칩 부품들이 사용되고는 있으나 각 칩 부품들간의 신호결합을 위해서 많은 수의 외장형 저항소자가 이용된다. 즉, IC화된 회로 이외에도 각 IC와 IC간의 신호전달이나 외부 신호 입출력 및 각종 회로 구성을 위해서 외장형 저항소자가 많이 사용되고, 이러한 외장형 저항소자들은 인쇄회로 기판에 저항소자들을 탑재시키고 있다.By the way, although a large number of chip components are used in a typical electronic circuit, a large number of external resistors are used for signal coupling between the chip components. That is, in addition to IC circuits, external resistors are frequently used for signal transmission, external signal input / output, and various circuit configurations between ICs and ICs, and these external resistors are mounted on a printed circuit board.
이와 같이 많은 수의 저항 소자들을 인쇄회로기판에 장착시키기 위해서는 저항을 탑재시키기 위한 회로패턴이 형성되어야 한다. 즉, 저항 하나를 탑재하기 위해서는 저항의 양측단 연결하기 위한 두 개의 콘텍부와, 그 일측 및 타측 콘텍부 사이의 저항 길이에 따른 공간과, 상기 두 개의 콘텍부와 각기 도전패턴으로 다른소자의 콘텍부와 연결시키기 위한 공간이 필요하게 된다. 그러므로 저항탑재를 위한 부분이 많은 면적을 차지하게 된다. 그런데, 모든 전기/전자 장치들이 소형화 추세에 있으나, 저항소자들을 장착해야 하는 면적차지를 줄이는데 한계가 있기 때문에 소형화에 많은 제약이 있었다.As described above, in order to mount a large number of resistors on a printed circuit board, a circuit pattern for mounting a resistor must be formed. That is, in order to mount one resistor, two contact portions for connecting both ends of the resistor, a space according to the resistance length between the one side and the other contact portion, and the cone of the other element in the two contact portions and the conductive pattern, respectively Space is needed to connect with the textile part. Therefore, the portion for resistance mounting occupies a large area. However, although all electric / electronic devices have been miniaturized, there have been many limitations in miniaturization because there is a limit in reducing the area charge to which the resistor elements are mounted.
한편, 저항금속으로서 OHMEGA(제조회사; OHMEGA TECHNOLOGES, INC)가 알려져 있으나, 현재 퓨즈(Fuse) 및 볼륨(Volum) 등의 용도로 사용되고 있다.On the other hand, OHMEGA (manufacturer; OHMEGA TECHNOLOGES, INC) is known as a resistive metal, but is currently used for purposes such as fuses and volumes.
그런데, 현재 일반적인 PCB 제조에서 구리부식 약품으로 사용하는 염화제2동(CuCl2) 또는 염화제2철(FeCl3)로 에칭을 할 경우 상기한 저항금 속의 특성을 변질시키므로 일반적인 구리금속 부식액으로는 저항금 속의 부식이 불가능하며, 알카라인(ALKALINE) 부식액으로 부식시켜야 한다.However, when etching with copper chloride (CuCl 2 ) or ferric chloride (FeCl 3 ), which is currently used as a copper corrosion chemical in general PCB manufacturing, it alters the properties of the above-mentioned resistive metals. It is impossible to corrode in the resistive metal and must be corroded with Alkaline corrosion solution.
따라서 본 발명은 저항금속을 이용하여 인쇄회로기판의 콘텍포인트와 콘텍포인트 사이의 도전패턴을 해당되는 저항 용량의 저항패턴으로 직접 형성함으로써 별도의 외장형 저항을 장착할 필요가 없는 저항을 직접 매립 형성한 인쇄회로기판 및 그 제조방법을 제공하기 위한 것이다.Therefore, the present invention directly forms a conductive pattern between a contact point and a contact point of a printed circuit board using a resistive metal as a resistance pattern of a corresponding resistive capacitance, thereby directly filling a resistor that does not need to install a separate external resistor. To provide a printed circuit board and a method of manufacturing the same.
본 발명은, 인쇄회로 기판 상에서 저항이 매립되는 단자와 단자 사이의 연결을 직접 저항금속으로 연결하되, 그 저항금속을 패터닝하여 원하는 용량의 저항을 가지도록 구성함으로써 외장형 저항을 인쇄회로기판의 신호선 연결패턴에 직접 형성한다.According to the present invention, a connection between a terminal where a resistor is embedded on a printed circuit board and a terminal is directly connected with a resistance metal, and the external resistance is connected to a signal line of a printed circuit board by patterning the resistance metal to configure a resistance of a desired capacity. Form directly on the pattern.
또한, 저항금속의 저항치는 그 저항금속의 단위 면적당 폭과 길이의 비에 고유저항값을 곱하여 저항값이 산출되므로 단면적의 폭과 길이의 비를 조정하여 단위 저항으로 규정하고, 그 단위저항을 직선으로 연결시켜 형성한 막대형, 구형파와 같은 지그재그로 형성시킨 민더(meander)형, 저항값에 따라 일부에만 단위저항을 매립한 쇼팅 바(shorting bar)형, 환(circular)형 등으로 구성할 수 있다.In addition, since the resistance value of the resistance metal is calculated by multiplying the ratio of the width and length per unit area of the resistance metal by the intrinsic resistance value, the resistance value is calculated and the ratio of the width and length of the cross-sectional area is adjusted to define the unit resistance. It can be configured as a meander type formed by zigzag like bar and square wave formed by connecting with the wire, and a shorting bar type or circular type with unit resistance embedded only in part depending on the resistance value. have.
본 발명의 인쇄회로기판의 저항제조방법은, 기판의 절연층 상부에 도체금속에 저항체금속을 도금한 재료를 열압착 한 후 도체금속 상부에 식각 레지스트를 열압착하여 노광, 현상후 패턴 외 부분을 부식한다. 도체금속이 부식된 하부에 있는 저항금속(OHMEGA PLY)을 황산동부식(CuSO4 .5H2O)한 후 식각 레지스트를 밧긴다. 도체위에 식각용 레지스트를 열압착시킨후 식각 저항 상부의 레지스트를 현상시킨후 도체금속을 알칼리 부식한다.In the resistive manufacturing method of a printed circuit board of the present invention, a material in which a resistor metal is plated on a conductor metal on an insulating layer of a substrate is thermocompressed, and then an etching resist is thermocompressed on the conductor metal to expose an exposed portion after pattern development. Corrode. After the metal resistor (OHMEGA PLY) in the conductor metal corrosion lower the corrosion of copper sulfate (CuSO 4. 5H 2 O) creeps Bhatt the etching resist. After etching the etching resist on the conductor, the resist on the upper part of the etching resistance is developed and alkali corrosion of the conductor metal.
도 1a 내지 도 1h는 본 발명에 의한 저항을 기판에 매립한 인쇄회로기판의 제조공정도.1A to 1H are manufacturing process diagrams of a printed circuit board in which a resistance according to the present invention is embedded in a substrate.
도 2는 본 발명에 의한 다층 인쇄회로기판의 매립저항 구조도.2 is a buried resistance structure diagram of a multilayer printed circuit board according to the present invention;
도 3a 내지 도 3d는 본 발명에 의한 매립저항의 형태 예시도.Figures 3a to 3d is an illustration of the form of the buried resistor according to the present invention.
＜도면의 주요부분에 대한 부호의 설명＞<Description of the code | symbol about the principal part of drawing>
1 : 기판 2 : 저항금속1 substrate 2 resistive metal
3 : 도전금속 4, 5 : 포토레지스트3: conductive metal 4, 5: photoresist
10 : 매립저항 20 : 도전금속패드10: buried resistance 20: conductive metal pad
11, 15, 19 : 제1, 제2, 제3층 회로패턴11, 15, 19: first, second, third layer circuit pattern
12 : 솔더 범프 13, 16 : 비아12: solder bump 13, 16: via
14 : 금속 패드 17 : 금속 트랙14 metal pad 17 metal track
18 : 신호선 층18: signal line layer
이하, 본 발명의 실시예를 첨부된 도면을 참조해서 상세히 설명하면 다음과 같다.Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도 1은 본 발명의 인쇄회로기판 제조공정도이다.1 is a manufacturing process diagram of a printed circuit board of the present invention.
도 1a와 같이 기판(1)에 저항금속(2)을 열압착하고, 그 위에 도전금속(구리)(3) 및 포토레지스트(4)를 차례로 형성하는 제1공정을 수행한다. 상기 저항금속(2)은 오메가폴리(Ωhmega-Ply)를 열압착방법으로 형성하고, 도전금속(3)으로는 통상의 구리를 도금하며, 그 위에 포토레지스트(4)를 도포한다.As shown in FIG. 1A, a first process of thermally compressing the resistive metal 2 onto the substrate 1 and sequentially forming a conductive metal (copper) 3 and a photoresist 4 thereon is performed. The resistive metal 2 is formed by thermocompression bonding of omega poly (Ωhmega-Ply), plated with ordinary copper as the conductive metal 3, and a photoresist 4 is applied thereon.
이어서 도 2b와 같이 상기 포토레지스트(4)를 형성하고자하는 회로패턴에 의거하여 패터닝하는 제2공정을 수행한다. 이때 회로패턴은 도전금속(3)의 패드부 및 신호선들을 말하며, 신호선은 저항을 삽입해야 할 영역을 포함하여 일체로 형성한다.Subsequently, as illustrated in FIG. 2B, a second process of patterning the photoresist 4 is performed based on a circuit pattern to be formed. At this time, the circuit pattern refers to the pad portion and the signal lines of the conductive metal 3, and the signal lines are integrally formed including a region into which a resistor is to be inserted.
그리고, 도 2c와 같이 상기 패터닝된 포토레지스터(4)를 식각 마스크로 이용하여 도전금속(3)을 식각하는 제3공정을 수행한다. 이때 도전금속(3)의 식각은 통상의 구리 식각방법으로 식각하며, 이는 인쇄회로기판의 제조방법에서 이미 잘 알려진 것이므로 설명을 생략한다.As illustrated in FIG. 2C, a third process of etching the conductive metal 3 is performed using the patterned photoresist 4 as an etching mask. At this time, the etching of the conductive metal (3) is etched by a conventional copper etching method, which is well known in the method of manufacturing a printed circuit board, and thus description thereof is omitted.
이후, 도 3d와 같이, 상기 포토레지스트(4) 및 도전금속(3)의 남아있는 패턴을 식각마스크로 이용하여 상기 저항금속(2)을 식각하는 제4공정을 수행한다. 이때 상기 저항금속(2)의 식각방법은, 부식액으로서 황산동부식액(CuSO4·5H2O)을 이용하여 저항금속(2)을 식각한다. 즉, 부식액으로 CuSO4·5H2O 250g/L ±20g/L, H2SO45ml/L ±4ml/L 부식용액으로 온도 90℃ - 93℃의 조건으로 부식하는 것이 가장 바람직하다.Thereafter, as illustrated in FIG. 3D, a fourth process of etching the resistive metal 2 is performed using the remaining patterns of the photoresist 4 and the conductive metal 3 as an etching mask. At this time, the etching method of the resistance metal (2), etching the resistance metal (2) using a copper sulfate corrosion solution (CuSO 4 · 5H 2 O) as a corrosion solution. That is, it is most preferable that the corrosion solution is a corrosion solution of CuSO 4 · 5H 2 O 250g / L ± 20g / L, H 2 SO 4 5ml / L ± 4ml / L corrosion solution at a temperature of 90 ℃-93 ℃.
이어서, 도 3e와 같이, 상기 포토레지스트(4)를 제거하고, 도 3f와 같이 새로이 포토레지스트(5)를 도포후 그 포토레지스트(5)를 패터닝하여 형성하고자 하는 각 저항의 저항값에 의거하여 남겨야할 저항금속(2)의 저항영역의 상부에 있는 도전금속(3)을 노출시키는 제5공정을 수행한다.Next, as shown in FIG. 3E, the photoresist 4 is removed, the photoresist 5 is newly applied as shown in FIG. 3F, and the photoresist 5 is patterned based on the resistance value of each resistor to be formed. A fifth step of exposing the conductive metal 3 on the upper portion of the resistance region of the resistive metal 2 to be left is performed.
그리고, 도 3g와 같이 상기 제5공정에서 노출된 도전금속(3)을 식각하여 저항금속(2)을 노출시켜 저항체를 형성하고, 상기 제2포토레지스트(5)를 제거하여 도 3h와 같이 도전금속(2)의 패턴과 패턴 사이에 저항금속(2)이 노출되어 매립저항(10)을 형성하는 제6공정을 수행한다.3G, the conductive metal 3 exposed in the fifth process is etched to expose the resistive metal 2 to form a resistor, and the second photoresist 5 is removed to conduct the conductive material as shown in FIG. 3H. A sixth process is performed to form the buried resistor 10 by exposing the resistive metal 2 between the pattern of the metal 2 and the pattern.
이후, 통상의 마무리 공정으로 보호막을 입히고 도전금속(3)들을 노출시켜 인쇄회로기판을 제조한다.After that, a protective film is coated by a conventional finishing process and the conductive metals 3 are exposed to manufacture a printed circuit board.
도 2는 본 발명에 의한 매립저항을 가진 인쇄회로기판의 다층 구조의 실시예를 보인 도면이다.2 is a view showing an embodiment of a multilayer structure of a printed circuit board having a buried resistor according to the present invention.
다층구조의 인쇄회로기판은 기판의 상하면에 회로패턴이 형성됨과 아울러 기판의 내부에도 회로패턴이 형성되어 매립된 회로패턴을 가진 다층구조로 구성된다.The printed circuit board of the multilayer structure has a circuit pattern formed on the upper and lower surfaces of the substrate, and a circuit pattern formed on the inside of the substrate, and is composed of a multilayer structure having a circuit pattern embedded therein.
본 발명에 의한 매립저항(10)은, 내부의 매립회로패턴에도 형성이 가능하며, 이 경우 도 2와 같이 매립시켜 구성한다. 즉, 제1층의 회로패턴(11)과 제2층의 회로패턴(15) 사이에 비아(13)를 통해 제1층의 솔더범퍼(12)를 제2층의 회로패턴(15)상의 도전금속 패드(14)에 연결하고, 그 제2층의 도전 금속패드(14)와 제2층의 도전금속패드 사이에 상기 도1에서 설명한 바와 같은 공정으로 매립저항(10)를 형성한다. 그리고, 제2층의 패드와 비아(16)를 통해 제3층의 회로패턴(19)의 도전금속 트랙(17)과 연결하여 그 도전 금속 트랙(17)을 신호선 층(18)과 연결함으로써 다층구조의 인쇄회로기판이 구성된다. 여기서 예시된 도 2는 3층구조의 인쇄회로기판을 예시하고 중간에 매립된 제2층에 저항금속을 이용한 매립저항(10)을 형성한 것을예시한 것이다. 동일한 방법에 의해 3층구조, 4층구조등등 다층구조에 그대로 적용될 수 있으며, 상하면의 패드와 패드 사이에도 매립저항(10)을 형성하여 다층구조의 매립저항을 형성할 수 있는 것은 자명한 사실이다.The buried resistor 10 according to the present invention can also be formed in an internal buried circuit pattern. In this case, the buried resistor 10 is formed by buried as shown in FIG. That is, the conductive bumper 12 of the first layer is electrically conductive on the circuit pattern 15 of the second layer through the via 13 between the circuit pattern 11 of the first layer and the circuit pattern 15 of the second layer. A buried resistor 10 is formed in the process as described in FIG. 1 above between the metal pad 14 and the conductive metal pad 14 of the second layer and the conductive metal pad of the second layer. Then, the pads and vias 16 of the second layer are connected to the conductive metal tracks 17 of the circuit pattern 19 of the third layer, and the conductive metal tracks 17 are connected to the signal line layer 18. The printed circuit board is constructed. FIG. 2 exemplifies a three-layer printed circuit board and illustrates that a buried resistor 10 using a resistive metal is formed in a second layer buried in the middle. The same method can be applied to a multi-layer structure such as a three-layer structure, a four-layer structure, etc. It is obvious that a buried resistor 10 can be formed between the upper and lower pads and the pads to form a multi-layer buried resistor. .
이와같은 제조공정에 의해 인쇄회로기판에 직접 저항을 형성하는데, 저항금 속의 저항값 결정방법은, 단위 면적당 폭과 길이의 비와 고유저항값에 의해 결정되므로, 본 발명에서는 이를 전체 길이와 폭에 의해 계산하기보다는 단위저항의 크기를 규정하고, 그 크기의 단위저항이 연속되어 몇 개의 단위저항이 형성되는 가에 따라 총합의 저항치를 설계한다.The resistance is directly formed on the printed circuit board by such a manufacturing process. Since the resistance value determination method in the resistive metal is determined by the ratio of the width and length per unit area and the specific resistance value, in the present invention, the resistance is determined according to the overall length and width. Rather than calculating by means of defining the size of the unit resistance, the resistance of the total is designed according to how many unit resistances are formed by successive unit resistance of that size.
예를들어 도 3a 내지 도 3d는 저항금속(10)의 저항값 형성 예시도로서, 도 3a 와 같이 막대형(bar type)과, 도 3b와 같은 민더 형(meander type)과, 도 3c와 같은 쇼팅 바 형(shorting bar type)으로 구성할 수 있다. 막대형은, 도전금속 패드(20)와 패드(20) 사이를 막대형으로 저항금속(10)을 연결구성한다. 이는 저항값이 작은 경우에 이용될 수 있고, 도 3b는, 지그재그형때로 저항금속(10)을 패드와 퍄드사이에 패터닝하여 연결 구성함으로써, 큰 저항값을 설계할 수 있다. 또한 도 3c와 같이 직재그형태에서 수직 직선부분만을 저항금속(10)으로 형성하여 저항값을 조절 설계할 수 있다. 이때 각 도전금속의 하부에는 저항금속(10)이 매립되어있지만 그 상부의 도전금속에 의해 전기적으로 저항없이 연결된 상태로서 저항체를 형성하고자 하는부분만 도전금속을 제거한 상태로 구성하는 것이다.For example, FIGS. 3A to 3D are diagrams illustrating resistance value formation of the resistive metal 10. The bar type as illustrated in FIG. 3A, the meander type as illustrated in FIG. 3B, and the same as illustrated in FIG. 3C. It can be configured as a shorting bar type. The rod type connects the resistance metal 10 in a rod form between the conductive metal pad 20 and the pad 20. This can be used when the resistance value is small, and FIG. 3B can design a large resistance value by patterning and connecting the resistance metal 10 between the pad and the cord in a zigzag shape. In addition, as shown in FIG. 3C, only a vertical straight portion may be formed of the resistance metal 10 in a woven pattern to adjust the resistance value. At this time, although the resistive metal 10 is buried in the lower portion of each conductive metal, only the portion of the conductive metal removed from the conductive metal is formed by being electrically connected without resistance by the upper conductive metal.
또한 도 3d와 같이 환형(circular type)으로도 구성할 수 있는데 이때의 저항값 산정방법은 내경이 d1이고 외경이 d2인 경우, 길이는 (πd2 - πd1)/2 가 되므로 이를 이용하여 저항값 = (길이/폭)*고유저항으로 계산하여 결정한다.In addition, as shown in FIG. 3d, the circuit can be configured in a circular type. In this case, the resistance value is calculated by using the resistance value = (πd2-πd1) / 2 when the inner diameter is d1 and the outer diameter is d2. (Length / Width) * Determined by the intrinsic resistance.
이상에서 상세히 설명한 바와 같은 본 발명에 의하면, 저항금속을 이용하여 저항을 매립시켜 인쇄회로기판에 직접 설계하므로, 외장형 저항을 탑재시키지 않아도 되고, 이로인해 인쇄회로기판의 면적을 월등히 줄일 수 있는 장점이 있고, 부품삽입을 위한 공정을 월등히 단축시킬 수 있는 효과가 있다.According to the present invention as described in detail above, since the resistance is embedded in the printed circuit board by embedding the resistor directly, there is no need to mount an external resistor, thereby reducing the area of the printed circuit board significantly In addition, there is an effect that can significantly shorten the process for inserting parts.
Claims (5)
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| KR100980602B1 (en) * | 2008-01-21 | 2010-09-07 | (주)인터플렉스 | Manufacturing method of embedded resistor flexible printed circuit board |
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| KR100382565B1 (en) * | 2001-04-20 | 2003-05-09 | 삼성전기주식회사 | Method for Manufacturing Printed Circuit Board with Buried Resistors |
| KR100781938B1 (en) * | 2001-07-18 | 2007-12-04 | 엘지전자 주식회사 | LCR embeded PCB making method |
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| JPS6442895A (en) * | 1987-08-11 | 1989-02-15 | Sanki Eng Co Ltd | Multilayered wiring board with resistor |
| JPH0832241A (en) * | 1994-07-15 | 1996-02-02 | Oki Electric Ind Co Ltd | Resistance element formed on multilayer ceramic board and its formation |
| JPH09205256A (en) * | 1996-01-24 | 1997-08-05 | Canon Inc | Flexible printed-circuit board |
| KR19980067183U (en) * | 1997-05-23 | 1998-12-05 | 김영환 | Circuit board having a structure of embedded electrode pad |
| KR19980067182U (en) * | 1997-05-23 | 1998-12-05 | 김영환 | Printed circuit board |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6442895A (en) * | 1987-08-11 | 1989-02-15 | Sanki Eng Co Ltd | Multilayered wiring board with resistor |
| JPH0832241A (en) * | 1994-07-15 | 1996-02-02 | Oki Electric Ind Co Ltd | Resistance element formed on multilayer ceramic board and its formation |
| JPH09205256A (en) * | 1996-01-24 | 1997-08-05 | Canon Inc | Flexible printed-circuit board |
| KR19980067183U (en) * | 1997-05-23 | 1998-12-05 | 김영환 | Circuit board having a structure of embedded electrode pad |
| KR19980067182U (en) * | 1997-05-23 | 1998-12-05 | 김영환 | Printed circuit board |
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| KR100980602B1 (en) * | 2008-01-21 | 2010-09-07 | (주)인터플렉스 | Manufacturing method of embedded resistor flexible printed circuit board |
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