JP2000082879A - Multi-layer substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multi-layer substrate wherein a built-in resistor allows smaller mount area. SOLUTION: A multi-layer substrate comprises a core substrate 1, a first conductor layer 3 formed on the upper surface of the core substrate 1, a second conductor layer 5 formed on the lower surface of the core substrate 1, a hole 7 formed at first and second conductor layers 3 and 5 and the core substrate 1, a carbon resistor 11 filled in the hole 7, and a plating layer 9 formed on the resistor 11 and the second conductor layer 5. Thus, the mount area of the multi-layer substrate becomes smaller.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer substrate. In particular, the present invention relates to a multilayer substrate in which a mounting area is reduced by incorporating a resistor.

[0002]

2. Description of the Related Art In general electronic devices such as camcorders, further miniaturization is being pursued. Therefore, the mounting area of a mounting component (multilayer substrate) used inside an electronic device has been reduced in size. Specifically, for example, for the resistance, 2012 (that is, 2.0 ×
Although the size is reduced from 1.2 mm to 1608 (that is, 1.6 × 0.8 mm), further miniaturization requires more sophisticated chip mounting technology and reflow technology. Therefore, it is considered that the reflow of the micro component is necessarily limited by the mounting quality, the chip mounter ability, and the like.

FIGS. 3A to 3D are cross-sectional views showing a method for manufacturing a two-layer substrate as an example of a conventional method for manufacturing a multilayer substrate.

First, as shown in FIG. 3A, a first Cu pattern 103 is formed on an upper surface of a core substrate 101, and a second Cu pattern 105 is formed on a lower surface of the core substrate 101. Thereafter, as shown in FIG.
Through holes 107 are formed in the first and first and second Cu patterns 103 and 105.

Next, as shown in FIG. 3C, the inner wall of the through hole 107 and the first and second Cu patterns 10 are formed.
3. Plating 109 is applied on the surface of 105. Thereby, the first Cu pattern 103 and the second Cu pattern 1
05 is electrically connected.

Thereafter, as shown in FIG. 3D, the plating 109 and the Cu patterns 103 and 105 are patterned by etching.

[0007]

By the way, in the above-mentioned conventional multilayer substrate, since the resistance element is formed on the surface, there is a limit in reducing the mounting area of the multilayer substrate even if the resistance element is downsized. is there.

On the other hand, recent electronic devices often use digital circuits. For this reason, the number of types of resistance elements required for the circuit has been reduced from E24 (E24 series which is a standard of fixed resistance value of industrial standard (JIS)) to E6, E3 and E1. I have. At the same time, the number of components that can use a resistance element having a large tolerance, such as a tolerance of ± 5% to ± 50% of the tolerance of the resistance, is increasing.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a multilayer substrate having a small mounting area by incorporating a resistor.

[0010]

In order to solve the above problems, a multilayer substrate according to a first aspect of the present invention comprises: a core substrate;
A first conductor layer formed on an upper surface of the core substrate, a second conductor layer formed on a lower surface of the core substrate, the first and second conductor layers;
A hole formed in the conductor layer and the core substrate, a resistor filled in the hole, a first plating layer formed on the resistor and the first conductor layer, and the resistor And the second
And a second plating layer formed on the conductive layer.

In the multilayer substrate according to the first aspect, the resistor can be embedded in the hole of the core substrate by incorporating the resistor in the multilayer substrate. As a result, the substrate surface can be effectively used, and as a result, the mounting area of the multilayer substrate can be reduced.

A multi-layer substrate according to a second aspect of the present invention is a multi-layer substrate in which a conductor layer and a core substrate are sequentially formed, wherein the core substrate is filled with a plurality of resistors having a constant resistance value. And the resistor is connected in series or in parallel by the conductor layer. Further, it is preferable that the resistor is made of carbon.

In the multilayer board according to the second aspect, by connecting the resistors filled in the core board in series or parallel by a conductor layer, a plurality of types of resistors are provided in one multilayer board by a resistor having a constant resistance value. A resistance value can be obtained.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. 1A to 1E are cross-sectional views illustrating a method for manufacturing a multilayer substrate (two-layer substrate) according to the first embodiment of the present invention.

First, as shown in FIG. 1A, a first Cu pattern 3 is formed on the upper surface of
A second Cu pattern 5 is formed on the lower surface of the substrate. Thereafter, as shown in FIG. 1B, the core substrate 1 and the first and second C
The through holes 7 are formed in the u patterns 3 and 5.

Next, as shown in FIG. 1C, the inside of the through hole 7 is filled with a resistor 11 made of, for example, carbon.

Thereafter, as shown in FIG. 1D, plating 9 is applied on the surfaces of the resistor 11 and the first and second Cu patterns 3 and 5. Thereby, the first Cu pattern 3 and the second Cu pattern 5 are electrically connected via the plating 9 and the resistor 11.

Next, as shown in FIG.
And the Cu patterns 3 and 5 are patterned by etching.

According to the first embodiment, the resistor 11 can be easily formed in the multilayer substrate by embedding the resistor 11 in the through hole 7. That is, in the conventional multi-layer board manufacturing process, the resistor is easily inserted into the multi-layer board only by inserting a step of filling the resistor between the drilling step of forming a through hole and the plating step of connecting the patterns. Can be formed.

Further, by embedding the resistor 11 in the through hole of the substrate, a resistor is built in the multilayer substrate to effectively utilize the surface of the substrate. As a result, the mounting area of the multilayer substrate can be reduced.

FIG. 2 is a sectional view showing a multilayer substrate (six-layer substrate) according to a second embodiment of the present invention. The method for manufacturing the multilayer substrate is the same as the method according to the first embodiment.

The multilayer substrate shown in FIG. 2 has a core substrate 1, and the core substrate 1 has first to first layers formed of Cu patterns and plating.
Sixth conductor layers 13 to 18 are formed in order from the top.
That is, the core substrate 1 is disposed between the first to sixth conductor layers 13 to 18.

Two through holes are formed in the core substrate 1 between the first conductor layer 13 and the second conductor layer 14, and the first and second carbon layers are formed in these through holes. The resistors 21 and 22 are filled. The first and second conductor layers 13 and 14 are composed of first and second resistors 21 and
22 and are electrically connected to each other.

A through hole is formed in the core substrate 1 between the first conductor layer 13 and the sixth conductor layer 18, and a third resistor 2 made of carbon is formed in the through hole.
3 are filled. First and sixth conductor layers 13 and 18
Are electrically connected to each other via a third resistor 23.

A through hole is formed in the core substrate 1 between the second conductor layer 14 and the fourth conductor layer 16, and a fourth resistor 2 made of carbon is formed in the through hole.
4 are filled. Second and fourth conductor layers 14, 16
Are electrically connected to each other via a fourth resistor 24.

A through hole is formed in the core substrate 1 between the second conductor layer 14 and the fifth conductor layer 17, and a fifth resistor 2 made of carbon is formed in the through hole.
5 are filled. Second and fifth conductor layers 14, 17
Are electrically connected to each other via a fifth resistor 25.

A through hole is formed in the core substrate 1 between the third conductor layer 15 and the fourth conductor layer 16, and a sixth resistor 2 made of carbon is formed in the through hole.
6 are filled. Third and fourth conductor layers 15, 16
Are electrically connected to each other via a sixth resistor 26. The first to sixth resistors are made of carbon having a constant resistance value.

Next, the resistance value of the resistor incorporated in the multilayer substrate as described above will be described. Assuming that the resistance between the third conductor layer 15 and the fourth conductor layer 16 is a, for example, the other resistances are as follows. The resistance value between the second conductor layer 14 and the fourth conductor layer 16 is 2a, and the second conductor layer 1
4 and the first conductor layer 13 have a resistance of 0.5a,
The resistance between the second conductor layer 14 and the fifth conductor layer 17 is 3
a, and the resistance between the first conductor layer 13 and the sixth conductor layer 18 is 5a.

By connecting the resistors filled in the multilayer substrate as described above, five types of resistance values can be obtained by the carbon resistor having a constant resistance value. Note that the method of connecting the resistors in the multilayer substrate is merely an example, and a relatively arbitrary resistance value can be obtained by connecting the resistors in series (series) or parallel (parallel).

Further, as described above, since recent electronic devices often use digital circuits, the number of types of resistance values required for the circuits is reduced. The number is small. That is, as the number of necessary resistance values increases, the number of steps for embedding the resistor increases, but if the number of resistance values is small, the number of embedding steps decreases. Thereby, the manufacturing cost of the multilayer substrate is reduced, and the multilayer substrate is easily applied to an electronic device.

The same effects as those of the first embodiment can be obtained in the second embodiment.

[0032]

As described above, according to the present invention, the resistor is embedded in the hole of the core substrate, so that the resistor is built in the multilayer substrate. Therefore, it is possible to provide a multilayer substrate having a reduced mounting area by incorporating a resistor.

[Brief description of the drawings]

FIGS. 1A to 1E are cross-sectional views illustrating a method for manufacturing a multilayer substrate according to a first embodiment of the present invention.

FIG. 2 is a sectional view showing a multilayer substrate according to a second embodiment of the present invention.

FIGS. 3A to 3D are cross-sectional views illustrating a method for manufacturing a two-layer substrate as an example of a conventional method for manufacturing a multilayer substrate.

[Explanation of Symbols] 1 ... core substrate, 3 ... first Cu pattern, 5 ... second C
u pattern, 7 through hole, 9 plating, 11 resistor, 13 first conductor layer, 14 second conductor layer, 15
... third conductor layer, 16 ... fourth conductor layer, 17 ... fifth conductor layer, 18 ... sixth conductor layer, 21 ... first resistor, 22
... second resistor, 23 ... third resistor, 24 ... fourth resistor, 25 ... fifth resistor, 26 ... sixth resistor, 10
DESCRIPTION OF SYMBOLS 1 ... Core board | substrate, 103 ... 1st Cu pattern, 105 ...
2nd Cu pattern, 107 ... through hole, 109 ...
plating.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5E343 AA02 AA07 AA11 BB16 BB24 BB58 BB63 BB71 DD32 GG13 5E346 AA06 AA14 AA15 AA28 AA34 AA35 AA41 AA43 BB01 BB20 CC25 DD09 DD22 DD32 EE33 FF35 HFF45H22

Claims (3)

[Claims] A first conductor layer formed on an upper surface of the core substrate; a second conductor layer formed on a lower surface of the core substrate; and the first and second conductor layers A hole formed in the core substrate; a resistor filled in the hole; a first plating layer formed on the resistor and the first conductor layer; And a second plating layer formed on the conductive layer. 2. A multilayer substrate in which a conductor layer and a core substrate are sequentially formed, wherein the core substrate is filled with a plurality of resistors having a constant resistance value, and the resistor is formed by the conductor layer. A multilayer substrate which is connected in series or parallel. 3. The multilayer substrate according to claim 1, wherein said resistor is made of carbon.