KR100301800B1 - Method for fabricating micro nozzle - Google Patents

Method for fabricating micro nozzle Download PDF

Info

Publication number
KR100301800B1
KR100301800B1 KR1019930003781A KR930003781A KR100301800B1 KR 100301800 B1 KR100301800 B1 KR 100301800B1 KR 1019930003781 A KR1019930003781 A KR 1019930003781A KR 930003781 A KR930003781 A KR 930003781A KR 100301800 B1 KR100301800 B1 KR 100301800B1
Authority
KR
South Korea
Prior art keywords
semiconductor substrate
etching
insulating film
silicon substrate
deposited
Prior art date
Application number
KR1019930003781A
Other languages
Korean (ko)
Other versions
KR940021129A (en
Inventor
박오서
Original Assignee
김영환
현대반도체 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김영환, 현대반도체 주식회사 filed Critical 김영환
Priority to KR1019930003781A priority Critical patent/KR100301800B1/en
Publication of KR940021129A publication Critical patent/KR940021129A/en
Application granted granted Critical
Publication of KR100301800B1 publication Critical patent/KR100301800B1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Nozzles (AREA)
  • Particle Formation And Scattering Control In Inkjet Printers (AREA)

Abstract

PURPOSE: A method for fabricating a micro nozzle is provided to form a cone-shaped micro nozzle used for a medical instrument or a precision machine. CONSTITUTION: A photo-resist layer is deposited on a silicon substrate including a dopant. An exposure process and a development process are performed. A mountain shaped center portion is formed on the silicon substrate by performing an etch process. The photo-resist layer is removed. SiO2 is deposited on the silicon substrate. Si3N4(4) is deposited on the SiO2. An SOG(Spin On Glass) layer is coated on the Si3N4(4). The SOG layer is removed by performing an etch back process. The center portion of the SiO2 deposited on the silicon substrate is exposed by the etch back process. A hole(6) is formed on a center portion of the Si3N4(4) by the silicon substrate(1) and the SiO2.

Description

초소형 노즐 제조방법Micro nozzle manufacturing method

제1도는 종래 기술의 노즌 제조방법을 나타낸 설명도.1 is an explanatory diagram showing a conventional manufacturing method of the prior art.

제2도는 본 발명의 노즐 제노방법을 나타낸 공정 순서도.2 is a process flowchart showing the nozzle xenotting method of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : Si기판 2 : 감광막1 Si substrate 2 Photosensitive film

3 : SiO24 : Si3N4 3: SiO 2 4: Si 3 N 4

5 : SOG 6 : 홀5: SOG 6: hole

본 발명은 노즐 제조방법에 관한 것으로, 특히 의학용 기기 및 고정밀 전자부품에 적용되어 사용될 수 있도록 한 초소형 노즐 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nozzle manufacturing method, and more particularly to a method for manufacturing a micro nozzle which can be applied to medical devices and high precision electronic components.

종래의 노즐은 제1도에 나타낸 바와 같이 금형등의 방법으로 노즐을 제조하였기 때문에 직경이 1㎜ 이하되는 노즐은 제조하기가 어려운 고정밀을 요하는 전자부품이나 의학용 기기에 적합하지 않는 문제점이 있었다.Since the nozzle is manufactured by a mold or the like as shown in FIG. 1, the conventional nozzle has a problem that the nozzle having a diameter of 1 mm or less is not suitable for electronic parts or medical devices requiring high precision which is difficult to manufacture. .

본 발명은 상기 문제점을 해결하기 위하여 안출한 것으로, 콘(cone) 형태의 초소형 노즐을 제조하는 방법을 제공함에 그 목적이 있다.The present invention has been made to solve the above problems, and an object thereof is to provide a method of manufacturing a compact nozzle of the cone (cone) type.

본 발명은 상기 목적을 달성하기 위하여 반도체기판의 중심부위가 뾰족한 마운틴 모양이 되도록 상기 반도체기판을 패터닝하는 제1공정, 상기 반도체기판상에 제1절연막과 표면평탄화용 제2절연막을 차례로 증착하는 제2공정, 상기 제1절연막의 중심부위에 초소형 홀이 형성될때까지 상기 제2절연막과 제1절연막을 식각한 뒤 상기 반도체 기판을 제거하는 제3공정으로 이루어짐을 특징으로 한다.The present invention provides a first step of patterning the semiconductor substrate so as to form a pointed mountain shape on the center of the semiconductor substrate in order to achieve the above object, the first step of depositing a first insulating film and the second insulating film for surface planarization on the semiconductor substrate And a second step of etching the second insulating film and the first insulating film until the micro hole is formed in the center of the first insulating film, and then removing the semiconductor substrate.

이하, 첨부된 도면을 참조하여 본 발명을 상세히 설명한다.Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

제2도는 본 발명의 초소형 노즐 제조방법을 나타낸 공정 순서도로써 그에 대한 설명은 다음과 같다.2 is a process flowchart showing a method for manufacturing a micro nozzle according to the present invention.

먼저, 불순물이 얇게 도핑된 Si(적자구조 100)기판(1)상에 감광막(2)을 증착하여 상기 Si기판(1)상의 중심부위만 감광막이 남도록 노광 및 현상한다(제2도(a)).First, the photoresist film 2 is deposited on the Si (deficit structure 100) substrate 1 thinly doped with impurities, and the photoresist film is exposed and developed so that only the photoresist film remains on the center portion of the Si substrate 1 (FIG. 2A). ).

상기 공정후 BHF를 사용하여 과잉 언더 컷(Under Cut) 식각을 실시하여 상기 Si기판(1)의 중심부위가 뾰족한 마운틴(mountain) 형태로 형성되도록 한 후 상기 감광막(2)을 제거하고(제2도(b)) SiO2(3)을 450Å정도로, Si3N4(4)를 1600 내지 2500Å정도로 차례로 증착한다(제2도(c)).After the process, excess under cut etching is performed using BHF so that the upper portion of the center of the Si substrate 1 is formed in a sharp mountain shape, and then the photosensitive film 2 is removed (second). (B)) SiO 2 (3) is deposited at about 450 GPa and Si 3 N 4 (4) is sequentially deposited at about 1600 to 2500 GPa (FIG. 2 (c)).

상기 Si3N4(4)상에 표면이 평탄하도록 SOG(Spin On Glass)막(5)을 코팅(Coating)하고 상기 SOG막(5)이 제거될 때까지 에치백(etch back)을 실시하여 Si기판(1)상에 증착된 SiO2(3) 중심의 뾰족부위가 노출되도록 한다(제2도(d)).Coating a SOG (Spin On Glass) film 5 so that the surface is flat on the Si 3 N 4 (4) and performing etch back until the SOG film 5 is removed. The pointed portion of the center of SiO 2 (3) deposited on the Si substrate 1 is exposed (FIG. 2 (d)).

상기 공정후 BHF를 이용한 습식식각을 하여 상기 Si기판(1)과 SiO2(3)를 제거하면 상기 Si3N4(4)의 중심부위에 미세한 직경을 갖는 홀(6)이 형성된다(제2도(e)).When the Si substrate 1 and the SiO 2 (3) are removed by wet etching using BHF after the process, holes 6 having a fine diameter are formed on the center portion of the Si 3 N 4 (4). (E)).

이때 상기 Si3N4(4)에 형성된 홀(6)의 직경은 에치백을 실시할시 상기 SiO2(3) 중심의 뾰족부위가 어느정도 노출될때까지 에치백을 하느냐에 따라 1㎛나 0.Ol㎛까지도 가능하고 또한 홀(6)의 형태는 Si기판(1)과 SiO2(3)를 제거함에 의해서 (화산)원뿔형 즉, 대략 콘 형태로 형성되게 된다.At this time, the diameter of the hole 6 formed in the Si 3 N 4 (4) is 1㎛ or 0.Ol depending on whether or not to etch back until the pointed portion of the center of the SiO 2 (3) is exposed when performing the etch back The hole 6 can be formed in a shape of a (volcano) cone, that is, a substantially cone, by removing the Si substrate 1 and SiO 2 (3).

상기한 바와 같이 본 발명은 초소형의 직경을 갖으며 홀 형태가 너비가 넓다가 좁아지는 이상적인 콘 모양의 Si3N4노즐을 제조함으로써 의학기기나 고정밀 전자부품등 정밀을 요하는 제품에 적용하여 사용할 수 있는 효과가 있다.As described above, the present invention manufactures an ideal cone-shaped Si 3 N 4 nozzle having a very small diameter and wide and narrow hole shape, and is used to apply to products requiring precision such as medical devices or high-precision electronic components. It can be effective.

Claims (10)

반도체 기판(1)의 중심부위가 뾰족한 마운틴 모양이 되도록 반도체기판(1)을 패터닝하는 제1공정, 상기 반도체 기판(1)상에 제1절연막과 표면평탄화용 제2절연막(5)을 차례로 증착하는 제2공정, 상기 제1절연막의 중심부위에 초소형 홀이 형성될때까지 상기 제2절연막(5)과 제1절연막을 식각한 뒤 반도체기판(1)을 제거하는 제3 공정으로 이루어짐을 특징으로 하는 초소형 노즐 제조방법.The first step of patterning the semiconductor substrate 1 so as to form a pointed mountain shape on the center of the semiconductor substrate 1, the first insulating film and the second surface insulating film 5 for surface planarization are sequentially deposited on the semiconductor substrate 1. And a third process of etching the second insulating film 5 and the first insulating film and removing the semiconductor substrate 1 until a micro hole is formed in the center of the first insulating film. Micro nozzle manufacturing method. 제1항에 있어서, 상기 제1공정은 반도체 기판(1)상에 감광막(2)을 증착하여 반도체 기판(1)의 중심부위의 감광막(2)만 남도록 노광 및 현상하는 제1과정, 상기 감광막(2)을 마스크로 하여 상기 반도체 기판(1)에 과잉 언더 컷 식각을 실행하는 제2과정으로 이루어짐을 특징으로 하는 초소형 노즐 제조방법.The method of claim 1, wherein the first step is to expose and develop the photoresist film 2 on the semiconductor substrate 1 so that only the photoresist film 2 on the central portion of the semiconductor substrate 1 remains. And (2) a second process of performing excess undercut etching on said semiconductor substrate (1). 제1항에 있어서, 상기 제1절연막은 다층구조로 형성함을 특징으로 하는 초소형 노즐 제조방법.The method of claim 1, wherein the first insulating layer has a multilayer structure. 제1항에 있어서, 상기 제2절연막(5)은 SOG로 형성함을 특징으로 하는 초소형 노즐 제조방법.The method of claim 1, wherein the second insulating layer (5) is formed of SOG. 제1항에 있어서, 상기 제3공정에서 행한 제1절연막의 홀형성을 위한 식각 방법은 에치백 식각법을 특징으로 하는 초소형 노즐 제조방법.The method of claim 1, wherein the etching method for forming the hole of the first insulating layer in the third process comprises an etch back etching method. 제1항에 있어서, 상기 제3공정에서 행한 반도체 기판(1) 제거방법은 습식 식각에 의한 것임을 특징으로 초소형 노즐 제조방법.The method of manufacturing a micro nozzle according to claim 1, wherein the method of removing the semiconductor substrate (1) performed in the third step is by wet etching. 제2항에 있어서, 상기 제2과정의 과잉 언더 컷 식각을 실행하는 방법은 습식 식각에 의한 것임을 특징으로 하는 초소형 노즐 제조방법.The method of claim 2, wherein the method for performing the excess under cut etching of the second process is by wet etching. 제3항에 있어서, 상기 다층구조로된 제1절연막은 상기 반도체기판(1)상에 SiO2를 증착하고 상기 SiO2상에 Si3N4을 증착하여 형성함을 특징으로 하는 초소형 노즐 제조방법.The method of claim 3, wherein the multilayer insulating first insulating layer is formed by depositing SiO 2 on the semiconductor substrate 1 and by depositing Si 3 N 4 on the SiO 2 . . 제6항에 있어서, 상기 습식 식각에 사용되는 용액은 BHF로 실행함을 특징으로 하는 초소형 노즐 제조방법.7. The method of claim 6, wherein the solution used for the wet etching is performed with BHF. 제7항에 있어서, 상기 습식 식각에 사용되는 용액은 BHF로 실행함을 특징으로하는 초소형 노즐 제조방법.8. The method of claim 7, wherein the solution used for the wet etching is performed by BHF.
KR1019930003781A 1993-03-12 1993-03-12 Method for fabricating micro nozzle KR100301800B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930003781A KR100301800B1 (en) 1993-03-12 1993-03-12 Method for fabricating micro nozzle

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930003781A KR100301800B1 (en) 1993-03-12 1993-03-12 Method for fabricating micro nozzle

Publications (2)

Publication Number Publication Date
KR940021129A KR940021129A (en) 1994-10-17
KR100301800B1 true KR100301800B1 (en) 2001-11-30

Family

ID=37529181

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930003781A KR100301800B1 (en) 1993-03-12 1993-03-12 Method for fabricating micro nozzle

Country Status (1)

Country Link
KR (1) KR100301800B1 (en)

Also Published As

Publication number Publication date
KR940021129A (en) 1994-10-17

Similar Documents

Publication Publication Date Title
JPH02266517A (en) Manufacture of semiconductor device
KR100301800B1 (en) Method for fabricating micro nozzle
KR0165399B1 (en) Fine patterning method
JPH0458167B2 (en)
KR101176541B1 (en) dielectric layer patterning method, dielectric layer prepared using the method and display device adopting the same
KR100342480B1 (en) Method for fabricating 3-dimensional silicon wafer by using thin-film layer having different depth
KR910006544B1 (en) Process for forming contact hole
JP2001210578A (en) Method for manufacturing stencil masking
KR100379514B1 (en) Method for Fabricating of X-Ray Mask
JPH0294439A (en) Manufacture of semiconductor device
KR930006133B1 (en) M.o.s. contact hole forming method
JPS63202034A (en) Manufacture of semiconductor device
KR19990081061A (en) Method of forming fine contact hole in semiconductor device
JPH0621432A (en) Manufacture of semiconductor device
KR100382548B1 (en) Method for Fabricating of Semiconductor Device
KR100382547B1 (en) method for forming capacitor semiconductor device
JPS62234333A (en) Formation of mask for processing fine groove
KR20020052842A (en) Method for forming photoresist pattern through plasma ashing
JPH0582510A (en) Manufacture of protective film for semiconductor device
KR20020066588A (en) Method for forming the contact hole in semiconductor device
JPH0677179A (en) Formation method of opening and manufacture of semiconductor device
KR20010066291A (en) Method for incarnating fineness hole size using taper a thin film
KR19990003876A (en) How to make a cell projection mask
KR19980054470A (en) Photoresist pattern formation method
KR20030045574A (en) Method of metal electrode patterning

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20090526

Year of fee payment: 9

LAPS Lapse due to unpaid annual fee