KR100266327B1 - A using method of shelf voltage in surface discharge - Google Patents

Abstract

PURPOSE: A shelf voltage using method of a PDP(Plasma Panel Display) TV during a planar discharge is provided to regenerate a clean image during a sustain discharge by generating data writing and erasing exactly in a cell. CONSTITUTION: When a planar discharge is carried out to a data electrode(10), a first sustain electrode(18), a scan electrode(20) and a second sustain electrode(22), a data is exactly written in the scan electrode(20). A somewhat low shelf voltage is input to the first sustain electrode(18) and the second sustain electrode(22). A scan pulse, that drops a scan voltage to 0 when data writing and erasing are performed in the presence of the scan voltage, is input to the scan electrode(20). Data writing or erasing is performed exactly at one side of the scan electrode(20).

Description

How to Use Shelf Voltage for CD Discharge

The present invention relates to a method of using a shelf voltage during surface discharge of a PDTV television to accurately write data on the scan electrode among the electrodes performing scanning and sustain on the same surface during the surface discharge of the PDTV system.

In general, PD electrodes are classified into a DC type, an AC type, and a hybrid type in which a DC type and an AC type are combined. In the DC type PD, the electrode is directly exposed to the discharge plasma. In the case of the AC type PD, the electrode is indirectly coupled with the plasma through the dielectric. This difference shows a difference in the discharge phenomenon, and in the case of an alternating current type, charged particles formed by the discharge accumulate in the dielectric layer. In other words, electrons are accumulated by the dielectric layer on the positively charged electrode, and ions are accumulated in the dielectric layer on the negatively charged electrode. The potential formed through this phenomenon is called a wall potential, and since the wall potential is formed to be opposite in polarity to the potential applied from the outside, when the wall potential is started again, the potential applied to the gas in the cell decreases. Therefore, when a sufficiently large wall potential is formed, the discharge is erased because the potential applied to the gas decreases below the potential at which discharge can be maintained. However, if the potential of the potential applied to the external electrode is applied after the wall potential is formed, the potential by the wall potential and the externally applied potential are added to discharge even when a low externally applied potential is applied. This phenomenon is called a memory function. In the case of an AC PD, it has a memory function effect due to the wall potential accumulated in the dielectric. In other words, the dielectric in the cell where the discharge was previously formed may cause the charged particles to form a wall potential at the dielectric, thereby causing the discharge at a lower voltage than in a cell without the wall potential.

The drive operation of the PD, which has the data electrode, the scan electrode and the sustain electrode structure, uses a row driving method using strong nonlinearity characteristics of gas discharge, unlike a cathode ray tube in which an electron gun sequentially scans pixel by pixel. Also, PD is generally driven by a continuous pulse with a constant voltage, and the gradation display is implemented by digital rather than analog. However, since gas discharge usually requires a relatively high voltage of several hundred volts, the video signal is amplified and driven.

In addition, the driving operation of the PDIP is classified into the following three types.

Firstly, an addressing or writing mode is a driving operation required for initial discharge formation. In the case of the He + Xe and Ne + Xe penning mixtures generally used in PDP, a potential of 240 to 280 volts is applied. The AC type composed of the third electrode reduces the high current caused by the parasitic capacitor caused by the sustain electrode and the dielectric, and adopts a driving method that separates the selection operation from the holding operation.

Secondly, a sustain operation is a driving operation in which the discharge is maintained by a sustain pulse having a lower voltage than the selection pulse by using the memory function characteristic of the gas discharge. In the case of a bridge PD, a memory drive effect by wall charge is used, and a memory driving method capable of separating a selection operation and a maintenance operation by using the memory function is for realizing a high quality display device of a large PD. Provided is a driving method capable of operating without high luminance in high gradation display.

Third, the erasing mode is an operation mode for erasing the discharge. In the case of an AC type PD, the discharge is formed at a low voltage in a period of neutralizing the wall charge so that the wall charge is not sufficiently formed or the erase has a short pulse width. The wall charge is removed by applying a pulse to prevent the wall charge from reaching a steady state.

Meanwhile, the PDP driving technology is an active light emitting display device in which ultraviolet rays generated from gas discharge excite a fluorescent film to implement an image. That is, since the PDP uses ultraviolet light emission by gas discharge as a light source corresponding to each pixel, the driving circuit merely functions to form or erase gas discharge for each pixel in order to implement a display image. The driving circuit includes an image signal and signal control unit for each pixel constituting an image, and a high speed high voltage switching control unit that can form or eliminate ultraviolet rays generated from each pixel.

In addition, the row driving method refers to a method of simultaneously driving one line of cathode rays. That is, because of the nonlinearity, if a scan pulse is applied to one cathode line and then a data pulse is applied to all the lines of the anode line, the voltage between the selected cathode line and the anode line does not reach the discharge formation voltage. Compared with the horizontal resolution, the brightness and efficiency are improved. In other words, the row driving method is an essential method for driving a large display, and PDPD is advantageous for large size because it has a stronger non-linearity characteristic than other display elements.

1 is a cross-sectional view of a conventional three-electrode PDPC. As shown in FIG. 1, the cross-sectional view of a three-electrode PDPC is composed of a data electrode 10, a scan electrode 12, a sustain electrode 14, and a dielectric layer 16, to form the capacitively coupled discharge. The two electrodes of the scan electrode 12 and the sustain electrode 14 are disposed on the dielectric layer 16.

In the conventional driving waveform, the potential of the mode 0 volt is applied to the scan electrode 12 and the sustain electrode 14 at the time of data writing and erasing of the conventional PDPC, and according to the voltage applied to the data electrode 10. The written data can be written to either the scan electrode 12 or the sustain electrode 14.

Therefore, there is a problem that accurate data writing is not performed since it becomes a half-selected cell or a non-selected cell during sustain discharge. Accordingly, an object of the present invention is to provide a method of using a shelf voltage for writing and erasing during a surface discharge of a PDTV which accurately writes data to the scan electrode among the electrodes performing the scan and sustain on the same surface during the surface discharge. To provide.

On the other hand, the technical idea of the present invention for achieving the above object is to arrange the sustain 1 (S1) electrode and the sustain 2 (S2) on the dielectric layer, and the scan electrode (Y) between them. Then, while a voltage lower than the data write voltage is applied to the electrodes of S1 and S2 and a scan voltage is applied to the Y electrode, a scan pulse that drops the scan voltage to 0 volts (V) when data writing is performed. By applying, the Y electrode is written and erased in one place.

1 is a cross-sectional view showing a three-electrode method of a conventional PD cell.

2 is a block diagram showing the overall configuration of the PDTV system.

3 is a cross-sectional view of an electrode of a PD cell according to the present invention.

4 is a voltage waveform diagram of each electrode according to the present invention;

<Code description of main part of drawing>

1: AV unit 2: ADC unit

3: memory section 4: data interface section

5: timing controller unit 6: address driving IC

7: holding / scanning driving IC 8: high voltage driving circuit

9: AC / DC converter 80: composite video signal processor

90: digital data processing unit 100: PD drive unit

10: data electrode (Z) 12, 20: scan electrode

14 sustain electrode 16 dielectric layer

18: Sustain Electrode 1 (S1) 22: Sustain Electrode 2 (S2)

24: scan voltage 26: shelf voltage of sustain electrode 1

28: Shelf voltage of sustain electrode 2 30: Data write voltage

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. 2 is a block diagram for explaining the overall operation of the PDTV system.

PDTV generally includes a composite video signal processing unit 80 composed of an AV unit 1 which analog-processes a composite video signal received through an antenna and provides the ADC unit with digital data by sampling the input analog composite video signal. The ADC unit 2 for processing the digital video data, the memory unit 3 for rearranging the digital image data input from the composite video signal processing unit 80, and the rearranged digital image data and receive data suitable for PDG gradation processing. A digital data processing unit 90 comprising a data interface unit 4 for producing a stream, a timing controller unit 5 for generating and supplying a main clock for controlling the memory unit 3 and the entire system, and Address drive for receiving data stream from the data interface unit 4 and supplying data to the plasma panel for gradation processing And a PD drive unit 100 composed of an IC 6 and a sustain / scan drive IC 7.

The AV unit 1 receives an NTSC composite signal, separates the analog R, G, and B signals from the horizontal and vertical synchronization signals, obtains an APL (Average Picture Level) corresponding to the average value of the luminance signal Y, and then converts the ADC unit ( Supply to 2). This APL is used to improve the brightness of the PDTV system. NTSC composite video signal is interlaced scanning method, and one frame is composed of two fields of Odd / Even, horizontal synchronous signal is about 15.73KHZ, and vertical synchronous signal is about 60Hz. The audio signal separated from the composite video signal is output through the audio amplifier directly to the speaker. The ADC unit 2 receives analog R, G, and B signals as inputs, converts them into digital data, and outputs them to the memory unit 3. At this time, the digital data is converted into images for improving the brightness of the PDTV system. Data. The ADC section 2 is divided into an amplifier section, a clock generation section, a sampling area setting section, and a data mapping section. The amplifying section in the ADC section 2 amplifies the analog R, G, B, and APL signals to a signal level suitable for quantizing, and converts the horizontal and vertical synchronization signals into a constant phase and outputs them. The clock generator must use a clock that is synchronized with the input synchronization signal. To this end, the clock generator generates clocks using phase locked loops (PLLs). PLL is controlled by PD (Phase Detector), VCXO (Voltage Controlled Crystal Oscillator), and LF (Loop Filter) which outputs the control voltage of the phase of input synchronous signal and the phase of the variable pulse output from the loop. It consists of a VCXO that oscillates and a Programmable Counter (PC) that divides the output of the VCXO and outputs a phase comparison pulse to output a clock synchronized with the input synchronization signal. If the clock synchronized to the input synchronization signal is not used, the vertical linearity of the displayed image is not guaranteed. In addition, the sampling area is set to a vertical position and a horizontal position. The vertical position section is a pulse for setting only the line with the image information among the input signals, and the horizontal position section is a pulse for setting only the time with the image information among the lines set to the vertical position. The vertical position section and the horizontal position section are the standards for sampling. At this time, a total of 480 lines are selected, each with 240 lines in the Odd / Even field. The horizontal position section should be such that there can be at least 853 sampling clocks per selected line. The data mapping unit of the ADC unit 2 maps the R, G, and B data output from the A / D converter into data corresponding to the brightness characteristics of the PDP. In other words, by arranging several vector tables in the ROM and selecting the optimal vector table according to the digitized APL data, the R, G, B, and R: It is provided to the memory unit 3 in the form of B data.

In the memory unit 3, it is necessary to reconstruct the video data of one field into a plurality of subfields for the PDP gradation process and then rearrange from the most significant bit MSB to the least significant bit LSB. In addition, since the image data input by the interlaced scanning method is converted to the progressive scanning method and displayed, an area for storing one frame of image data is required. In other words, two frame memories capable of storing one piece of image data (853 x 3 (RGB) x 480 x 8 Bits x 10 Mbit) are provided, and they alternately perform write and read operations in units of frames. The video data can be stored and displayed continuously. Furthermore, one field is divided into several subfields in the PD tone gradation process, and the image data corresponding to each subfield is read in sequence and provided to the data interface unit 4.

The data interface unit 4 temporarily stores R, G and B data from the memory unit 3 and provides the data in the form of data required by the address driver IC 6. It is required to be arranged in accordance with the R, G, and B pixel arrangements output from the memory section 3 and supplied to the address driver IC 6, which is why the data interface section 4 is required.

The case where the display size is 853 x 3 (R, G, B) x 480 mode in the above-described PDTV system is explained. In the data interface unit 4, one line (853 x 3 = 2559 bits) is used. ) Data must be temporarily stored, but since the continuity of data must be guaranteed (input and output are performed simultaneously), a temporary storage location of 2 lines (2559 x 2 = 5118 bits) is required. That is, a total of 24 bits of data of 8 bits each of R, G, and B from the memory unit 3 are sequentially inputted (107 times) into the first temporary storage area (24 bits x 107 = 259 bits), and the same time interval As a result, the data of one previous line of the second temporary storage area is output in the form of a data stream required by the address driver IC 6. Such input / output operations occur alternately in the first and second temporary storage areas. That is, after the first temporary storage area operates in the input mode and the second temporary storage area operates in the output mode, the operation is then reversed. When outputting the temporarily stored image data to the address driver IC 6, the data interface unit 4 provides one bit of data and a total of 48 bits of image data to each driver IC in the form of a stream. When data is input to the driver IC in turn (75 times) in this manner, when shifted in parallel, one line (48 bits x 75 = 3600 bits) of image data is loaded into the address driver IC 6. Since this process should be the same as the input mode operation time of other temporary storage areas, the input mode should be operated at twice the frequency of the output mode. The high voltage drive circuit section 8 is required by the address, scan, and sustain driver IC in combination with the DC high voltage supplied from the AC / DC converter section 9 in accordance with various logic level control pulses output from the timing controller section 5. A control pulse is generated to drive the PD. In addition, the data stream provided from the data interface unit 4 to the address driver IC 6 is also raised to an appropriate voltage level to enable selective writing on the panel. As described above, the driving method for the PD gradation process first divides one field (60 Hz) into several subfields (64 gradations: 6 subfields, 256 gradations: 8 subfields), and then divides image data corresponding to each subfield. Through the address driving IC 6, writing is performed in units of lines. In the subfield to which MSB data is written, the number of discharge sustain pulses is reduced in order from the LSB subfield, and gradation processing is performed in the total discharge sustain period according to a combination thereof. In addition, the driving sequence of all subfields repeats operations of full screen writing and erasing, data writing, and discharge holding (screen display). This process is outlined as follows.

AC PD is an operation mode for erasing discharge. In the case of AC PD, the discharge is formed at a low voltage in the period of neutralizing the wall charge so that the wall charge is not sufficiently formed, or the erasure pulse having a short pulse width is applied to the wall charge to the normal state. To prevent the wall charges from being reached, i.e. to erase the wall charges remaining in the selected (discharged) pixels after sustaining the discharge of the previous subfield, the walls on all the pixels for a short period of time that are not visible. The entire screen erasing process of initializing PD by writing charges and then erasing all the remaining wall charges by erasing all pixels;

In the case of the penning mixture gas of He + Xe and Ne + Xe, which are generally used in PDP, a potential of 240V to 280V is applied. In the case of AC, the third electrode is introduced to reduce the high current caused by the sustain electrode in the surface discharge form and the parasitic capacitor caused by the dielectric, and adopts a driving method that separates the selection operation from the sustain operation. In practical applications, a selective operation is performed in which wall charges are selectively formed on a pixel to be discharged by writing the corresponding data line by line through the data writing electrode while shifting the scanning pulse sequentially from 1 to 480 to the line scanning electrode. In addition, the data writing and scanning process, which is a driving operation required for initial discharge formation,

In the case of the AC PD, the memory driving method that can separate the selection operation and the holding operation by using the memory function effect by the wall charge. A driving method which can operate without deterioration of brightness also in the display element of is provided. In practice, a sustain pulse is alternately applied between the discharge sustain driver electrode and the line scan electrode to start and sustain the discharge of the pixel on which the wall charge is formed. At this time, since the unwritten pixel is affected by the written peripheral pixels, and there is a possibility of causing an error discharge, a discharge sustaining process is performed in which a small erase is performed every time the sustain pulse is applied to ensure accurate discharge.

The AC / DC converter 9 generates and supplies the high voltage required to combine the electrode driving pulses with the AC power as an input, and the DC voltage required by each part constituting the other PDTV system.

The present invention is to implement a clean screen by accurately writing data on the scan electrode of the electrode performing the scan and sustain during the surface discharge of the plasma panel of the PD system as described above, Figure 3 is an electrode cross-sectional view of the PD PC according to the present invention to be.

The electrode cross-sectional view of the PD cell includes a data electrode (Z: 10), a sustain first electrode (S1: 18) and a sustain second electrode (S2: 22), and a scan electrode (Y) disposed between the sustain one electrode and the sustain two electrode. 20) and a dielectric layer 16 for forming a capacitively coupled discharge. When data write and erase voltages are applied to the data electrode Z: 10, the + electrode and the data electrode 10 are placed on the data electrode 10. The lower dielectric layer 16 has a -pole, a -pole on the sustain 1 electrode 18, a + pole on the scan electrode 20, a -pole on the sustain 2 electrode 22, and a sustain 1 disposed on the dielectric 16. A positive electrode is generated around the electrode 18 and the sustain two electrode 22.

Therefore, when data writing or data erasing voltage is applied to the data electrode 10 as described above, data writing and erasing is performed to either of the opposite electrodes, that is, the sustain 1, 2 electrodes 18 and 22 and the scan electrode 20. I don't know.

4 is a voltage waveform diagram of each electrode according to the present invention, reference numeral 24 of FIG. 4 is a scan voltage (V _scan ), 26 is a shelf voltage (V _shelf ) of the sustain electrode 1, and 28 is a shelf voltage of the sustain electrode 2. (V _shelf ) and No. 30 denotes the data write voltage V _z .

According to the present invention, a voltage lower than the data write voltage (V _z : 26) to the sustain electrode 1 (18) and the sustain electrode 2 (22) of FIG. _{When shelves} 26 and 28 are applied, and data writing and erasing are performed in a state where scan voltage V _scan 24 is applied to scan electrodes Y: 20, that is, when data voltage V _d is applied. With the scan pulse 24a dropping the scan voltage 24 to zero volts, the data is written or erased to one of the scan electrodes 20 so that accurate data writing and erasing is performed. On the other hand, the relationship between the scan voltage, the data write voltage and the shelf voltage is V _scan &gt; V _z &gt; V _shelf .

As described above, in the present invention, writing and erasing of data accurately occurs within a desired cell, whereby a clean screen can be reproduced during sustain discharge.

Claims (2)

Surface discharge with the data electrode 10 arranged on one surface of the electrode, and the sustain electrode 1 18, the scan electrode 20 and the sustain electrode 2 22 arranged on the same surface of the data electrode 10 facing the data electrode 10. In the method of writing data correctly to the scan electrode 20, A shelf voltage application process for applying the chef voltages 26 and 28 to the sustain electrode 1 18 and the sustain electrode 2 22 lower than the data write voltage 30; Applying a scan pulse to the scan electrode 18 to drop the scan voltage 24 to zero volts when data writing and erasing is performed while the scan voltage 24 is applied; A method of using a shelf voltage when discharging a surface of a PDTV, characterized in that the data writing or erasing process is performed so that the writing and erasing of the scan electrode 20 is performed accurately by the scanning pulse application process. The method of claim 1, wherein the scan voltage (V _scan : 24), the data write voltage (V _z : 30) and the shelf voltage (V _shelf : 26, 28) is V _scan &gt; V _z &gt; V _shelf . Method of using Shelf voltage during surface discharge of PDTV.

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