KR100264877B1 - Method for manufacturing soi type isolation structure of semiconductor device - Google Patents

Abstract

PURPOSE: A method for manufacturing a semiconductor device with an SOI type isolation region is provided to form an isolation region of SOI(Silicon On Insulator) type having the same effect as an SOI wafer by adding a unit process to a silicon wafer. CONSTITUTION: An isolation region(12) is formed on a semiconductor substrate(10) in order to define an active region of a device. Oxygen ions are implanted on a whole face of the semiconductor substrate(10). A buried insulating layer(14') connected vertically with the isolation region(12) is formed in an inside of the substrate(10) corresponding to an active region by performing a thermal oxidation process. The first well(15) of P-type is formed on the first active region. The second well(16) of N type is formed on the second active region. A MOS transistor including a gate electrode(17), a spacer(18), and a source/drain junction layer(19) is formed on the first and the second wells(15,16).

Description

Method for manufacturing semiconductor device having SOI type device isolation region

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device having a silicon on insulator (SOI) type isolation region, and in particular, an SOI type for securing an SOI type isolation region on a normal silicon wafer. A method for manufacturing a semiconductor device having an element isolation region.

SOI is a technology for more effectively separating semiconductor devices formed on a silicon substrate, which is more resistant to light and more resistant to high supply voltage than Junction Isolation. Also, in general, the number of processes required by the device formed on the SOI silicon wafer is smaller than the device formed on the bulk silicon wafer, and the capacitive coupling between the devices formed in the IC chip is reduced. In addition to the above-described characteristics, the device formed on the SOI silicon wafer has a large threshold slope, and even when a low voltage is applied to 2V, there is little deterioration in electrical characteristics. In addition, high yield can also be expected because it can be manufactured in a structure that is less likely to cause device degradation.

However, the SOI-type wafer described above has a problem in that the additional cost is required to obtain the same device isolation function as that of the SOI on the silicon wafer because the wafer is more expensive than the normal silicon wafer.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device having an SOI type device isolation region capable of obtaining the same effect as an SOI wafer by adding a simple unit process to a silicon wafer to solve the above problems of the prior art. It is.

1A to 1D are flowcharts illustrating a method of manufacturing a semiconductor device having an SOI type isolation region according to an exemplary embodiment of the present invention.

2A to 2F are flowcharts illustrating a method of manufacturing a semiconductor device having an SOI type isolation region according to another exemplary embodiment of the present invention.

* Description of the symbols for the main parts of the drawings *

10, 20: silicon substrate

12, 22: device isolation region

14 ', 24: buried insulation layer

15, 32: P-type well

16, 28: N-type well

17, 34: gate electrode

18, 36: spacer

19, 38: source / drain junction layer

In order to achieve the above object, the present invention comprises the steps of forming a device isolation region for defining the active region of the device on the semiconductor substrate; Ion implanting oxygen in front of a substrate by a distance of the device isolation region thickness; And forming a buried insulating layer vertically connected to the device isolation region in the substrate corresponding to the active region by performing a thermal oxidation process.

In the manufacturing method of the present invention, before the step of performing the thermal oxidation process to form the buried insulating layer, a first conductivity type well is formed by ion implanting a first conductivity type impurity at a low concentration into the first active region of the substrate. Doing; And ionically implanting a second conductivity type impurity into the second active region of the substrate to form a second conductivity type well.

In the manufacturing method of the present invention, after the step of forming the buried insulating layer, forming a first conductivity type well by ion implantation of the first conductivity type impurities in the first active region of the substrate at low concentration; And ionically implanting a second conductivity type impurity into the second active region of the substrate to form a second conductivity type well.

According to the manufacturing process of the present invention, after forming the device isolation region on the silicon wafer, after implanting oxygen into the active region, the buried insulating layer connected to the device isolation region by oxidizing the oxygen injected by the thermal oxidation process vertically As a result, the same device isolation effect as that of the SOI wafer can be obtained.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1A to 1D are flowcharts illustrating a method of manufacturing a semiconductor device having an SOI type isolation region according to an exemplary embodiment of the present invention.

Referring to this, the device isolation process of the present invention performs a conventional LOCOS (LOCal Oxidation Silicon) process on the silicon substrate 10 to define an active region of the device as shown in FIG. 1A. ), That is, a field oxide film is formed. Next, as shown in FIG. 1B, an ion implantation process is performed to reach oxygen on the entire surface of the substrate 10 by a distance of the thickness of the device isolation region 12. As a result, a region 14 in which oxygen is injected to the depth of the device isolation region 12 is formed in the active region of the substrate 10.

Then, a thermal oxidation process is performed to oxidize the region 14 injected with oxygen. As a result, a buried insulating layer 14 ′ vertically connected to the device isolation region 12 is formed in the substrate 10 corresponding to the active region.

Subsequently, the P-type well 15 is formed by ion implanting B (Boron) at a low concentration into the first active region of the substrate 10, for example, a portion where the N-type MOS transistor is to be formed. In this case, the well process may be performed while masking the entire surface except for the first active region of the substrate. The N-type well 16 is formed by ion-implanting P (Phosphrus) at a low concentration in the second active region of the substrate 10, for example, a portion where the P-type MOS transistor is to be formed. In this case, the well process may be performed while masking the entire surface of the substrate 10 except for the second active region. Then, a conventional transistor fabrication process is performed to form gate electrodes 17, spacers 18, and source / drain junction layers 19 on the P-type wells 15 and N-type wells 16, as shown in FIG. 1D. The branches form a MOS transistor.

According to the manufacturing process of the present invention, after forming a conventional device isolation region, oxygen is ion implanted into the active region, and a thermal oxidation process is performed to form a buried insulation layer connected to the device isolation region, and then the well of the semiconductor device is formed. Therefore, the same device isolation effect can be obtained by the buried insulating layer and the device isolation region formed on the silicon wafer without using the SOI wafer.

2A to 2F are flowcharts illustrating a method of manufacturing a semiconductor device having an SOI type isolation region according to another exemplary embodiment of the present invention.

Referring to this, the device isolation process of the present invention performs a conventional locus process on the silicon substrate 20 to form the device isolation region 22, that is, the field oxide film, to define the active region of the device as shown in FIG. 2A. do. Next, as illustrated in FIG. 2B, an ion implantation process is performed to reach oxygen on the entire surface of the substrate 20 by a distance of the thickness of the device isolation region 22. As a result, a region 24 in which oxygen is injected to the depth of the device isolation region 22 is formed in the active region of the substrate 20.

Subsequently, as shown in FIG. 2C, the photoresist pattern 26 is formed on the entire surface of the substrate 20 except for the portion where the P-type MOS transistor is to be formed, and ion implanted with low concentration of P as the first conductivity type. To form an N-type well 28. Then, the photoresist pattern 26 is removed.

Subsequently, as shown in FIG. 2D, after forming the photoresist pattern 30 on the entire surface of the substrate 20 except for the portion where the N-type MOS transistor is to be formed, B is ionized at low concentration. The P wells 32 are formed by implantation, and the photoresist pattern 30 is removed.

Thereafter, a thermal oxidation process is performed on the resultant N-type wells 28 and P-type wells 32 to oxidize the region 24 into which oxygen is injected. By the oxidation process, a buried insulating layer 24 ′ perpendicularly connected to the device isolation region 22 is formed in the substrate 20 of the active region as shown in FIG. 2E.

Then, a conventional transistor fabrication process is performed to form the gate electrode 34, the spacer 36, and the source / drain junction layer 38 in the P type well 32 and the N type well 28, respectively, as shown in FIG. 2F. The branches form a MOS transistor.

According to the manufacturing method of the present invention, after forming the device isolation region, oxygen is ion implanted into the active region, and after forming the semiconductor device well, a buried insulating layer connected to the device isolation region vertically is formed by a thermal oxidation process. By the buried insulating layer and the device isolation region, the same device isolation effect as that of the SOI wafer can be obtained.

The present invention is not limited to the above embodiments, and it is apparent that many modifications are possible by one of ordinary skill in the art within the technical idea of the present invention.

The present invention achieves the same device separation effect as that of an SOI wafer by adding a unit process to a silicon wafer instead of an SOI wafer which has a high cost.

Claims (3)

Forming a device isolation region in the semiconductor substrate for defining an active region of the device; Ion implanting oxygen in front of a substrate by a distance of the device isolation region thickness; And And forming a buried insulating layer vertically connected to the device isolation region in the substrate corresponding to the active region by performing a thermal oxidation process. The method of claim 1, wherein before the thermal oxidation process is performed to form a buried insulation layer, Forming a first conductivity type well by ion implanting a first conductivity type impurity into the first active region of the substrate at low concentration; And And ion-implanting a second conductivity type impurity at a low concentration into the second active region of the substrate to form a second conductivity type well. The method of claim 1, wherein after forming the buried insulation layer, Forming a first conductivity type well by ion implanting a first conductivity type impurity into the first active region of the substrate at low concentration; And And ion-implanting a second conductivity type impurity at a low concentration into the second active region of the substrate to form a second conductivity type well.

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