KR100259284B1 - Data line structure of lcd - Google Patents

Data line structure of lcd Download PDF

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KR100259284B1
KR100259284B1 KR1019920011763A KR920011763A KR100259284B1 KR 100259284 B1 KR100259284 B1 KR 100259284B1 KR 1019920011763 A KR1019920011763 A KR 1019920011763A KR 920011763 A KR920011763 A KR 920011763A KR 100259284 B1 KR100259284 B1 KR 100259284B1
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data line
layer
line
transparent electrode
liquid crystal
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KR1019920011763A
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KR940003077A (en
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김종성
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구본준
엘지.필립스엘시디주식회사
론 위라하디락사
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Abstract

PURPOSE: A data line structure of a liquid crystal display device is provided to prevent the short of line and to achieve a low resistance by enlarging the effective line width of a data line. CONSTITUTION: A data line structure of a liquid crystal display device comprises a glass substrate(1). A gate insulating layer(2) including an SiNx layer and a conductive channel layer(3) including n+a-Si:H layer are sequentially formed on the glass substrate(1). Two lines, in which an SiNx layer(4) and a doped α-Si layer(5) are stacked, are formed on the n+a-Si:H layer. An ITO electrode(6), which is a transparent electrode, is formed on two lines such that a concave and convex portion is formed on two lines. A data line(7) including CrAl is formed on the concave and convex portion of two lines.

Description

액정표시장치의 데이타라인 구조Data line structure of liquid crystal display

제1도는 종래의 액정표시장치의 데이타라인 구조 단면도1 is a cross-sectional view of a data line structure of a conventional liquid crystal display device.

제2도는 본 발명 제1실시예의 데이타라인 구조 단면도2 is a cross-sectional view of a data line structure according to the first embodiment of the present invention.

제3도는 본 발명 제2실시예의 데이타라인 구조 단면도3 is a cross-sectional view of a data line structure according to the second embodiment of the present invention.

제4도는 본 발명 제3실시예의 데이타라인 구조 단면도4 is a cross-sectional view of a data line structure according to the third embodiment of the present invention.

제5도는 제4도의 데이타라인 구조 평면도5 is a plan view of the data line structure of FIG.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 유리기판 2, 4 : SiNx층1: glass substrate 2, 4: SiNx layer

3 : n+a-Si:H층 5 : 도핑된 α -Si층3: n + a-Si: H layer 5: doped α-Si layer

6 : ITo전극 7 : CrAl6: ITo electrode 7: CrAl

본 발명은 액정표시장치의 데이타라인 구조에 관한 것으로 특히 데이타라인의 유효선폭을 개선시킨 것에 관한 것이다.The present invention relates to a data line structure of a liquid crystal display device, and more particularly, to an improvement in the effective line width of a data line.

종래의 액정디스플레이용 TFT의 구조를 제1도를 참조하여 설명하면 다음과 같다.The structure of a conventional liquid crystal display TFT is described with reference to FIG.

종래의 데이타라인 구조는 유리기판(1) 위에 게이트 절연막인 SiNx(2)이 형성되고 그 위에 전도체널막인 n+a-Si:H층(3)과 절연막인 SiNx층(4)과, 도핑된 α-Si층(5)과 투명전극인 ITO(Indium Tin oxide)전극(6)이 차례로 형성되고 투명전극(6) 위에 데이타라인 Cr-Al(7)이 형성된 구조이다.In the conventional data line structure, the gate insulating film SiNx (2) is formed on the glass substrate (1), the n + a-Si: H layer (3) as the conductive channel film, the SiNx layer (4) as the insulating film, and doped thereon. The α-Si layer 5 and the indium tin oxide (ITO) electrode 6, which is a transparent electrode, are formed in this order, and the data line Cr-Al (7) is formed on the transparent electrode 6.

여기서 데이타라인 아랫층인 ITO전극(6)이 데이타라인 폭보다 넓은 단일라인 구조로 되어 있다.Here, the ITO electrode 6, which is the lower layer of the data line, has a single line structure wider than the data line width.

이와 같은 구조는 유리기판(1) 위에 형성되는 게이트라인과 데이타라인의 크로스 오버(cross over) 부분에서 스텝 커버리지(Step Coverage)를 좋게하여 그 부분에서의 단선을 줄여주고 게이트와 데이타라인간의 쇼트(Short)를 막아주는 역할을 한다.Such a structure improves step coverage at the cross over portion of the gate line and the data line formed on the glass substrate 1, thereby reducing disconnection at the portion and shorting the gate and the data line. Short) prevents.

그러나 이와 같은 종래의 액정표시장치의 데이타라인 구조에 있어서는, 데이타라인의 길이에 대한 선폭이 작기 때문에 데이타라인의 저항이 증가하게 되는 원인이 되어 TFT어에이의 고밀도화를 위한 선폭 감소 및 대면적화를 위한 데이타라인의 길이 증가에 큰 제약 조건이 된다.However, in the data line structure of the conventional liquid crystal display device, since the line width with respect to the length of the data line is small, the resistance of the data line is increased, thereby reducing the line width and the large area for the high density of the TFT array. This is a big constraint on increasing the length of a data line.

더우기 데이타라인의 좁은 선폭 및 길이 증가는 데이타라인의 단선에 취약하여 차세대는 물론 현재의 TFT어레이 제작에도 가장 큰 불량의 원인이 되고 있다.Moreover, the narrow line width and length increase of the data line are vulnerable to disconnection of the data line, which is the biggest cause of defects in the next generation as well as the current TFT array fabrication.

즉, 데이타라인 아랫층이 단일 라인으로 평탄하게 형성되어 그 위에 데이타라인이 형성됨으로 해서 기판에서 오는 스트레스 및 외부에서 오는 스트레스가 수 μm폭의 데이타라인에 집중되고 데이타라인 패턴 형성을 위한 포토레지스트(Photo regist) 패턴은 평탄한 메탈라인 위에 올라가기 때문에 제조공정 중 포토레지스트 패턴이 달리되어 단선 불량을 초래하는 등의 문제점이 있다.That is, since the lower layer of the data line is formed as a single line and the data line is formed thereon, the stress from the substrate and the stress from the outside are concentrated on the data line of several μm width and the photoresist for forming the data line pattern The regist) pattern is raised on the flat metal line, so that the photoresist pattern is different during the manufacturing process, resulting in disconnection defects.

본 발명은 이와 같은 문제점을 해결하기 위해 안출한 것으로써 데이타라인의 유효선폭을 늘려 저저항화하고 단선불량을 방지하는데 그 목적이 있다. 이와 같은 목적을 달성하기 위한 본 발명은 데이타라인의 아랫층을 평탄한 단일라인으로 하지 않고, 더블(double)라인으로 패턴하여 요곡이 진 아랫층에 데이타라인을 형성하여 데이타라인의 구조적 안정화를 이룬 것이다. 이와 같은 본 발명을 첨부된 도면을 참조하여 보다 상세히 설명하면 다음과 같다.The present invention has been made to solve such a problem, and its object is to increase the effective line width of the data line to reduce the resistance and prevent disconnection defects. The present invention for achieving the above object is to form a data line on the lower layer of the concave-convex pattern by forming a double line rather than a flat single line to achieve a structural stabilization of the data line. When described in more detail with reference to the accompanying drawings, the present invention as follows.

제2도는 본 발명 제1실시예의 액정디스플레이용 TFT의 데이타라인 구조도로써, 유리기판(1) 위에 게이트절연막인 SiNx층(2)과 전도채널막인 n+a-Si:H(3)이 차례로 형성되고 상기 n+a-Si:H층(3) 위에 절연막인 SiNx층(4)과 도핑된 α-Si층(5)이 적층된 2개의 라인이 형성된다.2 is a data line structure diagram of a liquid crystal display TFT according to the first embodiment of the present invention, in which a SiNx layer 2 as a gate insulating film and n + a-Si: H (3) as a conductive channel film are sequentially formed on the glass substrate 1. Two lines are formed on the n + a-Si: H layer 3 in which an SiNx layer 4 as an insulating film and a doped α-Si layer 5 are stacked.

그리고 2개의 라인에 걸쳐 요곡이 지도록 투명전극인 ITo전극(6)이 형성되고 요곡부위에 데이타라인인 CrAl(7)이 형성된다.Then, the ITo electrode 6, which is a transparent electrode, is formed on the two lines so that the valleys are formed, and the CrAl (7), which is a data line, is formed on the valleys.

또한 제3도는 본 발명 제2실시예의 액정디스플레이용 TFT의 데이타라인 구조도로서, 유리기판(1) 위에 게이트 절연막인 SiNx(2)과 전도채널막인 n+a-Si:H층(3)과 절연막인 SiNx층(4)이 차례로 형성되고, SiNx층(4)위에 도핑된 α-Si층(5)을 더블라인으로 형성하고 더블라인의 도핑된 α-Si층(5)위와 일측 측면에 걸쳐 도핑된 α-Si층(5) 더블라인 사이가 요곡이 지도록 투명전극인 ITo전극(6)이 형성되고 투명전극(3) 위와 사이에 걸쳐 데이타 라인인 CrAl(7)이 형성된다.3 is a data line structure diagram of a liquid crystal display TFT according to a second embodiment of the present invention, in which a gate insulating film SiNx (2) and a conductive channel film n + a-Si: H layer (3) An SiNx layer 4 as an insulating film is formed in turn, and a doped? -Si layer 5 formed on the SiNx layer 4 is formed in a double line, and on the doped? -Si layer 5 of the double line and on one side thereof. The ITo electrode 6, which is a transparent electrode, is formed so that the double line of the doped? -Si layer 5 is curved, and the CrAl, which is a data line, is formed on and between the transparent electrode 3.

제4도는 본 발명 제3실시예의 액정디스플레이용 TFT의 데이타라인 구조도이고 제5도는 제4도의 평면도로써, 유리기판(1) 위에 게이트절연막인 SiNx층(2)과 전도채널막인 n+a-Si:H층(3), 절연막인 SiNx층(4), 도핑된 α-Si층(5)이 차례로 형성되고 상기 도핑된 α-Si층(5) 위에 요곡을 이루도록 투명전극인 ITo전극(6)이 더블라인으로 형성되고 더블라인의 투명전극 위와 사이에 걸쳐 데이타라인인 CrAl(7)이 형성된다.4 is a plan view of a data line of a liquid crystal display TFT according to a third embodiment of the present invention, and FIG. 5 is a plan view of FIG. 4, in which a gate insulating film SiNx layer 2 and a conductive channel film n + a- are formed on the glass substrate 1; The Si: H layer 3, the SiNx layer 4 as an insulating film, and the doped α-Si layer 5 are sequentially formed, and the ITo electrode 6 as a transparent electrode is formed so as to bend on the doped α-Si layer 5. ) Is formed as a double line, and a data line CrAl (7) is formed over and between the transparent electrodes of the double line.

여기서 제5도는 (b)는 쓰루-홀-타입Thru-hole Type)의 경우 평면도로써 데이타라인 아랫층을 단일라인으로 하고 이층을 쓰루-홀-타입(Thru-hole Type)의 경우 평면도로써 데이타라인 아랫층을 단일라인으로 하고 이층을 쓰루-홀 타입으로 할 수 있는 것을 설명하고 있다.5 is a plan view in the case of the through-hole type, and the lower layer of the data line is a single line, and the second layer is the plan view in the case of the through-hole type, the lower layer of the data line. It explains that can be made into a single line and the second layer can be through-hole type.

이상에 설명한 바와 같이 본 발명의 액정디스플레이용 TFT의 데이타라인 구조에 있어서는 데이타라인 아랫층이 요곡을 이루게 하여 데이타라인을 패터닝함으로써 스트레스에 의한 데이타라인의 오픈(open)현상을 막을 수 있고, 데이타라인 형성을 위한 포토레지스트 패턴의 접착성을 높이 에칭에 의한 오픈 형상을 막을 수 있을 뿐만 아니라 데이타라인의 유효선폭을 증가시켜 데이타라인의 저저항화를 이룰 수 있는 등의 효과가 있다.As described above, in the data line structure of the liquid crystal display TFT of the present invention, the data line is patterned by forming a lower layer of the data line to prevent the open phenomenon of the data line due to stress, thereby forming the data line. The adhesiveness of the photoresist pattern for preventing not only prevents the open shape by etching, but also increases the effective line width of the data line, thereby reducing the resistance of the data line.

Claims (7)

액정디스플레이용 박막트랜지스터(TFT)에 있어서 데이타라인과 게이트 절연막 사이에 있는 데이타라인 아랫층의 패턴이 요곡을 이루도록 하여 그 위에 데이타라인이 형성되게 함을 특징으로 하는 액정표시장치의 데이타라인 구조.A thin film transistor (TFT) for liquid crystal display, wherein the pattern of the lower layer of the data line between the data line and the gate insulating film is curved so that the data line is formed thereon. 제1항에 있어서, 데이타라인 아랫층이 패턴이 쓰루-홀 패턴임을 특징으로 하는 액정표시장치의 데이타라인 구조.The data line structure of a liquid crystal display device according to claim 1, wherein the lower layer of the data line has a through-hole pattern. 제1항에 있어서, 데이타라인 아랫층이 패턴을 더블라인 패턴을 함을 특징으로 하는 액정표시장치의 데이타라인 구조.The data line structure of a liquid crystal display device according to claim 1, wherein the lower layer of the data lines has a double line pattern as a pattern. 기판 위에 일정한 간격을 갖고 평행하게 형성되는 더블라인의 반도체층;A double-line semiconductor layer formed parallel to the substrate at regular intervals; 상기 반도체층과 반도체층 사이의 기판에 걸쳐 형성되는 투명전극;A transparent electrode formed over the substrate between the semiconductor layer and the semiconductor layer; 상기 투명전극 위에 형성되는 금속층을 포함하여 구성됨을 특징으로 하는 액정표시장치의 데이타라인 구조.And a metal layer formed on the transparent electrode. 제4항에 있어서,The method of claim 4, wherein 상기 투명전극이 더블라인의 반도체층 각각에 형성되어 더블라인으로 형성됨을 특징으로 하는 액정표시장치의 데이타라인 구조.And the transparent electrode is formed on each of the semiconductor layers of the double line to form a double line. 제5항에 있어서,The method of claim 5, 투명전극은 반도체층과 반도체층 일측의 기판위에 걸쳐 형성됨을 특징으로 하는 액정표시장치의 데이타라인 구조.A transparent electrode is formed over the semiconductor layer and the substrate on one side of the semiconductor layer data line structure of the liquid crystal display device. 기판 위에 형성되는 반도체라인;A semiconductor line formed on the substrate; 상기 반도체라인의 모서리 부분에 더블라인으로 형성되는 투명전극;A transparent electrode formed as a double line at a corner of the semiconductor line; 상기 투명전극과 투명전극 사이의 반도체 라인에 걸쳐 형성되는 금속층을 포함하여 구성됨을 특징으로 하는 액정표시장치의 데이타라인 구조.And a metal layer formed over the semiconductor line between the transparent electrode and the transparent electrode.
KR1019920011763A 1992-07-02 1992-07-02 Data line structure of lcd KR100259284B1 (en)

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