KR100256300B1 - Input signal detection circuit in the lcd - Google Patents

Abstract

PURPOSE: A circuit for detecting an input signal of an LCD(liquid crystal display device) is provided to protect the LCD system, and to prevent the loss of electric power energy. CONSTITUTION: A circuit for detecting an input signal of an LCD consists of a transfer detection part(10), an input signal detection part(20), and a control signal generating part(30). The transfer detection part comprises a first flipflop for inputting an input signal applied form the outside, a second flipflop for detecting an output of the first flipflop, and an exclusive OR gate for detecting a transfer detection signal of the input signal. The input signal detection part comprises a detection signal generating device(21), and a detecting device(22). The control signal generating part comprises a master clock signal counting device(31), a reset signal generating device(32), and a check signal generating device(33).

Description

Input signal detection circuit of liquid crystal display device

The present invention relates to a liquid crystal display device, and more particularly, to an input signal detection circuit of a liquid crystal display device for detecting the presence or absence of an input signal.

In the conventional TFT-LCD, the presence or absence of an input signal was detected using a pull-up method using a pull-up resistor and a pull-down method using a pull-down resistor as shown in FIG. When the input signal SIN coming through the input terminal 1 does not come in, a high or low signal is generated using the pull-up or pull-down resistor 2 to detect the presence or absence of the input signal.

However, the conventional method of detecting the presence or absence of an input signal by using a pull-up or pull-down method is, when a digital signal having a certain period is applied as an input signal, whether the input signal is a high signal or when no input signal is input. It was not possible to distinguish whether it was a high signal by a pullup.

Therefore, in the case of a digital signal that is applied aperiodically while a check circuit is required in a section where the input signal is low, it is difficult to detect the presence or absence of the input signal using the pull-up or pull-down method described above.

The present invention is to solve the problems of the prior art as described above, and to provide an input signal detection circuit of a liquid crystal display device for easily detecting the presence or absence of an input signal.

Another object of the present invention is to provide an input signal detection circuit of a liquid crystal display device capable of detecting a normal signal among various types of input signals.

Another object of the present invention is to provide an input signal detection circuit of a liquid crystal display device capable of reducing power consumption by turning down the liquid crystal display device when there is no input signal by detecting the presence of an input signal.

Another object of the present invention is to provide an input signal detection circuit of a liquid crystal display device capable of protecting the liquid crystal display device by turning off the liquid crystal display device when an unnecessary input signal is input.

1 is an input signal detection circuit diagram of a general liquid crystal display device.

2 is a block diagram of an input signal detection circuit of a liquid crystal display device according to an embodiment of the present invention.

3 is a detailed circuit diagram of the input signal detection circuit of FIG.

4 is an operation timing diagram of the input signal detection circuit of FIG.

<Explanation of symbols for main parts of drawing>

10: transition detector 20: input signal detector

30: control signal generator 21: detection signal generating means

22: detection means 31: counting means

32: reset signal generating means 33: check signal generating means

In order to achieve the above object, the present invention is an input signal detection circuit of a liquid crystal display device for detecting the presence of an input signal applied from the outside, the transition of the input signal in synchronization with the master clock to detect the master clock clock signal A first flip flop for inputting an input signal applied from the outside, a second flip flop for inputting the output of the first D flip-flop using the master clock as a clock signal, and the first and second flip flops A transition detection unit comprising an exclusive ora gate which outputs a transition detection signal of an input signal using two outputs; Detection signal generation means for generating an input signal presence detection signal by inputting an input signal transition detection signal from the transition detection unit for checking the signal output from the transition detection unit according to an input check signal to detect the presence or absence of an input signal from the outside. And an input signal detector comprising a detection means for checking an input signal presence detection signal generated from the detection signal generation means by a check signal generated from the control signal generator and outputting an input signal presence detection signal; Counting means for counting the master clock signal to generate a reset signal for detecting the presence or absence of an input signal and an input check signal by counting the master clock; Reset signal generating means for inputting the output of the counting means to generate a reset signal to the input signal detector, and inputting the output of the counting means to generate a check signal for checking the presence or absence of an input signal to the input signal detector. It is characterized in that an input signal detection circuit of a liquid crystal display element including a signal generation section comprising a check signal generation means is provided.

In the exemplary embodiment of the present invention, the detection signal generating means of the input signal detecting unit is a high voltage supply voltage applied as an input, and detects the presence or absence of an input signal as an output using a transition detection signal output from the transition detecting unit as a clock signal. And a third flip flop for generating a signal.

In an embodiment of the present invention, the detection means of the input signal detection unit has an output of a third flip-flop as an input, and a check signal output from the control signal generator as a clock signal, and outputs an input signal presence detection signal as a clock signal. It consists of a fourth flip-flop to generate a.

In an exemplary embodiment of the present invention, the input signal detection unit checks an input signal presence detection signal generated by the input transition detection signal output from the transition detection unit by using a check signal before generating the reset signal to detect an input presence detection signal. Occurs.

In the embodiment of the present invention, the counting means of the control signal generating unit is configured with a counter that sets the master clock as a clock signal and an input signal transition detecting signal of the transition detecting unit as a clear signal, and sets the master clock as a clock signal. A predetermined value is counted to provide its output to the reset signal generation means and the check signal generation means, and is cleared by the transition detection signal applied from the transition detection portion.

In an embodiment of the present invention, the reset signal generating means inputs the output of the counting means and generates a signal for resetting the input signal detecting unit whenever the counter counts a predetermined value. Is made of.

In an embodiment of the present invention, the check signal generating means comprises a second end gate for generating an input signal checking signal to the input signal detecting unit before inputting the output of the counting means and counting a predetermined value. The check signal is applied to the input signal detector before the reset signal is generated from the reset signal generating means.

The input signal detection circuit of the liquid crystal display device of the present invention can not only detect the presence or absence of an input signal, but also detect the input of a normal signal and an abnormal signal even when an input signal is present. In this case, it is possible to prevent an abnormal input signal from being applied to the system.

EXAMPLE

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram of an input signal detection circuit of a liquid crystal display device according to an exemplary embodiment of the present invention, and FIG. 3 is a detailed circuit diagram of the input signal detection circuit of FIG. 2.

2 and 3, the input signal detection circuit of the liquid crystal display device includes a transition detector 10 which detects a transition of the input signal SIN in synchronization with the master clock MCLK, and the transition detection unit ( 10) input signal output from the input signal detecting unit 20 for detecting the presence or absence of an input signal, and counting the master clock (MCLK) to generate a reset signal and the input check signal to the input signal detection unit 20 Control signal generator 30 is made.

The transition detector 10 includes a first D flip-flop FD1 having the master clock MCLK as the clock signal CK and an input signal SIN applied from the outside as the input D, and the master clock MCLK. ) Is a clock signal CK and a second D flip-flop FD2 having the output Q of the first D flip-flop FD1 as an input D, and the first and second flip flops FD1 and FD2. 2) are made of an exclusive OR gate XOR for outputting a transition detection signal a of the input signal with two inputs.

The input signal detecting unit 20 inputs an input signal transition detecting signal a from the transition detecting unit 10 to generate a signal for detecting the presence or absence of an input signal, and the detection signal generating means ( And detection means 22 for checking the presence or absence of the input signal detected by the check signal generated by the control signal generator 30 and outputting the input signal presence detection signal DECT.

The detection signal generating means 21 of the input signal detecting unit 20 is supplied with a high power supply voltage VCC to the input D, and clocks the transition detecting signal a output from the transition detecting unit 10. It consists of a 3D flip-flop FD3 which generate | occur | produces the signal d for detecting the presence or absence of an input signal as an output Q as a signal.

The detection means 22 of the input signal detector 20 receives the output Q of the 3D flip-flop FD3 as the input D, and the check signal c output from the control signal generator 30. 4D flip-flop FD4 which generates a detection signal DECT as an output signal with the output signal Q as a clock signal.

The control signal generator 30 inputs a counting means 31 for counting the master clock signal MCLK and an output of the counting means 31 and resets the reset signal b to the input signal detector 20. Generating a check signal (c) for checking the presence or absence of an input signal to the input signal detection unit (20) by inputting the reset signal generating means (32) for generating a signal and the output of the counting means (31). Means 33.

The counting means 31 comprises a counter CNT which uses the master clock MCLK as a clock signal and sets the input signal transition detection signal a of the transition detection unit 10 as a clear signal. A predetermined value is counted using MCLK as a clock signal to provide its output to the reset signal generation means 32 and the check signal generation means 33, and the transition detection signal a applied from the transition detection portion 10. Cleared by).

The reset signal generating means 32 inputs the outputs Q0-Q7 of the counter CNT of the counting means 31 so that the input signal detecting unit 20 is counted whenever the counter CNT counts a predetermined value. It consists of a first end gate (AN1) for generating a signal (b) for resetting the detection signal generating means 22 of the.

The check signal generating means 33 inputs the outputs Q0-Q7 of the counter CNT of the counting means 31 so that the counter signal of the input signal detector 20 before the counter CNT counts a predetermined value. The detection means 23 is composed of a second end gate AN2 for generating a signal c for checking whether an input signal is present.

In this case, since one of the outputs Q0-Q7 of the counter CNT is inverted through the inverter IN, the check signal c is reset to the reset signal b. Is generated before the signal is applied to the input signal generator 20. The reset signal should be generated within one period of the input signal SIN.

Accordingly, in the input signal generator 20, the reset signal is detected by the detection means 22 through the input means for detecting the presence or absence of the input signal d generated by the input transition detection signal a output from the transition detection unit 10. Before the occurrence of (b), a check signal c is used to generate an input presence detection signal DECT.

The operation of the input detection circuit of the liquid crystal display device having the above configuration will be described with reference to FIGS. 4A to 4F.

In the present invention, the normal signal refers to an officially standardized signal required to drive a circuit, which is not a noise signal such as ripple in the early stage, and is horizontal or vertical required for driving a liquid crystal display, for example. Means a data (R, G, B) signal or a television signal.

First, the transition detector 10 for detecting a transition of the input signal inputs the input signal SIN as shown in FIG. 4A so that the input signal SIN changes whenever the state of the input signal SIN changes. Each time it changes from the low state or the low state to the high state, the transition detection signal a as shown in FIG. 4B is output.

That is, at the rising edge of the master clock MCLK, the first flip-flop FD1 outputs the input signal SIN to the output Q, and the second flip-flop FD2 is connected to the first flip-flop FD1. The output Q is used as an input D, and is output to the output Q at the rising edge of the master clock MCLK. Subsequently, the exclusive oragate XOR uses the outputs of the first flip-flops FD1 and FD2 as two inputs to output the transition detection signal a as shown in FIG. 4B to the input signal detector 20.

In the control signal generator 30, the master clock MCLK is counted through the counter CNT of the counting means 31 to output a predetermined value every predetermined period, and the reset signal generator 32 is an AND gate ( Each time the counter CNT outputs a predetermined value through AN1), a reset signal b as shown in FIG. 4C is generated at a predetermined cycle.

Before the reset signal generating means 32 generates the reset signal b at regular intervals through the AND gate AN1, the check signal generating means 33 is connected to the counter through the AND gate AN2. The input signal detector 20 generates a check signal c for inputting the output of the CNT and checking the presence or absence of an input signal as shown in FIG. 4D.

Therefore, the input signal detection unit 20 inputs the transition detection signal a output from the transition detection unit 10 through the detection signal generation unit 21, and when the transition detection signal a is input, the input signal detection unit 20 is input to FIG. 4E. As shown, an input signal presence detection signal d is generated, and is reset every time the reset signal b is applied.

The detection means 22 checks the input signal presence / absence detection signal d generated through the detection signal generation means 21 before the reset signal b is generated from the reset signal generation means 32. Checked using (c), the input signal detection signal DECT is generated as shown in FIG. 4F.

As described above, the input signal detector 20 uses the check signal c to detect the presence or absence of the input signal c after a predetermined time elapses after the input signal SIN is transitioned. By detecting the presence of an input signal, as shown in FIG. 4, if the input signal presence detection signal d is high at the rising edge of the check signal c, the input signal exists. A high state input signal detection signal DECT is outputted.

On the contrary, when the transition of the input signal is not detected because there is no input signal SIN, the transition detection signal a goes low as shown in FIG. 4A, and only the reset signal b is generated at a predetermined period. Therefore, as shown in FIG. 4D, the signal d for detecting the presence or absence of the input signal goes low. Therefore, at the rising edge of the check signal c, the detection means 22 outputs the low state input signal detection signal DECT indicating that there is no input signal.

Therefore, if there is an input signal, it continuously outputs the detection signal in the high state, and if there is no input signal or if it is not a normal signal, it outputs the low state signal, so that the system does not exist if the input signal SIN does not exist. To protect the system.

The input signal detection circuit of the present invention not only detects the presence or absence of an input signal, but also determines whether the input signal is present by prioritizing two signals when a normal signal (regular signal) and an abnormal signal (irregular signal) are present. It is also possible.

That is, priority is given by generating the reset signal and the check signal generated through the counter CNT and the AND gates AN1 and AN2 of the control signal generator 30 appropriately for the normal signal check or the abnormal signal check. It is also possible to determine.

As described above, the input signal detection circuit of the liquid crystal display device of the present invention can not only detect the presence or absence of an input signal, but also detect the input of a normal signal and an abnormal signal even when an input signal is present. If there is no or if there is an abnormal input signal by turning off the system can not only protect the system but also has the advantage of preventing power loss.

Claims (9)

In an input signal detection circuit of a liquid crystal display element for detecting the presence or absence of an input signal applied from the outside, a transition of the input signal is detected in synchronization with the master clock, and the input signal applied from the outside is inputted using the master clock as a clock signal. Transition of the input signal using the first flip flop, the second flip flop for inputting the output of the first D flip flop using the master clock as a clock signal, and the outputs of the first and second flip flops as two inputs. A transition detection unit comprising an exclusive ora gate for outputting a detection signal; Detection signal generation means for generating an input signal presence detection signal by inputting an input signal transition detection signal from the transition detection unit for checking the signal output from the transition detection unit according to an input check signal to detect the presence or absence of an input signal from the outside. And an input signal detector comprising a detection means for checking an input signal presence detection signal generated from the detection signal generation means by a check signal generated from the control signal generator and outputting an input signal presence detection signal; Counting means for counting the master clock signal and counting the master clock to generate a reset signal for detecting the presence or absence of an input signal and an input check signal to the input signal detection unit, and inputting an output of the counting means to input the input signal; A signal generator comprising a reset signal generating means for generating a reset signal to a detector and a check signal generating means for inputting the output of the counting means and generating a check signal for checking whether an input signal is present or not to the input signal detector. An input signal detection circuit of a liquid crystal display device, characterized in that. The detection signal generating means of the input signal detector is a high voltage power supply as an input, and outputs a signal for detecting the presence or absence of an input signal as an output using a transition detection signal output from the transition detector as a clock signal. An input signal detection circuit of a liquid crystal display device, comprising: a third flip-flop generated. The detection means according to claim 1, wherein the detection means of the input signal detector is applied with an output of a third flip-flop as an input, and generates a check signal output signal using a check signal output from the control signal generator as a clock signal. And an input signal detecting circuit of a liquid crystal display device. The signal detection unit of claim 1, wherein the input signal detection unit generates an input presence detection signal by checking an input signal presence detection signal generated by an input transition detection signal output from the transition detection unit by a check signal before generation of a reset signal. An input presence detection circuit of a liquid crystal display device, characterized in that. The counter of claim 1, wherein the counting means comprises a counter configured to set the master clock as a clock signal and an input signal transition detection signal of the transition detector as a clear signal, and count a predetermined value using the master clock as a clock signal. And an output signal to the reset signal generating means and the check signal generating means, wherein the output signal is cleared by a transition detection signal applied from the transition detection unit. 2. The apparatus of claim 1, wherein the reset signal generating means comprises a first end gate configured to input an output of the counting means and generate a signal for resetting the input signal detecting unit whenever the counter counts a predetermined value. An input signal detection circuit of a liquid crystal display device, characterized in that. The input detection circuit of a liquid crystal display device according to claim 1, wherein the reset signal is generated within one period of the input signal. The second signal generating apparatus of claim 1, wherein the reset signal generating unit of the check signal generating unit generates a signal for checking the presence or absence of an input signal before inputting the output of the counting unit and counting a predetermined value by the counter. An input signal detection circuit of a liquid crystal display device, characterized in that it comprises an AND gate. 2. The input signal detection circuit of the liquid crystal display device according to claim 1, wherein the check signal generating means applies a check signal to the input signal detecting unit before a reset signal is generated from the reset signal generating means.

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