KR940002463Y1 - Pulse detect circuit on pulsewith - Google Patents

Abstract

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Description

Pulse Detection Circuit Over Reference Pulse Width

1 is an overall block circuit diagram of a pulse detection circuit having a reference pulse width or more according to an embodiment of the present invention.

2 is a detailed circuit diagram of an effective pulse detection unit of a pulse detection circuit having a reference pulse width or more according to an embodiment of the present disclosure.

3 is an operation waveform diagram of a detection circuit having a reference pulse width or more according to an embodiment of the present invention.

* Explanation of symbols for main parts of the drawings

1: Pulse generator 2: Effective pulse detector

3: pulse counter part 4: electronic circuit

21: monostable multivibrator F / F: flip-flop

The present invention relates to a pulse detection circuit having a reference pulse width or more. More specifically, an effective pulse larger than the pulse width of the reference pulse width is detected from the pulse signal output from the pulse generator, so that the effective pulse is smaller than the reference value for a predetermined time. The present invention relates to a pulse detection circuit having a reference pulse width or more that can interrupt a pulse signal supplied to an electronic circuit.

A pulse is a flow of electricity with a very short duration, and the presence or absence of such a pulse corresponds to a digital signal, which can be used as a means of synchronizing signal or information transmission. Has been used.

Therefore, there have been many studies on the generation of pulses, and the technology for such a pulse generation circuit is described in the "Pulse generation circuit" of Korean Patent Application Publication No. 90-6540 (published date: September 7, 1990). And "Duty Cycle Variable Clock Generation Circuit" of Publication No. 90-6821 (published date: September 21, 1990).

The pulse signal output from such a pulse generating circuit is used as an input signal of many electronic circuits in an electronic device such as an information processing device or a communication device. Need a certain number.

If the pulse signal, which is an input signal of the electronic circuit, fails to provide a certain number of effective pulses greater than the reference pulse width to the electronic circuit within a predetermined time due to abnormal operation or noise of the pulse generator, the electronic circuit malfunctions. These malfunctions are often caused by fatal errors such as system down. In electronic devices such as information processing devices and communication devices, such fatal errors have been a disadvantage in reducing the reliability of the product.

An object of the present invention is to solve the above disadvantages, and detects how many effective pulses having a pulse width equal to or greater than a reference pulse width are input from the pulse signal input to the electronic circuit from the pulse generator. The present invention provides a pulse detection circuit having a reference pulse width or more that can determine whether normal operation is present.

Another object of the present invention is to prevent the malfunction of electronic circuits in advance by stopping the operation of electronic circuits when an effective pulse of more than a reference pulse width is not input from the pulse generator to prevent the malfunction of the electronic circuits in advance. The present invention provides a pulse detection circuit having a reference pulse width or more that can increase the reliability of an electronic device such as a communication device.

The structure of the present invention for achieving the above object is to use a pulse signal output from the pulse generator as an input signal, and to obtain a pulse signal having a pulse width corresponding to the difference between the input signal and the reference pulse width. Counting the number of input pulse signals by using an effective pulse detection unit for detecting an effective pulse signal having a pulse width larger than a reference pulse width from the above input signal by outputting the pulse signal output from the effective pulse detection unit as an input signal. A pulse counter unit for comparing the preset number with the output signal and outputting the result as an output signal, and an end for allowing the pulse signal output from the pulse generator unit to be supplied to the electronic circuit or cut off according to the output signal of the pulse counter unit. It consists of a gate (AND gate).

By the above configuration, the most preferred embodiment that can be easily implemented by those skilled in the art to which the subject innovation belongs will be described in detail with reference to the accompanying drawings.

1 is an overall block circuit diagram of a pulse detection circuit having a reference pulse width or more according to an embodiment of the present invention, and FIG. 2 is a detailed circuit diagram of an effective pulse detection unit of a pulse detection circuit having a reference pulse width or more according to an embodiment of the present invention. 3 is an operation waveform diagram of a pulse detection circuit having a reference pulse width or more according to an embodiment of the present invention.

As shown in FIG. 1, the configuration of a pulse detection circuit having a reference pulse width or more according to an embodiment of the present invention is a pulse generator 1 and an effective pulse having an input terminal connected to an output terminal of the pulse generator 1. And an input terminal connected to an output terminal of the detector 2, an output terminal of the effective pulse detector 2, and an output terminal of the pulse generator 1 and an output terminal of the pulse counter 3 A gate G1 and an electronic circuit 4 having an input terminal connected to an output terminal of the AND gate G1.

Also, as shown in FIG. 2, the configuration of the effective pulse detector 2 of the pulse detection circuit having a reference pulse width or more according to an embodiment of the present invention is a pulse signal that is an output signal of the pulse generator 1 as an input signal. NAND gates having an input terminal connected to the monostable multivibrator 21 and an output terminal Q1 of the monostable multivibrator 21 and an output terminal P of the pulse generator 1. A NAND gate Px having an input terminal connected to Px and an output terminal P of the pulse generator 1, and a clock terminal CLK connected to an output terminal of the NAND gate Px and having a pulse. D-type flip-flop (F / F) is connected to the output terminal (P) of the generator 1 is connected to the input terminal (D) and the clear terminal (CLR).

The monostable multivibrator 21 connects the output terminal P of the pulse generator 1 to the B input terminal (No. 5 pin) of the 74AHCT121 chip, and the / A1 and / A2 terminals (No. 3 and 4). Pin) to ground, connect capacitor Cx to Cext terminal (pin 10), and Rx / Cext terminal (pin 11) to the other terminal of capacitor (Cx) and resistor (Rx) connected to power supply (Vcc). By connecting to the other terminal of the

In the embodiment of the present invention, the above described monostable multivibrator 21 is constructed using a 74AHCT121 (Monostable Multvibrators with Schmitt-Trigger Inputs) chip, but the technical idea of the present invention is not limited thereto.

The operation of the pulse detection circuit of the reference pulse width or more according to the embodiment of the present invention by the above-described configuration is as follows.

When the power is applied, the pulse generator 1 outputs a pulse signal which is an input signal of the electronic circuit 4.

The effective pulse detector 2 connected to the input terminal at the output terminal of the pulse generator 1 uses a pulse signal that is an output signal of the pulse generator 1 as an input signal, and among the pulse signals, a reference pulse signal as an input signal. Thus, effective pulses larger than the pulse width set as the reference pulse width are detected from the pulse signals.

The detailed operation of the above-described effective pulse detection unit 2 will be described with reference to FIGS. 2 and 3 as follows.

After the power supply Vcc is applied and the pulse signal P, which is the output signal of the pulse generator 1, is input, the output terminal Q1 of the monostable multivibrator 21 of the effective pulse detector 2 is <Table> generates an output pulse with a pulse width of 0,7CxRx.

TABLE 1

74AHCT121 FUNCTION TABLE

H = HIGH Voltage level

L = LOW Voltage level

X = Don't care

↑ = LOW-to-HIGH transition

= one HIGH level output pulse

= one LOW level output pulse

Pulse width (Tw-out) = Cext Rext in2 = 0.7 Cext Rext

The output waveform of the output terminal Q1 of the monostable multivibrator 21 by the input pulse signal P input from the pulse generator 1 is shown in FIG.

The signal output from the output terminal Q1 of the monostable multivibrator 21 becomes an input signal of the NAND gate Px together with the output signal of the pulse generator 1, and the NAND gate Px The waveform of the output signal passed is shown in FIG.

The NAND gate Px outputs an output signal in a low state only when the input signals are all high, and outputs an output signal in a high state with respect to the combination of other input signals. Only when both the output signal P and the output signals of the monostable multivibrator 21 are in a high state, the output signal of the NAND gate Px is in a low state, and otherwise, it is in a high state.

The output signal of the NAND gate Px is input to the clock terminal CLK of the D-type flip-flop F / F, and the output signal P of the pulse generator 1 is the D-type flip-flop F. / F) is inputted to the clear terminal CLR and the input terminal D, and the output signal of the NAND gate Px at the output terminal Q2 of the D flip-flop F / F by the input signals. After the output signal P of the pulse generator 1 is output at the positive edge of the output signal P, the output signal of the pulse generator 1 becomes low when the output signal of the pulse generator 1 becomes low. .

As described above, the waveform of the output signal output from the output terminal Q2 of the D flip-flop FF is shown in FIG. The output signal of the output terminal Q2 of the D-type flip-flop FF is the output signal of the effective pulse detector 2.

As shown in FIG. 3, the output waveform Q2 of the effective pulse detector 2 uses the output signal P of the pulse generator 1 as an input signal and has a reference pulse width (tw = 0.7 Cext) among the input pulse signals. This waveform is the result of detecting pulses larger than Rext).

From the output waveform Q2 of the effective pulse detector 2 shown in FIG. 3, the number of input pulse signals larger than the reference pulse width and the input pulse width in the case of input pulses larger than the reference pulse width are determined. You can see the size of the subtraction.

The pulse counter unit 3 having an input terminal connected to an output terminal of the effective pulse detection unit 2 counts the number of pulse signals input for a predetermined time using the output signal of the effective pulse detection unit 2 as an input signal. After that, the result is compared with the number preset inside, and the result is output to the AND gate G1.

The AND gate G1 having an input terminal connected to an output terminal of the pulse counter unit 3 and an output terminal of the pulse generator unit 1 has an output signal of the pulse generator unit 1 and an output signal of the pulse counter unit 3. The output signal of the pulse generator 1 supplied to the electronic circuit 4 is controlled in accordance with the output signal of the pulse counter 3 using the signal as an input signal.

That is, when the output signal of the pulse counter unit 3 is in a high state, it is enabled so that the output signal of the pulse generator 1 is transmitted to the electronic circuit 4 as it is, and the output signal of the pulse counter unit 3 is In the low state, the output signal of the pulse generator 1 supplied to the electronic circuit 4 is blocked by being disabled so that the operation of the electronic circuit 4 is stopped.

As described above, in the embodiment of the present invention, by detecting the number of effective pulses having a pulse width equal to or greater than the reference pulse width from the pulse signal input from the pulse generator to the electronic circuit, it is possible to determine the normal operation of the pulse generator. It is possible to provide a pulse detection circuit having a reference pulse width or more with an effective effect. This effect of the present invention can be used to increase the reliability of an electronic device such as an information processing device or a communication device in which the electronic circuit is incorporated by preventing a malfunction of an electronic circuit to which an effective pulse of more than a reference pulse width is not input in advance. .

Claims (2)

In an electronic device which uses a pulse signal as an output signal as an output signal of a pulse generator, the pulse signal output from the pulse generator as an input signal, the pulse corresponding to the difference between the input signal and the reference pulse width. A valid pulse detection section for detecting an effective pulse signal having a pulse width larger than a reference pulse width among the above input signals by outputting a pulse signal having a width, and the pulse signal output from the effective pulse detection section as input signals. The pulse counter unit counts the number of pulse signals and compares them with a preset number, and outputs the result as an output signal, and a pulse signal output from the pulse generator unit is supplied to the electronic circuit or blocked according to the output signal of the pulse counter unit. And a pulse detection circuit having a reference pulse width or more, characterized in that the end gate is configured to allow an end gate. The method of claim 1, wherein the effective pulse detection unit is coupled to an input terminal (B) to an output terminal of the pulse generator, and when a pulse signal (P) is input from the pulse generator is synchronized with a constant reference pulse width ( Monostable multivibrator 21 for outputting pulse signal Q1 having tw), pulse signal Q1 input from said monostable multivibrator 21, and pulse signal P input from said pulse generator. NAND gate Px outputting the result of the negative logical multiplication and outputting it as an output signal, and the output signal of the NAND gate Px are used as the clock signal CLK, and the output signal P of the pulse generator is input. The pulse generating unit is used as a signal D and a clear signal CLR, and is reset by the pulse signal P input from the pulse generating unit after being operated by the output signal of the NAND gate Px. Entered from And a flip-flop (F / F) which detects a pulse signal having a pulse width equal to or greater than the reference pulse width tw among the pulse signals P and outputs as much as the output signal Q2. Pulse detection circuit with a reference pulse width or more.