KR100256261B1 - Method for fabricating semiconductor device - Google Patents

Abstract

PURPOSE: A method for manufacturing a semiconductor device is to remove a by-product of a dry-etching process using HF solution, thus to prevent damage of an insulating layer on the sidewall of a contact window. CONSTITUTION: A wafer is provided in which an insulating layer(35) is deposited on a conductive layer. The insulating layer is selectively etched to form a contact window(36) for exposing a certain portion of the surface of the conductive layer. On the surface of the conductive layer exposed in the contact window is formed a native oxide layer, which is then removed by an anisotropic dry etching. To remove a by-product of the dry etching process, a cleaning is carried out in HF solution diluted by pure water. To prevent damage of the insulating layer on the sidewall of the contact window, the cleaning is carried out in the diluted HF solution for 20 seconds or less.

Description

Semiconductor device manufacturing method {METHOD FOR FABRICATING SEMICONDUCTOR DEVICE}

TECHNICAL FIELD The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of forming a contact hole in a highly integrated semiconductor device.

BACKGROUND With the development of semiconductor manufacturing technology, semiconductor devices have been highly integrated, and design rules of semiconductor devices have been miniaturized. In this highly integrated semiconductor device, there are multilayer wirings formed of various kinds of conductive material layers, and these wirings are generally formed by patterning a conductive material by a photolithography method. In addition, an interlayer insulating layer is formed to electrically insulate between the conductive material layers having a multilayer structure, and the conductive material layers are electrically connected through a contact window to electrically connect the conductive material layers insulated by the interlayer insulating layer. The method of contacting is used.

1A to 1C illustrate a conventional bit line contact process in a DRAM manufacturing process, and look at the prior art and its problems.

First, FIG. 1A shows a device isolation film 2 defining an active region in a silicon substrate 1 and a gate wiring 3 and a source / drain junction 4 formed in a normal process in the active region. . Here, the source / drain junction 4 is formed by ion implantation, which is self-aligned by the spacer insulating film on the gate sidewall. Subsequently, as shown in FIG. 1B, the insulating layer 5 is formed on the entire surface, and then the etching is performed by selectively etching the insulating layer 5 so that the active region of the source / drain junction 4 is exposed to the air using a photolithography process. The bitline contact window 6 is formed.

The process of forming the contact window 6 will be described in more detail by forming a mask pattern for the etching barrier on the insulating layer 5 and exposing the source / drain junction 4 to the atmosphere by dry etching or wet and dry etching. Then, a cleaning process is performed to remove the native oxide film grown on the exposed source / drain junction 4 surface.

At this time, the cleaning process for removing the natural oxide film is a wet process, for example, using a hydrofluoric acid solution diluted with pure water.

Meanwhile, as the degree of integration of the semiconductor device increases, as shown in FIG. 1C, the distance between the bit line conductive layer 7 and the gate wiring 3 filled inside the contact window becomes very close. In the wet cleaning for removing the natural oxide film of the window, the sidewall insulating layer 5 of the contact window is also etched simultaneously, causing a problem of electrical separation (insulation) between the bit line conductive layer 7 and the gate wiring 3.

As described above, in forming a contact window, the contact window becomes wider in the process of performing a wet cleaning for removing the natural oxide film, and a short circuit occurs between the conductive layer and the other conductive layer embedded in the contact window. Problem occurs.

On the other hand, in order to reduce such a problem, when reducing the thickness of the oxide film etched by the natural oxide film cleaning process, the natural oxide film is not sufficiently removed, the contact resistance may increase or contact failure may occur. Therefore, as the degree of integration increases, the removal of the native oxide film inside the contact window by the conventional method causes a defect in the semiconductor device.

On the other hand, in order to avoid this, a dry etching method can be used in the process of removing the natural oxide film inside the contact window, in which case the above problem is solved to some extent, but again the subsequent process due to contamination by the by-products of the dry etching It is difficult to proceed. That is, when a by-product of dry etching remains inside the contact window, it may contaminate subsequent equipment and cause a problem of contaminating a semiconductor device.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method of manufacturing a semiconductor device for removing a natural oxide film in a contact window, to prevent an increase in the size of the contact window and at the same time to prevent an increase in contact resistance due to by-products.

1A-1C are process cross-sectional views illustrating a bit line contact process during a conventional DRAM fabrication process.

2A and 2B are bit line contact process diagrams according to an embodiment of the present invention.

3A and 3B illustrate a semiconductor manufacturing process diagram in accordance with another embodiment of the present invention.

* Explanation of symbols for main parts of the drawings

31 semiconductor substrate 32 device isolation film

33: gate wiring 34: source / drain junction

35 insulation layer 36 contact window

A semiconductor device manufacturing method of the present invention for achieving the above object comprises the steps of preparing a wafer covering the conductive layer with an insulating layer; Selectively etching the insulating layer to form a contact window exposing a predetermined portion of the surface of the conductive layer; Performing anisotropic dry etching to remove an oxide film naturally grown on the surface of the conductive layer exposed inside the contact window; And rinsing in hydrofluoric acid (HF) solution diluted with pure water in order to remove by-products generated during the dry etching.

As such, the present invention dry-etches the insulating layer to form a contact window, and then removes the natural oxide layer using anisotropic dry etching, and then removes the hydrofluoric acid solution with a large amount of pure water to remove the etching by-products remaining in the contact window. For example, the inside of the contact window is cleaned with a solution having a ratio of pure water and hydrofluoric acid of 100: 1 or more.

At this time, the difference from the prior art is that since the conventional oxide film must be removed by cleaning, it is necessary to clean more than a predetermined time, but the hydrofluoric acid cleaning in the present invention is not a cleaning for removing the natural oxide film, but a dry etching by-product. Since it is a cleaning for removal, it is possible to prevent loss of the insulating layer (oxide film) on the sidewall of the contact window by cleaning for a minimum time.

That is, in the conventional case, when cleaning the contact window using a hydrofluoric acid solution diluted to 100: 1, an etching of about 1 minute or more is required, but in the case of the present invention, a cleaning of 20 seconds or less is sufficient.

As a result, the present invention can continuously prevent anisotropic dry etching and wet cleaning for a short time to remove the natural oxide film and by-products, thereby preventing the loss of the sidewall of the contact window and the occurrence of insulation failure between different conductive layers. .

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

2A and 2B are bit line contact process diagrams according to an embodiment of the present invention. First, FIG. 2A shows a device isolation film 32 defining an active region in a silicon substrate 31, and a conventional process in the active region. Thus, the gate wiring 33 and the source / drain junction 34 are formed. Here, the source / drain junction 34 is formed by ion implantation, which is self-aligned by the spacer insulating film on the gate sidewall. Subsequently, as shown in FIG. 2B, the insulating layer 35 is formed on the entire surface, and then by selectively etching the insulating layer 35 so that the active region of the source / drain junction 34 is exposed to the air using a photolithography process. Bitline contact window 36 is formed. In this case, the insulating layer 35 may be formed by stacking a silicon oxide film including, for example, a silicon oxide film or a silicon nitride film.

Subsequently, the native oxide film grown on the surface of the source / drain junction 34 inside the contact window 36 is removed, and the insulating layer 35 formed on the sidewall of the contact window 36 and the spacer insulating film on the sidewall of the gate are not damaged. Anisotropic dry etching is performed to prevent damage. Subsequently, in order to remove the etch by-products remaining in the contact window 36, the contact window 36 with a large amount of diluted pure hydrofluoric acid (HF) solution, for example, an etching solution having a ratio of pure water and hydrofluoric acid of 100: 1 or more. In this case, since the cleaning time does not require removal of the natural oxide film, it is performed for a minimum time, for example, 20 seconds or less, so that the insulating layer 35 on the sidewall of the contact window 36 is lost. prevent.

3A and 3B are semiconductor manufacturing process diagrams according to another exemplary embodiment of the present invention, illustrating device fabrication in a peripheral circuit region of a memory device.

First, FIG. 3A illustrates a first conductive layer 43 formed on the first insulating layer 42 on the silicon substrate 41, a second insulating layer 44 formed on the entire surface thereof, and a second insulating layer ( After forming the second conductive layer 45 not overlapping with the first conductive layer 43 on the 44, the third insulating layer 46 is formed on the entire surface.

Subsequently, as shown in FIG. 3B, after forming a mask pattern for an etch barrier, the third insulating layer 46 is dry etched to form a first contact window 48 through which the second conductive layer 45 is exposed. At the same time, the third insulating layer 46 and the second insulating layer 44 are dry etched to form a second contact window 47 through which the first conductive layer 43 is exposed.

Subsequently, the natural oxide film grown on the surface of the second conductive layer 45 inside the first contact window 48 and the natural oxide film grown on the surface of the second conductive layer 43 inside the second contact window 47 are removed. In order to perform anisotropic dry etching, and then to remove by-products generated in the contact windows 47 and 48, a hydrofluoric acid (HF) solution diluted with a large amount of pure water, for example, a ratio of pure water and hydrofluoric acid 100: The cleaning is carried out in an etching solution of 1 or more. At this time, since the cleaning time is not necessary to remove the natural oxide film, the cleaning time is performed for a minimum time, for example, 20 seconds or less, to prevent the loss of the third or second insulating layers of the sidewalls of the first and second contact windows.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

Using the semiconductor device manufacturing method according to the present invention, it is possible to minimize the loss of the insulating layer generated on the side wall of the contact window and to prevent contamination by etching by-products. Therefore, in the highly integrated semiconductor device, poor insulation between adjacent wiring lines and poor contact inside the contact window can be eliminated.

Claims (7)

Preparing a wafer covering the conductive layer with the insulating layer; Selectively etching the insulating layer to form a contact window exposing a predetermined portion of the surface of the conductive layer; Performing anisotropic dry etching to remove an oxide film naturally grown on the surface of the conductive layer exposed inside the contact window; And Washing with hydrofluoric acid (HF) solution diluted with pure water in order to remove the by-products generated during the dry etching. A semiconductor device manufacturing method comprising a. The method of claim 1, And cleaning the diluted hydrofluoric acid solution for about 20 seconds or less to prevent the loss of the insulating layer on the sidewalls of the contact window. The method according to claim 1 or 2, The insulating layer is a semiconductor device manufacturing method, characterized in that a plurality of layers are laminated. Preparing a wafer covering the first conductive layer with the first insulating layer; Forming a second conductive layer on the first insulating layer, the second conductive layer not overlapping with the first conductive layer; Forming a second insulating layer on the entire surface; Selectively etching the second insulating layer to form a first contact window through which the second conductive layer is exposed, and simultaneously etching the second insulating layer and the first insulating layer to expose the first conductive layer. Forming a; Performing anisotropic dry etching to remove the naturally grown natural oxide film on the surface of the second conductive layer inside the first contact window and the surface of the second conductive layer inside the second contact window; And Washing with hydrofluoric acid (HF) solution diluted with pure water in order to remove the by-products generated during the dry etching. A semiconductor device manufacturing method comprising a. The method of claim 4, wherein To prevent the first and second insulating layers on the sidewalls of the first and second contact windows from being lost, cleaning the diluted hydrofluoric acid solution for about 20 seconds or less. . Forming a gate wiring on the semiconductor substrate and forming a source / drain junction inside the surface of the semiconductor substrate; Forming an insulating layer on the front surface; Selectively etching the insulating layer to form a contact window to expose the source / drain junction; Removing anisotropic dry etching of a naturally grown natural oxide film on the surface of the source / drain junction inside the contact window; And Washing with hydrofluoric acid (HF) solution diluted with pure water in order to remove the by-products generated during the dry etching. A semiconductor device manufacturing method comprising a. The method of claim 6, And cleaning the diluted hydrofluoric acid solution for about 20 seconds or less to prevent the loss of the insulating layer on the sidewalls of the contact window.

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