KR100237343B1 - Fabrication method for thin film actuated mirror array - Google Patents

Abstract

A method of manufacturing a thin film type optical path control apparatus capable of improving cantilever characteristics of an actuator is disclosed. The device is composed of an active matrix having M × N transistors embedded therein and a pad formed on one side thereof, and an actuator formed on the active matrix. The active matrix includes a protective layer, an etch stop layer, and a plug, and the actuator includes a lower electrode, a deformation portion, and an upper electrode. The method according to the present invention may facilitate the planarization of the sacrificial layer by performing a self-planarization of the deposited film simultaneously with the deposition without the need for a separate planarization process of the sacrificial layer by using a flowfill process. . Therefore, it is possible to prevent the characteristics of the cantilever from deteriorating due to the step of the active matrix portion.

Description

Manufacturing method of thin film type optical path control device

The present invention relates to a method for manufacturing Actuated Mirror Arrays (AMA), which is a thin film type optical path control device, and more particularly, a cantilever (actuator) of an actuator by self-planarizing a sacrificial layer using a flowfill process. The present invention relates to a method for manufacturing a thin film type optical path control device capable of improving cantilever characteristics.

In general, an optical path adjusting apparatus or an optical modulator capable of adjusting a light beam incident from a light source may be variously applied to optical communication, image processing, and information display apparatus. In general, such devices are classified into two types according to their optical properties.

One type is a direct view type image display device, such as a CRT (Cathode Ray Tube), and the other type is a projection type image display device, a liquid crystal display (LCD), an AMA, or a deformable mirror device (DMD). ) And the like. Although the CRT device has excellent image quality, there is a problem that the weight and volume of the device increase and the manufacturing cost increases as the screen is enlarged. On the other hand, the liquid crystal display (LCD) has an advantage in that the optical structure is simple to form a thin layer so that the weight of the device can be reduced and the volume can be reduced. However, the liquid crystal display has a disadvantage in that the efficiency is low enough to have a light efficiency of 1 to 2% due to the polarized light, the response speed of the liquid crystal material is slow, and the inside thereof is easily overheated. Therefore, an image display device such as AMA or DMD has been developed to solve the above problem. Currently, AMA has a light efficiency of 10% or more, compared to a DMD device having a light efficiency of about 5%.

The AMA is a device that can adjust the luminous flux so that each of the mirrors installed therein reflects the light incident from the light source at a predetermined angle, and the reflected light passes through a slit and is projected onto the screen to form an image. to be. Therefore, the structure and operation principle thereof are simple, and high light efficiency can be obtained compared to a liquid crystal display device or a DMD. In addition, the contrast is improved to obtain a bright and clear image. The mirrors built into the AMA are inclined by the electric field generated in correspondence with the slits. Therefore, the luminous flux incident from the light source is adjusted at a predetermined angle to form an image on the screen. In general, each actuator causes deformation in accordance with the electric field generated by the applied electric image signal and the bias voltage.

When the actuator causes deformation, each of the mirrors mounted on top of the actuator is inclined. Accordingly, the inclined mirrors can reflect light incident from the light source at a predetermined angle. Piezoelectric materials such as PZT (Pb (Zr, Ti) O ₃ ), or PLZT ((Pb, La) (Zr, Ti) O ₃ ) are used as actuators for driving the respective mirrors. In addition, the actuator can be configured as a warping material such as PMN (Pb (Mg, Nb) O ₃ ).

The optical path control device using AMA is largely classified into a bulk type and a thin film type. The bulk optical path control device is described, for example, in US Pat. Nos. 5,085,497 (issued to Gregory Um, et al.), 5,159,225 (issued to Gregory Um, et al.), 5,175,465 (issued to Gregory Um, et. al.) and the like. The bulk optical path control device cuts a thin layer of multilayer ceramic, mounts a ceramic wafer having a metal electrode therein in an active matrix including a transistor, and then processes it by sawing and mirrors on the top. It is done by installation. However, bulk devices require high precision in design and manufacture because the actuators must be separated by a sawing method, and the response speed of the deformation part is slow. Therefore, a thin film type optical path control apparatus that can be manufactured using a semiconductor manufacturing process has been developed.

Such a thin film type optical path control device is applied to a patent application No. 96-25323 (name of the invention: thin film type optical path control device having a large driving angle) filed by the present applicant on June 28, 1996, to the Korean Patent Office. Is disclosed.

FIG. 1 shows a plan view of the thin film type optical path adjusting device described in the preceding application, and FIG. 2 is a cross-sectional view taken along line A′A ′ of the thin film type optical path adjusting device shown in FIG. 1. As shown in FIGS. 1 and 2, the thin film type optical path adjusting device includes an active matrix having M × N (M, N is an integer) MOS transistors embedded therein and a drain 2 formed on one surface thereof. 1) and an actuator 3 formed on the active matrix 1.

The active matrix 1 on which the drain 2 is formed includes a protective layer 5 formed on the active matrix 1 and an etch stop layer 7 formed on the protective layer 5.

The actuator 3 includes a membrane 11, a lower electrode 13 formed on the membrane 11, a deformation part 15 formed on the lower electrode 13, and an upper part of the deformation part 15. An upper electrode 17 formed on the upper electrode 17, a mirror 21 formed on the upper electrode 17, and a lower electrode 13, a membrane 11, an etch stop layer 7, and an upper portion of the deformable portion 15. A via contact 19 is formed vertically through the protective layer 5 to the drain 2.

As shown in FIG. 1, the actuator 3 including the membrane 11 corresponds to the head of the letter 'A' with a mirror-shaped driving part rotated 90 ° in the clockwise direction, and a support part divided to both sides is provided. It has a shape corresponding to the leg portion of the letter 'A' rotated 90 ° clockwise. Therefore, the driving part of the membrane 11 is fitted to the support part split to both sides of the membrane of the adjacent actuator, and the driving part of the membrane of the adjacent actuator is fitted to the support part to both sides of the membrane 11.

In addition, referring to FIG. 2, the membrane 11 is in contact with an upper side of the active matrix 1 on which the etch stop layer 7 is formed, and the other side is connected to the active matrix 1 via an air gap 9. It is formed to be parallel to). The mirror 21 has a shape of a flat plate having a 'U' shaped groove in the center thereof, and the 'U' shaped groove is in contact with the upper electrode 17 and both sides thereof are horizontal to the upper electrode 17. Is formed.

The protective layer 5 is formed such that Phospho-Silicate Glass (PSG) has a thickness of about 1.0 to about 2.0 μm using a chemical vapor deposition (CVD) method.

The etch stop layer 7 is formed to have a thickness of about 1000 to 2000 Pa by using a low pressure chemical vapor deposition (Low Pressure CVD) method. The etch stop layer 7 prevents the protective layer 5 and the active matrix 1 from being etched.

The sacrificial layer 8 formed on the etch stop layer 7 has a phosphorus silicate glass having a high phosphorus (P) concentration by using an atmospheric pressure chemical vapor deposition (Atmospheric Pressure CVD) method of about 1.0 to 2.0㎛. It is formed to have a thickness of. At this time, since the flatness of the surface of the sacrificial layer 8 covering the surface of the active matrix 1 on which the etch stop layer 7 is formed is very poor, the surface is planarized by a chemical mechanical polishing (CMP) method.

The membrane 11 formed on the exposed etch stop layer 7 and on the sacrificial layer 8 has a nitride of about 1.0 to about 2.0 μm using low pressure chemical vapor deposition (LPCVD). It is formed to have a thickness.

The lower electrode 13 is formed on the membrane 11 by using platinum or platinum-tantalum (Pt-Ta). The lower electrode 13 is formed to have a thickness of about 500 to 2000 microns using a sputtering method.

The deformable portion 15 is formed such that piezoelectric ceramics such as PZT or PLZT, or electrodistorted ceramics such as PMN have a thickness of about 1.0 to 2.0 µm using the sol-gel method. In addition, the deformable portion 15 may be formed using a chemical vapor deposition (CVD) method.

The upper electrode 17 is formed to have a thickness of about 500 to 1000 mW by using a sputtering method of aluminum (Al) or platinum. Subsequently, the upper electrode 17, the deformable part 15, the lower electrode 13, and the membrane 11 are sequentially etched in a pixel shape.

The deformable part 15, the lower electrode 13, the membrane 11, the etch stop layer 7, and the protective layer 5 are sequentially etched to form a via contact 19. The via contact 19 vertically forms tungsten (W) or titanium from the top of the deformable portion 15 to the drain 2 by using a lift-off method. Therefore, the via contact 19 electrically connects the drain 2 and the lower electrode 13.

The mirror 21 is formed using conventional photolithography methods and sputtering methods. The mirror 21 is formed to have a thickness of about 500 to 1000 mm by using silver (Ag) or aluminum. The sacrificial layer 8 is etched using hydrogen fluoride (HF) vapor, and then the structure is cleaned and dried to complete the AMA device.

In the above-described thin film type optical path adjusting device according to the present invention, the image signal generated from the MOS transistor (not shown) embedded in the active matrix 1 is transferred to the lower electrode 13 through the drain 2 and the via contact 19. Is applied). At the same time, a bias voltage is applied to the upper electrode 17. Therefore, an electric field is generated between the upper electrode 17 and the lower electrode 13. By this electric field, the deformation | transformation part 13 shrinks in a vertical direction. Therefore, the actuator 3 including the deformation part 13 is bent in the direction opposite to the direction in which the membrane 11 is formed. Since the mirror 21 reflecting the light beam incident from the light source is formed on the actuator 3, the mirror 3 is inclined at a predetermined angle as the actuator 3 is bent. The light beam incident from the light source is reflected by the mirror 21 at a predetermined angle to form an image on the screen through the slit.

However, in the thin film type optical path control device described in the above-mentioned prior application, there is a problem that the imbalance of the topology due to the step of the active matrix lowers the cantilever characteristic of the actuator during the subsequent thin film deposition process due to the step of the active matrix part. there was. In other words, when the thin films are stacked on top of them due to the step of the active matrix portion, an unbalance is caused in the shape (particularly the flatness) of the thin films. Therefore, there is a problem in that the cantilever characteristic of the actuator that causes deformation according to the electric field is deteriorated because the actuator is not accurately formed in a horizontal state.

Accordingly, an object of the present invention is to planarize the sacrificial layer using a self-planarization process simultaneously with vapor deposition without a separate planarization process, thereby compensating for the step difference in the active matrix portion, and facilitating the planarization of the sacrificial layer. The present invention provides a method for manufacturing a thin film type optical path control device capable of improving the cantilever characteristics of an actuator.

1 is a plan view of a thin film type optical path adjusting device described in the applicant's prior application.

FIG. 2 is a cross-sectional view taken along line A′A ′ of the apparatus shown in FIG. 1.

3 is a plan view of a thin film type optical path control apparatus according to the present invention.

4 is a cross-sectional view of the apparatus shown in FIG. 3 taken along line B′B ′.

5A to 5D are manufacturing process diagrams of the apparatus shown in FIG. 4.

<Explanation of symbols for main parts of drawing>

31: active matrix 32: actuator

33: pad 34: plug

35: protective layer 37: etching prevention layer

39: sacrificial layer 41: base layer

43: flow layer 45: cap layer

47: air gap 49: lower electrode

51: deformation portion 53: upper electrode

The present invention to achieve the above object,

Forming a pad on one side of an active matrix having M × N (M, N is an integer) transistors;

Forming a sacrificial layer on the active matrix and on the pad by using a flowfill process;

Forming a lower electrode on the sacrificial layer;

Forming a deformation part on the lower electrode; And

It provides a method of manufacturing a thin film type optical path control device comprising the step of forming an upper electrode on the deformation portion.

In the thin film type optical path adjusting device according to the present invention, an image signal generated from a transistor embedded in an active matrix is applied to a lower electrode which is a signal electrode through a pad and a plug. In addition, a bias voltage is applied to the upper electrode, which is a common electrode, to generate an electric field between the upper electrode and the lower electrode. Deformation portions stacked between the upper electrode and the lower electrode cause deformation by this electric field. The deformation portion contracts in a direction perpendicular to the electric field, and the actuator including the deformation portion is bent in a direction opposite to the direction in which the lower electrode is formed. Therefore, the upper electrode on the actuator is also inclined in the same direction. Since the upper electrode also functions as a mirror that reflects the luminous flux, the luminous flux incident from the light source is reflected by the inclined upper electrode at a predetermined angle, and is then projected onto a screen to form an image.

Therefore, in the manufacturing method of the thin film type optical path control apparatus according to the present invention, the cantilever characteristics of the actuator generated by the step of the active matrix portion is self-planarized by the deposition of the sacrificial layer by the flow fill process using silica when forming the sacrificial layer. Can be minimized.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

3 is a plan view showing a thin film type optical path adjusting device according to the present invention, and FIG. 4 is a sectional view taken along line B′B ′ of the device shown in FIG. 3.

3 and 4, the thin film type optical path adjusting apparatus according to the present invention includes an active matrix 31 having a pad 33 formed on one side thereof, and an actuator 32 formed on the active matrix 31. .

The active matrix 31 includes a protective layer 35 stacked on the active matrix 31 and the pad 33 and an etch stop layer 37 stacked on the protective layer 35. M x N (M, N is an integer) MOS transistors (not shown) are built in the active matrix 31.

An etch stop layer 37 is stacked on the passivation layer 35. The etch stop layer 37 prevents the active matrix 31 and the protective layer 35 from being etched due to a subsequent process.

An actuator 32 is formed on the etch stop layer 37, and the actuator 32 includes a lower electrode 49, a deformation part 51, and an upper electrode 53.

The lower electrode 49 to which the image signal generated from the transistor embedded in the active matrix 31 is applied is stacked on the etch stop layer 37. One side of the lower electrode 49 is in contact with the etch stop layer 37, and the other side is formed to be parallel to the etch stop layer 37 via an air gap 47.

The deforming part 51 is stacked on the lower electrode 49, and the upper electrode 53 is stacked on the deforming part 51.

Referring to FIG. 3, one side of the lower electrode 49 has a concave portion having a rectangular shape at the center thereof, and the concave portion is formed in a stepped shape toward both edges. The other side of the lower electrode 49 has a rectangular protrusion that narrows in a stepped manner toward the center portion corresponding to the concave portion. Therefore, the recessed portion of the lower electrode of the actuator adjacent to the recessed portion of the lower electrode 49 is fitted, and the rectangular projection is fitted to the recessed portion of the adjacent lower electrode.

Hereinafter, a method of manufacturing the above-described thin film type optical path control apparatus will be described with reference to the drawings.

5A to 5D are manufacturing process diagrams of the apparatus shown in FIG. 4. 5A to 5D, the same reference numerals are used for the same members as in FIG.

Referring to FIG. 5A, a protective layer 35 is formed by using silicate glass PSG on top of an active matrix 31 having M × N transistors (not shown) and a pad 33 formed on one side thereof. Laminated. The protective layer 35 is formed to have a thickness of about 1.0 to 2.0 µm using the chemical vapor deposition (CVD) method. The protective layer 35 protects the active matrix 31 from subsequent processes.

An etch stop layer 37 is stacked on the passivation layer 35 using nitride. The etch stop layer 37 is formed to have a thickness of about 1000 to 2000 kPa using a low pressure chemical vapor deposition (LPCVD) method. The etch stop layer 37 prevents the protective layer 35, the active matrix 31, and the like from being etched during the subsequent etching process. In addition, the plug 34 is formed by etching a portion of the etch stop layer 37 and the protective layer 35 in which the pad 33 is formed below. The plug 34 is formed vertically from the etch stop layer 37 to the pad 33 through the protective layer 35 by using a tungsten, platinum or the like lift-off method. Therefore, the image signal generated from the transistor embedded in the active matrix 31 is transmitted to the lower electrode 49 through the pad 33 and the plug 34.

The sacrificial layer 39 is stacked on the etch stop layer 37 and the plug 34. In this case, since the surface of the active matrix 31 in which the transistor is embedded is not flat, a step of planarizing the active matrix 31 has been required in the related art. In the present invention, the sacrificial layer 39 is laminated with the sacrificial layer 39 using a flowfill process, which is a self-planarizing method, and simultaneously performs the planarization process. The flowfill process is a process of depositing a vapor phase compound by forming a liquid phase intermediate at a low temperature. When the generated liquid intermediate is flown, planarization is performed by its surface tension. It uses the principle that is made. The deposition in the flow fill process uses conventional plasma enhanced CVD (PECVD) using plasma.

In the process of forming the sacrificial layer 39 using a flow fill process, forming a base layer 41 on the etch stop layer 37, and a flow layer on the base layer 41. forming a flow layer (43), heating the flow layer (43), forming a cap layer (45) on the heated flow layer (43), and the cap layer ( Annealing the active matrix 31 on which 45 is formed under a nitrogen atmosphere.

The base layer 41 is a silica (SiO ₂ ) generated from a mixture of liquid silane (Silane: SiH ₄ ) and dinitrogen monoxide (N ₂ O) to have a thickness of about 500 to 1000Å by PECVD. Deposit. The base layer 41 is excellent in adhesion with the thin films to be deposited later, the adhesion is well made and serves as a moisture barrier (moisture barrier) to prevent the penetration of moisture. Subsequently, a flow layer 43 is laminated on the base layer 41 at 0 ° C. The flow layer 43 is formed by depositing silicon tetraoxide (Si (OH) ₄ ) generated from a mixture of silane (SiH ₄ ) and hydrogen peroxide (H ₂ O ₂ ) to have a thickness of about 500 to 2000Å by PECVD. Form. The flow layer 43 is formed by depositing silicon tetraoxide in the vapor phase (vapor phase) or forming a thick film in the form of a liquid intermediate (Liquid Phase Intermediate). At this time, the silicon tetraoxide (Si (OH) ₄ ) is a flow layer 43 is formed as an intermediate in the liquid state, the planarization is made by its surface tension. Subsequently, the flow layer 43 is heat-treated at a temperature of 300 ° C. or lower to remove water, which is an impurity generated in the flow layer 43. Subsequently, a cap layer 45 is laminated on the flow layer 43 at a temperature of about 300 ° C. At this time, the cap layer 45 is a silica (SiO ₂ ) generated from a mixture of liquid silane (Silane: SiH ₄ ) and dinitrogen monoxide (N ₂ O) to a thickness of about 500 to 2,000Å by PECVD. Prepared by deposition. The cap layer 45 not only protects the flow layer 43 during the subsequent annealing process but also provides mechanical stability. Subsequently, the active matrix 31 is annealed at a temperature of 400 to 450 ° C. under a nitrogen atmosphere to condense silanol groups and remove residual water.

When the sacrificial layer 39 is formed using a flow fill process, a separate chemical mechanical polishing (CMP) process or spin on glass (SOG) is used to planarize the surface of the sacrificial layer 39. You do not need this. In general, when the CMP process is used, the surface of the active matrix 31 is often damaged. Therefore, using the flow fill process may prevent the surface of the active matrix 31 from being damaged by the CMP process, and improve the flatness of the surface of the sacrificial layer 39. Therefore, the manufacturing process can be simplified by planarization and deposition simultaneously without a separate process. Therefore, when the thin films are stacked on top of them due to the stepped portion of the active matrix 31, the flatness unbalance of the thin films is caused, and thus the cantilever characteristics of the actuators that do not form the horizontally accurate actuators and deform according to the electric field are caused. The fall can be prevented.

Subsequently, the sacrificial layer 39 is patterned to expose a portion of the etch stop layer 37 having the plug 34 formed thereunder.

Referring to FIG. 5B, the lower electrode 49, which is a signal electrode, is stacked on the sacrificial layer 39 and the exposed etch stop layer 37. The lower electrode 49 is formed of a metal such as platinum or tantalum (Ta) so as to have a thickness of about 500 to 2000 mW using a sputtering method. Subsequently, the lower electrode 49 is etched and patterned by a dry etching method in order to separate each pixel. The lower electrode 49 simultaneously performs the functions of the membrane and the lower electrode in the thin film type optical path adjusting device described in the preceding application. This eliminates the need for a membrane manufacturing process and simplifies the manufacturing process.

Referring to FIG. 5C, a deformation part 51 including PZT or PLZT is formed on the lower electrode 49. The deformable portion 51 is formed to have a thickness of about 0.1 to 1.0 μm, preferably about 0.4 μm using a sol-gel method, and then subjected to a phase change by heat treatment using a rapid heat treatment (RTA) method. . The deformation unit 51 causes deformation by an electric field generated between the upper electrode 53 and the lower electrode 49.

Subsequently, the deforming part 51 is etched by a dry etching method in order to separate each pixel. In addition, the upper electrode 53 is stacked on one side of the deformable portion 51 by using a metal such as aluminum or platinum having excellent electrical conductivity and reflective properties. The upper electrode 53 is formed to have a thickness of about 500 to 2000 micrometers by a sputtering method. A bias voltage is applied to the upper electrode 53, and at the same time, the upper electrode 53 is used as a mirror reflecting the incident light beam.

Subsequently, the upper electrode 53, the deformable portion 51, and the lower electrode 49 are sequentially etched and patterned from the upper portion of the upper electrode 53.

Referring to FIG. 5D, the sacrificial layer 39 is etched, cleaned and dried using an oxide etching solution (BOE) which is a mixture of ammonium fluoride (NH ₄ F) and a hydrofluoric acid solution to complete an AMA device. .

In the above-described thin film type optical path adjusting device, the image signal generated from the MOS transistor embedded in the active matrix 31 is applied to the lower electrode 49 which is a signal electrode through the pad 33 and the plug 34. In addition, a bias voltage is applied to the upper electrode 53, which is a common electrode, to generate an electric field between the upper electrode 53 and the lower electrode 49. The deformed portion 51 stacked between the upper electrode 53 and the lower electrode 49 causes deformation by this electric field. The deformable portion 51 contracts in a direction perpendicular to the electric field, and the actuator 32 including the deformable portion 51 is bent in a direction opposite to the direction in which the lower electrode 49 is formed. Since the upper electrode 53 on the actuator 32 also functions as a mirror, the upper electrode 53 is inclined in the same direction at a predetermined angle according to the deformation of the deformation unit 51. Therefore, the light beam incident from the light source is reflected by the upper electrode 53 inclined at a predetermined angle and projected onto the screen.

In the manufacturing method of the thin film type optical path control apparatus according to the present invention, the sacrificial layer is self-planarized by depositing by a flow fill process using silica when the sacrificial layer is formed, thereby deteriorating the cantilever characteristic of the actuator generated due to the step of the active matrix portion. Can be minimized. That is, when the thin films are stacked on top of the active matrix due to the step difference, the flatness unevenness of the thin films is caused, and thus the cantilever characteristic of the actuator that causes deformation according to the electric field is deteriorated because the actuator is not formed in a horizontal state accurately. It can prevent.

As described above, although described with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified without departing from the spirit and scope of the invention described in the claims below. And can be changed.

Claims (6)

Forming a pad on one side of an active matrix having M × N (M, N is an integer) transistors; Forming a protective layer on the active matrix and forming an etch stop layer on the passivation layer, and then vertically forming a plug through the etch stop layer and the passivation layer to a drain pad; Forming a sacrificial layer on top of the etch stop layer and the plug by a flow fill method to planarize the sacrificial layer at the same time as the sacrificial layer is formed; Etching the sacrificial layer to expose the mouth of the etch stop layer having the drain pad formed on and under the plug; Forming a lower electrode on the sacrificial layer, the exposed plug and the etch stop layer; Forming a strained layer on the lower electrode; And Method of manufacturing a thin film type optical path control device comprising the step of forming an upper electrode on the deformation layer. The method of claim 1, wherein the forming of the sacrificial layer comprises: i) forming a base layer on top of the etch stop layer, ii) forming a flow layer on top of the base layer; Iii) heating the flow layer, iii) forming a cap layer on the heated flow layer, and iii) annealing an active matrix having the cap layer formed thereon. The manufacturing method of the thin film-type optical path control apparatus characterized by including more. 3. The silica of claim 2, wherein the base layer is formed of a mixture of liquid silane (Silane: SiH ₄ ) and dinitrogen monoxide (N ₂ O) at a temperature of 300 ° C. or lower by using a plasma enhanced CVD (PECVD) method. A method for manufacturing a thin film type optical path control device, characterized by depositing (SiO ₂ ) to produce it. The method of claim 2, wherein the flow layer is prepared by depositing a silicon tetraoxide (Si (OH) ₄ ) layer generated from a mixture of silane (SiH ₄ ) and hydrogen peroxide (H ₂ O ₂ ) at 0 ° C. using a PECVD method. The manufacturing method of the thin film-type optical path control apparatus characterized by the above-mentioned. The method of claim 2, wherein the cap layer is prepared by depositing silica (SiO ₂ ) generated from a mixture of liquid silane (SiH ₄ ) and dinitrogen monoxide (N ₂ O) at a temperature of less than 300 ℃ using a PECVD method. The manufacturing method of the thin film-type optical path control apparatus characterized by the above-mentioned. The method of claim 2, wherein the active matrix on which the silica layer is formed is annealed under a nitrogen atmosphere at a temperature of 400 to 450 ° C.