KR100200289B1 - 자체 배치형 반도체 집적회로장치 및 배선회로기판의 조합체 - Google Patents

자체 배치형 반도체 집적회로장치 및 배선회로기판의 조합체 Download PDF

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Publication number
KR100200289B1
KR100200289B1 KR1019940023481A KR19940023481A KR100200289B1 KR 100200289 B1 KR100200289 B1 KR 100200289B1 KR 1019940023481 A KR1019940023481 A KR 1019940023481A KR 19940023481 A KR19940023481 A KR 19940023481A KR 100200289 B1 KR100200289 B1 KR 100200289B1
Authority
KR
South Korea
Prior art keywords
package
circuit board
integrated circuit
terminal
recess
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019940023481A
Other languages
English (en)
Korean (ko)
Other versions
KR950010031A (ko
Inventor
히데아키 고즈루
Original Assignee
우에시마 세이스케
야마하 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP25517893A external-priority patent/JP3348485B2/ja
Priority claimed from JP5255177A external-priority patent/JPH0786449A/ja
Application filed by 우에시마 세이스케, 야마하 가부시키가이샤 filed Critical 우에시마 세이스케
Publication of KR950010031A publication Critical patent/KR950010031A/ko
Application granted granted Critical
Publication of KR100200289B1 publication Critical patent/KR100200289B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
KR1019940023481A 1993-09-14 1994-09-16 자체 배치형 반도체 집적회로장치 및 배선회로기판의 조합체 Expired - Fee Related KR100200289B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP93-255177 1993-09-14
JP25517893A JP3348485B2 (ja) 1993-09-17 1993-09-17 半導体装置と実装基板
JP5255177A JPH0786449A (ja) 1993-09-17 1993-09-17 半導体装置と実装基板
JP93-255178 1993-09-17

Publications (2)

Publication Number Publication Date
KR950010031A KR950010031A (ko) 1995-04-26
KR100200289B1 true KR100200289B1 (ko) 1999-06-15

Family

ID=26542063

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940023481A Expired - Fee Related KR100200289B1 (ko) 1993-09-14 1994-09-16 자체 배치형 반도체 집적회로장치 및 배선회로기판의 조합체

Country Status (2)

Country Link
KR (1) KR100200289B1 (enExample)
TW (1) TW259892B (enExample)

Also Published As

Publication number Publication date
KR950010031A (ko) 1995-04-26
TW259892B (enExample) 1995-10-11

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