TW259892B - - Google Patents

Info

Publication number
TW259892B
TW259892B TW083108452A TW83108452A TW259892B TW 259892 B TW259892 B TW 259892B TW 083108452 A TW083108452 A TW 083108452A TW 83108452 A TW83108452 A TW 83108452A TW 259892 B TW259892 B TW 259892B
Authority
TW
Taiwan
Application number
TW083108452A
Other languages
Chinese (zh)
Original Assignee
Yamaha Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP25517893A external-priority patent/JP3348485B2/ja
Priority claimed from JP5255177A external-priority patent/JPH0786449A/ja
Application filed by Yamaha Corp filed Critical Yamaha Corp
Application granted granted Critical
Publication of TW259892B publication Critical patent/TW259892B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
TW083108452A 1993-09-17 1994-09-13 TW259892B (enExample)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP25517893A JP3348485B2 (ja) 1993-09-17 1993-09-17 半導体装置と実装基板
JP5255177A JPH0786449A (ja) 1993-09-17 1993-09-17 半導体装置と実装基板

Publications (1)

Publication Number Publication Date
TW259892B true TW259892B (enExample) 1995-10-11

Family

ID=26542063

Family Applications (1)

Application Number Title Priority Date Filing Date
TW083108452A TW259892B (enExample) 1993-09-17 1994-09-13

Country Status (2)

Country Link
KR (1) KR100200289B1 (enExample)
TW (1) TW259892B (enExample)

Also Published As

Publication number Publication date
KR950010031A (ko) 1995-04-26
KR100200289B1 (ko) 1999-06-15

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees